RENESAS R2A20134SP

Preliminary Datasheet
R2A20134SP
R03DS0033EJ0200
Rev.2.00
Jun 03, 2011
LED Lighting Power Controller
Description
R2A20134SP is a LED lighting controller IC.
Control method is selectable for each system demand, fixed frequency or zero current detection mode.
High accuracy LED current feed-back system makes more efficient LED performance.
Critical Conduction Mode PFC control realizes high power factor and zero current switching.
And Peak Current Mode makes it possible to reduce external parts and realize low system cost.
Features
 Absolute Maximum Ratings
 Supply voltage Vcc: 24 V
 Operating junction temperature Tjopr: –40 to +150°C
 Electrical characteristics
 UVLO operation start voltage VH: 12 V  0.8 V
 UVLO operation shutdown voltage VL: 9.2 V  0.7 V
 UVLO hysteresis voltage Hysuvl: 2.8 V  0.7 V
 Functions
 Selectable for each targeted system,
1. Zero current detection mode (When Rrt is connected by GND)
2. Fixed frequency mode (When Rrt is connected by Vref)
 Adjustable for Switching frequency (When Rrt is connected by Vref)
 Overcurrent protection
 Package lineup: Pb-free SOP-8 (JEDEC)
Ordering Information
Part No.
R2A20134SP#W5
Package Name
—
R03DS0033EJ0200 Rev.2.00
Jun 03, 2011
Package Code
PRSP0008DJ-A
Package
Abbreviation
SP
Taping Abbreviation
(Quantity)
W (2,500 pcs/reel)
Page 1 of 10
R2A20134SP
Preliminary
Pin Arrangement
FB
1
8
VCC
COMP
2
7
OUT
RT
3
6
GND
VREF
4
5
CS
(Top view)
Pin Function
Pin No.
1
2
3
4
5
6
7
8
Pin Name
FB
COMP
RT
Input/Output
Input
Output
Input/Output
Error amplifier input terminal
Error amplifier output terminal
A resistor connection terminal for RAMP current setting
VREF
CS
GND
OUT
VCC
Output
Input
—
Output
Input
Reference voltage output terminal
Zero current detection and overcurrent detection input terminal
Ground
Power MOSFET drive terminal
Supply voltage terminal
R03DS0033EJ0200 Rev.2.00
Jun 03, 2011
Function
Page 2 of 10
R2A20134SP
Preliminary
Block Diagram
• Rrt: Connect to GND (Zero Current Detection Mode)
VREF: 5.02 V
VREF 4
UVLO
8 VCC
OFF: 9.2 V/ON: 12 V
VREF
53 μA
6 GND
–
13 mV +
Logic Block
CS 5
7 OUT
–
0.6 V +
VREF
VREF
RT
Error
Amp
Ramp Control
–
+
3
250 nA
–
+
1 FB
0.605 V
1V
Rrt
2 COMP
10 pF
4.1 V
• Rrt: Connect to VREF (Fixed Frequency Mode)
VREF: 5.02 V
VREF 4
UVLO
8 VCC
OFF: 9.2 V/ON: 12 V
VREF
53 μA
CS 5
6 GND
+
–
0.6 V
Logic Block
Max Duty Detect
1V
+
–
2V
+
–
7 OUT
VREF
VREF
Error
Amp
VREF
Rrt
Ramp Control
RT
3
–
+
250 nA
–
+
1 FB
0.605 V
1V
2 COMP
10 pF
4.1 V
R03DS0033EJ0200 Rev.2.00
Jun 03, 2011
Page 3 of 10
R2A20134SP
Preliminary
Absolute Maximum Ratings
(Ta = 25°C)
Item
Power Supply Voltage
OUT terminal peak current
OUT terminal DC current
RT terminal current
VREF terminal current
Vref terminal voltage
FB terminal voltage
CS terminal voltage
Power dissipation
Operating junction temperature
Storage temperature
Notes: 1.
2.
3.
4.
Symbol
VCC
Ipk-snk-out
Ipk-src-out
Idc-snk-out
Idc-src-out
Irt
Iref
Vt-ref
Vt-fb
Vcs
Pt
Tj-pr
Tstg
Ratings
–0.3 to +24
0.9
–0.50
100
–50
–200
–5
–0.3 to Vref + 0.3
–0.3 to +5
–0.3 to +5
0.68
–40 to +150
–55 to +150
Unit
V
A
Note
3
mA
A
mA
V
V
V
W
°C
°C
4
Rated voltages are with reference to the GND terminal.
For rated currents, inflow to the IC is indicated by (+), and outflow by (–).
Shows the transient current when driving a capacitive load.
In case of R2A20134SP: ja = 120°C/W
This value is a thing mounting on 40  40  1.6 [mm], a glass epoxy board of wiring density 10%.
R03DS0033EJ0200 Rev.2.00
Jun 03, 2011
Page 4 of 10
R2A20134SP
Preliminary
Electrical Characteristics
(Ta = 25°C, VCC = 15 V, CS = 0 V, FB = COMP, RRT = 200 k)
Supply
VREF
Error
amplifier
RT
Zero
current
detector
Restart
Item
UVLO turn-on threshold
UVLO turn-off threshold
UVLO hysteresis
Standby current
Operating current
Reference voltage
Temperature stability
Line regulation
Symbol
Vuvlh
Vuvll
Hysuvl
Istby
Icc
Vref
dVref
Vref-line
Load regulation
Vref-load
Feedback voltage
Input bias current
Open loop gain
Upper clamp voltage
Vfb
Ifb
Av
Vclamp_comp
Low voltage
Vl-comp
Source current
Min
11.2
8.5
2.1
—
—
4.945
—
—
Typ
12
9.2
2.8
130
2.2
5.020
80
5
Max
12.8
9.9
3.5
250
3.3
5.095
—
20
Unit
V
V
V
A
mA
V
ppm/°C
mV
Test Conditions
VCC = Vuvlh – 0.2 V
Isource = 0 mA
Tj = –40 to 150°C *1
Isource = 0 mA
Vcc = 10 V to 24 V
Isource = 0 mA to –5 mA
—
5
20
mV
0.587
–0.75
—
3.85
0.605
–0.25
63
4.10
0.623
–0.1
—
4.30
V
A
dB
V
—
0.1
0.3
V
FB = 0.9 V
COMP: Open
Isrc-comp
–13
–9.5
–6
A
FB = 0.3 V
COMP: 2.5 V
Sink current
Isnk-comp
6
9.5
13
A
FB = 0.9 V
COMP: 2.5 V
Transconductance
gm
25
45
70
s
FB = 0.55 V  0.65 V
COMP: 2.5 V
RAMP offset voltage
RAMP amplitude
RT voltage1
RT voltage2
ZCD threshold voltage
Input bias current
Voffset_ramp
dVramp
V-rt1
V-rt2
Vzcd
Ics
—
2.9
1.9
2.9
7
–85
1.0
3.1
2.0
3.0
13
–53
—
3.3
2.1
3.1
19
–25
V
V
V
V
mV
A
Restart time delay
Tstart
45
75
140
s
Measured pin: FB
FB = 0.3 V
COMP: Open
*2
RT-GND: 200 k
RT-Vref: 200 k
Vcs = 13 mV
FB = 0.3 V, COMP = 2.5 V
Notes: *1 Design spec
*2 dVramp = Vclamp_comp – Voff_ramp
R03DS0033EJ0200 Rev.2.00
Jun 03, 2011
Page 5 of 10
R2A20134SP
Preliminary
Electrical Characteristics (cont.)
(Ta = 25°C, VCC = 15 V, CS = 0 V, FB = COMP, RRT = 200 k)
OUT
Over
current
protection
Item
Rise time
Symbol
tr-out
Min
—
Typ
30
Max
100
Unit
ns
Fall time
tf-out
—
30
100
ns
OUT low voltage
OUT high voltage
OUT frequency
Vol1-out
Vol2-out
Voh-out
fout
—
—
14.5
43
0.08
0.05
14.8
48
0.20
0.70
—
53
V
V
V
kHz
Maximum duty cycle
OCP threshold voltage
OCP blanking time
Dmax
Vocp
tblank
47
0.57
170
52
0.6
300
57
0.63
450
%
V
ns
Test Conditions
CL = 1000 pF,
FB = 0.3 V, COMP = 2.5 V
CL = 1000 pF,
FB = 0.3 V, COMP = 2.5 V
Isink = 20 mA
Isink = 10 mA, VCC = 5 V
Isource = –20 mA *1
RT-Vref: 200 k *3
RT-Vref: 200 k
Notes: *1 Design spec
*3 The fout is adjusted by changing resistance of Rrt connected between RT-VREF terminals.
Reference data and a calculating formula are shown as follows.
1
fout [kHz] =
–9
(100 × 10 × Rrt) + (450 × 10–6)
Pin 3 RT
Rrt
250
Pin 4 VREF
fout [kHz]
200
150
100
fout (Reference data)
50
fout (Calculation)
0
0
10
20
30
40
50
Irt [μA]
* The graph is for reference only and does not guarantee actual characteristic.
R03DS0033EJ0200 Rev.2.00
Jun 03, 2011
Page 6 of 10
R2A20134SP
Preliminary
Waveforms
1. Start-up Timing (Zero Current Detection Mode/Fixed Frequency Mode common)
12 V (Vuvlh)
VCC
5.02 V
3.6 V
VREF
VREF GOOD
(Internal signal)
FB
COMP
1V
OUT
2. Stop Timing (Zero Current Detection Mode/Fixed Frequency Mode common)
9.2 V
(Vuvll)
VCC
OUT
Normal operation
R03DS0033EJ0200 Rev.2.00
Jun 03, 2011
Page 7 of 10
R2A20134SP
Preliminary
3. Gate Drive Output (Zero Current Detection Mode)
COMP
RAMP+1V
(Internal signal)
RAMP
(Internal signal)
IL
0A
0.6 V
CS
13 mV
OUT
Error Amp Operation
Peak Current Mode Operation
Zero Current Detect Zoom-up
COMP
RAMP+1V
(Internal signal)
RAMP
(Internal signal)
IL
0A
CS
13 mV
0.8 μs
OUT
R03DS0033EJ0200 Rev.2.00
Jun 03, 2011
Page 8 of 10
R2A20134SP
Preliminary
4. Gate Drive Output (Fixed Frequency Mode)
4.1 Error Amp Control Mode
RAMP+1V
(Internal signal)
2V
COMP
1V
RAMP
(Internal signal)
IL
0A
0.6 V
CS
0V
OUT
Max Duty 52%
4.2 Peak Current Mode
COMP
2V
RAMP+1V
(Internal signal)
1V
RAMP
(Internal signal)
IL
0A
0.6 V
CS
0V
OUT
Max Duty 52%
R03DS0033EJ0200 Rev.2.00
Jun 03, 2011
Page 9 of 10
R2A20134SP
Preliminary
Package Dimensions
JEITA Package Code
P-SOP8-3.94x4.93-1.27
RENESAS Code
PRSP0008DJ-A
*1
Previous Code
—
MASS[Typ.]
0.073g
NOTE)
1. DIMENSIONS"*1 (Nom)"AND"*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
INCLUDE TRIM OFFSET.
F
D
8
5
c
*2
E
HE
bp
Terminal cross section
Reference
Symbol
(Ni/Pd/Au plating)
Index mark
1
Z
4
*3
e
bp
x
M
A
L1
θ
S
A1
L
y S
R03DS0033EJ0200 Rev.2.00
Jun 03, 2011
Detail F
D
E
A2
A1
A
bp
b1
c
c1
θ
HE
e
x
y
Z
L
L1
Dimension in Millimeters
Min Nom Max
4.80 4.93 4.98
3.81 3.94 3.99
1.47
0.10 0.15 0.25
1.73
0.35 0.41 0.49
0.19
0°
5.84
0.20
5.99
1.27
0.25
8°
6.20
0.25
0.10
0.41
0.56
0.64
1.03
0.89
Page 10 of 10
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Colophon 1.1