IR-enhanced CCD area image sensor S11500-1007 Enhanced near infrared sensitivity: QE=40% (λ=1000 nm), back-thinned FFT-CCD The S11500-1007 is an FFT-CCD image sensor for photometric applications that offers improved sensitivity in the near infrared region at wavelengths longer than 800 nm. Our unique technology in laser processing was used to form a MEMS structure on the back side of the CCD. This allows the S11500-1007 to have much higher sensitivity than our conventional product (S7030-1007). In addition to having high near infrared sensitivity, the S11500-1007 can be used as an image sensor with a long active area in the direction of the sensor height by binning operation, making it suitable for detectors in Raman spectroscopy. Binning operation also ensures even higher S/N and signal processing speed compared to methods that use an external circuit to add signals digitally. The S11500-1007 has a pixel size of 24 × 24 μm and active area of 24.576 (H) × 2.928 (V) mm (1024 × 122 pixels). The S115001007 is pin compatible with the S7030-1007, and so operates under the same drive conditions. Features Applications Enhanced near infrared sensitivity: QE=40% (λ=1000 nm) Raman spectrometer, etc. Pixel size: 24 × 24 μm Line, pixel binning Wide spectral response range Low readout noise Wide dynamic range MPP operation Spectral response (without window)*1 (Typ. Ta=25 °C) 100 90 S11500-1007 Quantum efficiency (%) 80 70 60 Conventional type (S7030-1007) 50 40 30 20 Front-illuminated CCD 10 0 200 400 600 800 1000 1200 Wavelength (nm) KMPDB0325EC *1: Spectral response with quartz glass is decreased according to the spectral transmittance characteristic of window material. www.hamamatsu.com 1 CCD area image sensor S11500-1007 General ratings Parameter Pixel size Number of total pixels Number of active pixels Active area [mm (H) × mm (V)] Vertical clock phase Horizontal clock phase Output circuit Package Window Specification 24 (H) × 24 (V) μm 1044 × 128 1024 × 122 24.576 (H) × 2.928 (V) mm 2-phase 2-phase One-stage MOSFET source follower 24-pin ceramic DIP (refer to dimensional outline) Quartz glass Absolute maximum ratings Parameter Operating temperature*2 Storage temperature Output transistor drain voltage Reset drain voltage Vertical input source voltage Horizontal input source voltage Vertical input gate voltage Horizontal input gate voltage Summing gate voltage Output gate voltage Reset gate voltage Transfer gate voltage Vertical shift register clock voltage Horizontal shift register clock voltage Symbol Topr Tstg VOD VRD VISV VISH VIG1V, VIG2V VIG1H, VIG2H VSG VOG VRG VTG VP1V, VP2V VP1H, VP2H Min. -50 -50 -0.5 -0.5 -0.5 -0.5 -10 -10 -10 -10 -10 -10 -10 -10 Typ. - Max. +50 +70 +25 +18 +18 +18 +15 +15 +15 +15 +15 +15 +15 +15 Unit °C °C V V V V V V V V V V V V Min. 18 11.5 1 -9 -9 4 -9 4 -9 4 -9 4 -9 4 -9 20 Typ. 20 12 3 0 VRD VRD -8 -8 6 -8 6 -8 6 -8 6 -8 6 -8 22 Max. 22 12.5 5 8 -7 8 -7 8 -7 8 -7 8 -7 24 Unit V V V V V V V V *2: Package temperature Operating conditions (MPP mode, Ta=25 °C) Parameter Output transistor drain voltage Reset drain voltage Output gate voltage Substrate voltage Vertical input source Horizontal input source Test point Vertical input gate Horizontal input gate High Vertical shift register clock voltage Low High Horizontal shift register clock voltage Low High Summing gate voltage Low High Reset gate voltage Low High Transfer gate voltage Low External load resistance Symbol VOD VRD VOG VSS VISV VISH VIG1V, VIG2V VIG1H, VIG2H VP1VH, VP2VH VP1VL, VP2VL VP1HH, VP2HH VP1HL, VP2HL VSGH VSGL VRGH VRGL VTGH VTGL RL V V V V V kΩ 2 CCD area image sensor S11500-1007 Electrical characteristics (Ta=25 °C) Parameter Signal output frequency Vertical shift register capacitance Horizontal shift register capacitance Summing gate capacitance Reset gate capacitance Transfer gate capacitance Charge transfer efficiency*3 DC output level Output impedance Power consumption*4 Symbol fc CP1V, CP2V CP1H, CP2H CSG CRG CTG CTE Vout Zo P Min. 0.99995 14 - Typ. 0.25 3000 180 30 30 75 0.99999 16 3 13 Max. 1 18 4 14 Unit MHz pF pF pF pF pF V kΩ mW *3: Charge transfer efficiency per pixel, measured at half of the full well capacity *4: Power consumption of the on-chip amplifier plus load resistance Electrical and optical characteristics (Ta=25 °C, unless otherwise noted) Parameter Saturation output voltage Vertical Full well capacity Horizontal*5 CCD node sensitivity 25 °C Dark current*6 (MPP mode) 0 °C Readout noise*7 Line binning Dynamic range*8 Area scanning Photo response non-uniformity*9 Spectral response range White spots Point defect*10 Black spots Cosmetics Cluster defect*11 Column defect*12 Symbol Vsat Fw Sv DS Nr DR PRNU λ - Min. 240 800 1.8 100000 30000 - Typ. Fw × Sv 320 1000 2.2 100 10 8 125000 40000 ±3 200 to 1100 - Max. 400 40 16 ±10 0 10 3 0 Unit V keμV/ee-/pixel/s e- rms % nm - *5: The linearity is ±1.5 %. *6: Dark current nearly doubles for every 5 to 7 °C increase in temperature. *7: Measured with a HAMAMATSU C4880 digital CCD camera with a CDS circuit (sensor temperature: -40 °C, operating frequency: 150 kHz) *8: Dynamic range (DR) = Full well capacity / Readout noise *9: Measured at one-half of the saturation output (full well capacity) using LED light (peak emission wavelength: 560 nm) Photo response non-uniformity = Fixed pattern noise (peak to peak) Signal × 100 [%] *10: White spots Pixels whose dark current is higher than 1 ke- after one-second integration at 0 °C. Black spots Pixels whose sensitivity is lower than one-half of the average pixel output. (measured with uniform light producing one-half of the saturation charge) *11: 2 to 9 contiguous defective pixels *12: 10 or more contiguous defective pixels 3 CCD area image sensor S11500-1007 Dark current vs. temperature Spectral transmittance characteristic (Typ.) 1000 (Typ. Ta=25 °C) 100 90 80 Quartz glass 70 Transmittance (%) Dark current (e-/pixel/s) 100 10 1 60 50 40 30 20 0.1 10 0.01 -50 -40 -20 -30 -10 0 10 20 0 100 200 300 400 500 600 700 800 900 1000 1100 1200 30 Wavelength (nm) Temperature (°C) KMPDB0256EA KMPDB0312EA Window material Type no. S11500-1007 Window material Quartz glass*13 *13: Resin sealing Device structure (conceptual drawing of top view) Thinning 23 15 20 21 13 14 2-bevel 22 H 1 signal out n 24 2 5 4 3 2 12345 4-bevel Thinning V 12 2 11 3 4 5 4 blank pixels 8 2 6-bevel n V=122 H=1024 10 9 4 blank pixels signal out 6-bevel KMPDC0364EA 4 CCD area image sensor S11500-1007 Timing chart (line binning) Integration time (Shutter has to open) Vertical binning period (Shutter has to closed) Readout period (Shutter has to closed) Tpwv 1 2 3..126 P1V 127 128← 122 + 6 (bevel) Tovr P2V, TG Tpwh, Tpws 4..1042 1043 P1H 1 2 1044 3 P2H, SG Tpwr RG OS D1 D2..D10, S1..S1024, D11..D19 D20 KMPDC0353EB P1V, P2V, TG* 14 P1H, P2H*14 SG RG TG-P1H Parameter Pulse width Rise and fall time Pulse width Rise and fall time Duty ratio Pulse width Rise and fall time Duty ratio Pulse width Rise and fall time Overlap time Symbol Tpwv Tprv, Tpfv Tpwh Tprh, Tpfh Tpws Tprs, Tpfs Tpwr Tprr, Tpfr Tovr Min. 6 10 500 10 40 500 10 40 100 5 3 Typ. 8 2000 50 2000 50 - Max. 60 60 - Unit μs ns ns ns % ns ns % ns ns μs *14: Symmetrical clock pulses should be overlapped at 50% of maximum amplitude. 5 CCD area image sensor S11500-1007 Dimensional outline (unit: mm) Window 28.6* Active area 24.58 22.4 ± 0.30 8.2* 1 22.9 ± 0.30 13 2.928 24 12 2.54 ± 0.13 44.0 ± 0.44 4.8 ± 0.49 4.4 ± 0.44 2.35 ± 0.15 3.75 ± 0.44 Photosensitive surface 3.0 1st pin index mark (24 ×) 0.5 ± 0.05 * Size of window that guarantees the transmittance in the “Spectral transmittance characteristics” graph KMPDA0264EB Pin connections Pin no. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Symbol RD OS OD OG SG P2H P1H IG2H IG1H ISH TG*15 P2V P1V SS ISV IG2V IG1V RG Function Reset drain Output transistor source Output transistor drain Output gate Summing gate Remark (standard operation) +12 V RL=22 kΩ +20 V +3 V Same pulse as P2H CCD horizontal register clock-2 CCD horizontal register clock-1 Test point (horizontal input gate-2) Test point (horizontal input gate-1) Test point (horizontal input source) Transfer gate CCD vertical register clock-2 CCD vertical register clock-1 -8 V -8 V Connect to RD Same pulse as P2V Substrate (GND) Test point (vertical input source) Test point (vertical input gate-2) Test point (vertical input gate-1) Reset gate GND Connect to RD -8 V -8 V *15: Isolation gate between vertical register and horizontal register. In standard operation, TG should be applied the same pulse as P2V. 6 CCD area image sensor S11500-1007 Precaution for use (electrostatic countermeasures) O When handling CCD sensors, always wear a wrist strap and also anti-static clothing, gloves, and shoes, etc. The wrist strap should have a protective resistor (about 1 MΩ) on the side closer to the body and be grounded properly. Using a wrist strap having no protective resistor is hazardous because you may receive an electrical shock if electric leakage occurs. O Avoid directly placing these sensors on a work bench that may carry an electrostatic charge. O Provide ground lines with the work bench and work floor to allow static electricity to discharge. O Ground the tools used to handle these sensors, such as tweezers and soldering irons. It is not always necessary to provide all the electrostatic measures stated above. Implement these measures according to the amount of damage that occurs. Element cooling/heating temperature incline rate When cooling the CCD by an externally attached cooler, set the cooler operation so that the temperature gradient (rate of temperature change) for cooling or allowing the CCD to warm back is less than 5 K/minute. Multichannel detector head C7040 Features Area scanning or line-binnng operation Readout frequency: 250 kHz Readout noise: 20 e- rms Input Master start Symbol VD1 VA1+ VA1VA2 φms Master clock φmc Supply voltage Specification +5 Vdc, 200 mA +15 Vdc, +100 mA -15 Vdc, -100 mA +24 Vdc, 30 mA HCMOS logic compatible HCMOS logic compatible, 1 MHz Information furnished by HAMAMATSU is believed to be reliable. However, no responsibility is assumed for possible inaccuracies or omissions. Specifications are subject to change without notice. No patent rights are granted to any of the circuits described herein. Type numbers of products listed in the specification sheets or supplied as samples may have a suffix “(X)” which means tentative specifications or a suffix “(Z)” which means developmental specifications. ©2010 Hamamatsu Photonics K.K. www.hamamatsu.com HAMAMATSU PHOTONICS K.K., Solid State Division 1126-1 Ichino-cho, Higashi-ku, Hamamatsu City, 435-8558 Japan, Telephone: (81) 53-434-3311, Fax: (81) 53-434-5184 U.S.A.: Hamamatsu Corporation: 360 Foothill Road, P.O.Box 6910, Bridgewater, N.J. 08807-0910, U.S.A., Telephone: (1) 908-231-0960, Fax: (1) 908-231-1218 Germany: Hamamatsu Photonics Deutschland GmbH: Arzbergerstr. 10, D-82211 Herrsching am Ammersee, Germany, Telephone: (49) 8152-375-0, Fax: (49) 8152-265-8 France: Hamamatsu Photonics France S.A.R.L.: 19, Rue du Saule Trapu, Parc du Moulin de Massy, 91882 Massy Cedex, France, Telephone: 33-(1) 69 53 71 00, Fax: 33-(1) 69 53 71 10 United Kingdom: Hamamatsu Photonics UK Limited: 2 Howard Court, 10 Tewin Road, Welwyn Garden City, Hertfordshire AL7 1BW, United Kingdom, Telephone: (44) 1707-294888, Fax: (44) 1707-325777 North Europe: Hamamatsu Photonics Norden AB: Smidesvägen 12, SE-171 41 Solna, Sweden, Telephone: (46) 8-509-031-00, Fax: (46) 8-509-031-01 Italy: Hamamatsu Photonics Italia S.R.L.: Strada della Moia, 1 int. 6, 20020 Arese, (Milano), Italy, Telephone: (39) 02-935-81-733, Fax: (39) 02-935-81-741 Cat. No. KMPD1125E04 Aug. 2010 DN 7