INTEGRATED CIRCUITS DATA SHEET SAA6579 Radio Data System (RDS) demodulator Product specification Supersedes data of January 1994 File under Integrated Circuits, IC01 1997 Feb 24 Philips Semiconductors Product specification Radio Data System (RDS) demodulator SAA6579 FEATURES GENERAL DESCRIPTION • Anti-aliasing filter (2nd order) The integrated CMOS circuit SAA6579 is an RDS demodulator. It recovers the additional inaudible RDS information which is transmitted by FM radio broadcasting. • Integrated 57 kHz band-pass filter (8th order) • Reconstruction filter (2nd order) The data signal RDDA and the clock signal RDCL are provided as outputs for further processing by a suitable decoder (microcomputer). • Clocked comparator with automatic offset compensation • 57 kHz carrier regeneration • Synchronous demodulator for 57 kHz modulated RDS signals The operational functions of the device are in accordance with the “CENELEC EN 50067”. • Selectable 4.332/8.664 MHz crystal oscillator with variable dividers • Clock regeneration with lock on biphase data rate • Biphase symbol decoder with integrate and dump functions • Differential decoder • Signal quality detector • Subcarrier output. QUICK REFERENCE DATA SYMBOL PARAMETER MIN. TYP. MAX. UNIT VDDA analog supply voltage (pin 5) 3.6 5.0 5.5 V VDDD digital supply voltage (pin 12) 3.6 5.0 5.5 V Itot total supply current − 6 − mA Vi(rms) RDS input amplitude (RMS value; pin 4) 1 − − mV VOH HIGH level output voltage for signals RDDA, RDCL, QUAL and T57 4.4 − − V VOL LOW level output voltage for signals RDDA, RDCL, QUAL and T57 − − 0.4 V Tamb operating ambient temperature −40 − +85 °C ORDERING INFORMATION PACKAGE TYPE NUMBER NAME SAA6579 DIP16 plastic dual in-line package; 16 leads (300 mil); long body SOT38-1 SAA6579T SO16 plastic small outline package; 16 leads; body width 7.5 mm SOT162-1 1997 Feb 24 DESCRIPTION 2 VERSION Philips Semiconductors Product specification Radio Data System (RDS) demodulator SAA6579 BLOCK DIAGRAM handbook, full pagewidth 82 pF 47 pF +5 V 4.332/8.664 MHz 2.2 k Ω OSCI 13 MPX signal MUX 4 330 pF ANTIALIASING FILTER 57 kHz BANDPASS (8th ORDER) OSCO VDDD 14 12 OSCILLATOR AND DIVIDER RECONSTRUCTION FILTER 0.1 µF QUALITY BIT GENERATOR 1 QUAL SCOUT 8 560 pF CIN 7 +5 V CLOCKED COMPARATOR COSTAS LOOP VARIABLE AND FIXED DIVIDER BIPHASE SYMBOL DECODER DIFFERENTIAL 2 DECODER RDDA 16 RDCL 15 T57 SAA6579 VDDA 5 VP1 0.1 µF Vref 3 REFERENCE VOLTAGE 2.2 µF CLOCK REGENERATION AND SYNC TEST LOGIC AND OUTPUT SELECTOR SWITCH 9 6 VSSA MODE Via pin MODE two different crystal frequencies can be used. MODE CRYSTAL CLOCK LOW 4.332 MHz HIGH 8.664 MHz Fig.1 Block diagram and application circuit. 1997 Feb 24 3 10 11 TEST VSSD MEH162 Philips Semiconductors Product specification Radio Data System (RDS) demodulator SAA6579 PINNING SYMBOL PIN DESCRIPTION QUAL 1 quality indication output RDDA 2 RDS data output Vref 3 reference voltage output (0.5VDDA) MUX 4 multiplex signal input VDDA 5 +5 V supply voltage for analog part VSSA 6 ground for analog part (0 V) CIN 7 subcarrier input to comparator SCOUT 8 subcarrier output of reconstruction filter MODE 9 oscillator mode/test control input TEST 10 test enable input VSSD 11 ground for digital part (0 V) VDDD 12 +5 V supply voltage for digital part OSCI 13 oscillator input OSCO 14 oscillator output T57 15 57 kHz clock signal output RDCL 16 RDS clock output handbook, halfpage handbook, halfpage QUAL 1 16 RDCL QUAL 1 16 RDCL RDDA 2 15 T57 RDDA 2 15 T57 Vref 3 MUX 4 14 OSCO Vref 3 13 OSCI MUX 4 13 OSCI SAA6579T SAA6579 VDDA 5 12 VDDD VDDA 5 12 VDDD VSSA 6 11 VSSD VSSA 6 11 VSSD CIN 7 10 TEST CIN 7 10 TEST SCOUT 8 SCOUT 8 9 MODE 9 MODE MGD685 MGD684 Fig.2 Pin configuration. 1997 Feb 24 14 OSCO Fig.3 Pin configuration. 4 Philips Semiconductors Product specification Radio Data System (RDS) demodulator SAA6579 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134); ground pins 6 and 11 connected together. SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VDDA analog supply voltage (pin 5) 0 6 V VDDD digital supply voltage (pin 12) 0 6 V Vn voltage on all pins; grounds excluded −0.5 VDDX + 0.5 V Tstg storage temperature −40 +150 °C Tamb operating ambient temperature −40 +85 °C Ves electrostatic handling for all pins except pins 9 and 10 note 1 ±300 − V note 2 +1500 −3000 V Notes 1. Equivalent to discharging a 200 pF capacitor via a 0 Ω series resistor. 2. Equivalent to discharging a 100 pF capacitor via a 1.5 kΩ series resistor. The overall data-channel-spectrum shaping of the transmitter and the receiver is approximately 100% roll-off. FUNCTIONAL DESCRIPTION The SAA6579 is a demodulator circuit for RDS applications. It contains a 57 kHz bandpass filter and a digital demodulator to regenerate the RDS data stream out of the multiplex signal (MPX). The Integrate and dump circuit performs an integration over a clock period. This results in a demodulated and valid RDS signal in form of biphase symbols being output from the integrate and dump circuit. The final stages of RDS data processing are the biphase symbol decoding and the differential decoding. After synchronization by data clock RDCL (pin 16) data appears on the RDDA output (pin 2). The output of the biphase symbol decoder is evaluated by a special circuit to provide an indication of good data (QUAL = HIGH) or corrupt data (QUAL = LOW). Filter part The MUX signal is band-limited by a second-order anti-aliasing-filter and fed through a 57 kHz band-pass filter (8th order band-pass filter with 3 kHz bandwidth) to separate the RDS signals. This filter uses switched capacitor technique and is clocked by a clock frequency of 541.5 kHz derived from the 4.332/8.664 MHz crystal oscillator. Then the signal is fed to the reconstruction filter to smooth the sampled and filtered RDS signal before it is output on pin 8. The signal is AC-coupled to the comparator (pin 7). The comparator is clocked with a frequency of 228 kHz (synchronized by the 57 kHz of the demodulator). Timing Fixed and variable dividers are applied to the 4.332/8.664 MHz crystal oscillator to generate the 1.1875 kHz RDS clock RDCL, which is synchronized by the incoming data. Which ever clock edge is considered (positive or negative going edge) the data will remain valid for 399 µs after the clock transition. The timing of data change is 4 µs before a clock change. Which clock transition (positive or negative going clock) the data change occurs in, depends on the lock conditions and is arbitrary (bit slip). Digital part The synchronous demodulator (Costas loop circuit) with carrier regeneration demodulates the internal coupled, digitized signal. The suppressed carrier is recovered from the two sidebands (Costas loop). The demodulated signal is low-pass-filtered in such a way that the overall pulse shape (transmitter and receiver) approaches a cosinusoidal form in conjunction with the following Integrate and dump circuit. During poor reception it is possible that faults in phase occur, then the clock signal stays uninterrupted, and data is constant for 1.5 clock periods. Normally, faults in phase do not occur on a cyclic basis. If however, faults in phase occur in this way, the minimum spacing between two possible faults in phase depends on the data being transmitted. The minimum spacing cannot be less than 16 clock periods. The quality bit changes only at the time of a data change. The data-spectrum shaping is split into two equal parts and handled in the transmitter and in the receiver. Ideally, the data filtering should be equal in both of these parts. 1997 Feb 24 5 Philips Semiconductors Product specification Radio Data System (RDS) demodulator SAA6579 CHARACTERISTICS VDDA = VDDD = 5 V; Tamb = 25 °C and measurements taken in Fig.1; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VDDA analog supply voltage (pin 5) VDDD digital supply voltage (pin 12) 3.6 5.0 5.5 V Itot total supply current I5 + I12 − 6 − mA Vref reference voltage (pin 3) VDDA = 5 V − 2.5 − V 3.6 5.0 5.5 V MPX input (signal before the capacitor on pin 4) Vi MPX(rms) RDS amplitude (RMS value) ∆f = ±1.2 kHz RDS; ∆f = ±3.5 kHz ARI; see Fig.5 1 − − mV Vi MPX(p-p) maximum input signal capability (peak-to-peak value) f = 57 ±2 kHz 200 − − mV f < 50 kHz 1.4 − − V f < 15 kHz 2.8 − − V f > 70 kHz 3.5 − − V R4-6 input resistance f = 0 to 100 kHz 40 − − kΩ G8-4 signal gain f = 57 kHz 17 20 23 dB Tamb = −40 to +85 °C 56.5 57.0 57.5 kHz 2.5 3.0 3.5 kHz ∆f = ±7 kHz 31 − − dB f < 45 kHz 40 − − dB f < 20 kHz 50 − − dB f > 70 kHz 40 − − dB f = 57 kHz − 26 − Ω f = 57 kHz − 1 10 mV 70 110 150 kΩ 57 kHz band-pass filter fc centre frequency B −3 dB bandwidth G stop band gain Ro(8) output resistance (pin 8) Comparator input (pin 7) Vi(rms) minimum input level (RMS value) Ri input resistance Oscillator input (pin 13) VIH HIGH level input voltage VDDD = 5.0 V 4.0 − − V VIL LOW level input voltage VDDD = 5.0 V − − 1.0 V II input current VDDD = 5.5 V − − ±1 µA 1997 Feb 24 6 Philips Semiconductors Product specification Radio Data System (RDS) demodulator SYMBOL PARAMETER CONDITIONS SAA6579 MIN. TYP. MAX. UNIT Digital demodulator and outputs QUAL, RDDA, T57, OSCO and RDCL (pins 1, 2, 14, 15 and 16) VOH HIGH level output voltage IQ = −20 µA; VDDD = 4.5 V 4.4 − − V VOL LOW level output voltage IQ = 3.2 mA; VDDD = 5.5 V − − 0.4 V fRDCL nominal clock frequency RDCL − 1187.5 − Hz ∆tRDCL jitter of RDCL − − 18 µs fT57 nominal subcarrier frequency T57 note 1 − 57.0 − kHz IO output current OSCO (pin 14) VDDD = 4.5 V; V14 = 0.4 V 1.5 − − mA VDDD = 4.5 V; V14 = 4.1 V −1.6 − − mA output current QUAL, RDDA, T57, RDCL (pins 1, 2, 15 and 16) VDDD = 4.5 V; V14 = 0.4 V 5.9 − − mA VDDD = 4.5 V; V14 = 4.1 V −5.3 − − mA 4.332 MHz crystal parameters f0 XTAL frequency − 4.332 − MHz ∆fmax maximum permitted tolerance − ±50 − 10−6 ∆fo adjustment tolerance of f0 Tamb = 25 °C − − ±20 10−6 Tamb = −40 to +85 °C − − ±25 10−6 CL load capacitance − 30 − pF Rxtal resonance resistance − − 60 Ω 8.664 MHz crystal parameters f0 XTAL frequency − 8.664 − MHz ∆fmax maximum permitted tolerance − ±50 − 10−6 ∆fo adjustment tolerance of f0 Tamb = 25 °C − − ±30 10−6 Tamb = −40 to +85 °C − − ±30 10−6 CL load capacitance − 30 − pF Rxtal resonance resistance − − 60 Ω Note 1. The signal T57 has a phase lead of 123° (±180°) relative to the ARI carrier at output SCOUT. 1997 Feb 24 7 Philips Semiconductors Product specification Radio Data System (RDS) demodulator SAA6579 handbook, full pagewidth RDCL RDDA, QUAL 4 µs 842 µs 4 µs 421 µs MEH163 Fig.4 RDS timing diagram including a phase jump. MGD683 100 handbook, full pagewidth correct blocks (%) 75 50 25 (1) 0 10−1 (2) 1 (1) RDS + ARI (BK). (2) RDS only. Fig.5 Typical RDS sensitivity. 1997 Feb 24 8 Vi (RDS signal, RMS value) (mV) 10 Philips Semiconductors Product specification Radio Data System (RDS) demodulator SAA6579 PACKAGE OUTLINES DIP16: plastic dual in-line package; 16 leads (300 mil); long body SOT38-1 ME seating plane D A2 A A1 L c e Z b1 w M (e 1) b MH 9 16 pin 1 index E 1 8 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 min. A2 max. b b1 c D (1) E (1) e e1 L ME MH w Z (1) max. mm 4.7 0.51 3.7 1.40 1.14 0.53 0.38 0.32 0.23 21.8 21.4 6.48 6.20 2.54 7.62 3.9 3.4 8.25 7.80 9.5 8.3 0.254 2.2 inches 0.19 0.020 0.15 0.055 0.045 0.021 0.015 0.013 0.009 0.86 0.84 0.26 0.24 0.10 0.30 0.15 0.13 0.32 0.31 0.37 0.33 0.01 0.087 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT38-1 050G09 MO-001AE 1997 Feb 24 EIAJ EUROPEAN PROJECTION ISSUE DATE 92-10-02 95-01-19 9 Philips Semiconductors Product specification Radio Data System (RDS) demodulator SAA6579 SO16: plastic small outline package; 16 leads; body width 7.5 mm SOT162-1 D E A X c HE y v M A Z 9 16 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 8 e detail X w M bp 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y mm 2.65 0.30 0.10 2.45 2.25 0.25 0.49 0.36 0.32 0.23 10.5 10.1 7.6 7.4 1.27 10.65 10.00 1.4 1.1 0.4 1.1 1.0 0.25 0.25 0.1 0.10 0.012 0.096 0.004 0.089 0.01 0.019 0.013 0.014 0.009 0.41 0.40 0.30 0.29 0.050 0.42 0.39 inches 0.043 0.043 0.055 0.016 0.039 0.01 0.01 Z (1) 0.9 0.4 0.035 0.004 0.016 θ Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT162-1 075E03 MS-013AA 1997 Feb 24 EIAJ EUROPEAN PROJECTION ISSUE DATE 92-11-17 95-01-24 10 o 8 0o Philips Semiconductors Product specification Radio Data System (RDS) demodulator Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 °C. SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 °C. WAVE SOLDERING This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “IC Package Databook” (order code 9398 652 90011). Wave soldering techniques can be used for all SO packages if the following conditions are observed: • A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. DIP SOLDERING BY DIPPING OR BY WAVE • The longitudinal axis of the package footprint must be parallel to the solder flow. The maximum permissible temperature of the solder is 260 °C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. • The package footprint must incorporate solder thieves at the downstream end. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 °C within 6 seconds. Typical dwell time is 4 seconds at 250 °C. REPAIRING SOLDERED JOINTS A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 °C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 °C, contact may be up to 5 seconds. REPAIRING SOLDERED JOINTS Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. SO REFLOW SOLDERING Reflow soldering techniques are suitable for all SO packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. 1997 Feb 24 SAA6579 11 Philips Semiconductors Product specification Radio Data System (RDS) demodulator SAA6579 DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 1997 Feb 24 12 Philips Semiconductors Product specification Radio Data System (RDS) demodulator NOTES 1997 Feb 24 13 SAA6579 Philips Semiconductors Product specification Radio Data System (RDS) demodulator NOTES 1997 Feb 24 14 SAA6579 Philips Semiconductors Product specification Radio Data System (RDS) demodulator NOTES 1997 Feb 24 15 SAA6579 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 547027/1200/02/pp16 Date of release: 1997 Feb 24 Document order number: 9397 750 00913