STP9NC65 STP9NC65FP N-CHANNEL 650V - 0.75Ω - 8A TO-220/TO-220FP PowerMesh™II MOSFET ■ ■ ■ ■ ■ TYPE VDSS RDS(on) ID STP9NC65 650 V < 0.90 Ω 8A STP9NC65FP 650 V < 0.90 Ω 8A TYPICAL RDS(on) = 0.75 Ω EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED NEW HIGH VOLTAGE BENCHMARK GATE CHARGE MINIMIZED 3 1 TO-220 2 TO-220FP (Available Upon Request) DESCRIPTION The PowerMESH™II is the evolution of the first generation of MESH OVERLAY™. The layout refinements introduced greatly improve the Ron*area figure of merit while keeping the device at the leading edge for what concerns swithing speed, gate charge and ruggedness. INTERNAL SCHEMATIC DIAGRAM APPLICATIONS HIGH CURRENT, HIGH SPEED SWITCHING ■ SWITH MODE POWER SUPPLIES (SMPS) ■ DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVES ■ ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value STP9NC65 VDS VDGR VGS Unit STP9NC65FP Drain-source Voltage (VGS = 0) 650 V Drain-gate Voltage (RGS = 20 kΩ) 650 V Gate- source Voltage ±30 V ID Drain Current (continuos) at TC = 25°C 8 8(*) A ID Drain Current (continuos) at TC = 100°C 5 5(*) A Drain Current (pulsed) 32 32(*) A Total Dissipation at TC = 25°C 140 40 W Derating Factor 1.12 0.32 W/°C IDM (●) PTOT dv/dt (1) Peak Diode Recovery voltage slope VISO Insulation Withstand Voltage (DC) Tstg Storage Temperature Tj Max. Operating Junction Temperature (•)Pulse width limited by safe operating area (*) Limited only by maximum temperature allowed February 2001 3.5 - V/ns 2000 V –65 to 150 °C 150 °C (1)ISD ≤8A, di/dt ≤100A/µs, V DD ≤ V(BR)DSS, Tj ≤ TJMAX. 1/9 STP9NC65/FP THERMAL DATA Rthj-case Thermal Resistance Junction-case Max TO-220 TO-220FP 0.89 3.12 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W Rthc-sink Thermal Resistance Case-sink Typ 0.5 °C/W Maximum Lead Temperature For Soldering Purpose 300 °C Tl AVALANCHE CHARACTERISTICS Symbol Parameter IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) EAS Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) Max Value Unit 8 A 850 mJ ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF Symbol Parameter Test Conditions Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 IDSS Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating IGSS Gate-body Leakage Current (VDS = 0) VGS = ±30V V(BR)DSS Min. Typ. Max. 650 Unit V VDS = Max Rating, TC = 125 °C 1 µA 50 µA ±100 nA Max. Unit ON (1) Symbol Parameter Test Conditions VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250µA RDS(on) Static Drain-source On Resistance VGS = 10V, ID = 4.5 A ID(on) On State Drain Current VDS > ID(on) x RDS(on)max, VGS = 10V Min. 2 Typ. 3 4 V 0.75 0.90 Ω 8 A DYNAMIC Symbol gfs (1) 2/9 Parameter Forward Transconductance Test Conditions VDS > ID(on) x RDS(on)max, ID = 4.5A VDS = 25V, f = 1 MHz, VGS = 0 Min. Typ. Max. Unit 10 S 1400 pF Ciss Input Capacitance Coss Output Capacitance 196 pF Crss Reverse Transfer Capacitance 31 pF STP9NC65/FP ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON Symbol td(on) tr Parameter Turn-on Delay Time Rise Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge Test Conditions Min. VDD = 325 V, ID = 4.5 A RG = 4.7Ω VGS = 10 V (see test circuit, Figure 3) VDD = 520V, ID = 9 A, VGS = 10V Typ. Max. Unit 28 ns 15 ns 44 62 nC 10.5 nC 19.5 nC SWITCHING OFF Symbol td(off) tf tr(Voff) Parameter Turn-Off Delay Time Fall Time Off-voltage Rise Time tf Fall Time tc Cross-over Time Test Conditions Min. VDD = 325V, ID = 4.5 A, RG = 4.7Ω, VGS = 10V (see test circuit, Figure 3) VDD = 520V, ID = 9 A, RG = 4.7Ω, VGS = 10V (see test circuit, Figure 5) Typ. Max. Unit 53 ns 30 ns 15 ns 12 ns 24 ns SOURCE DRAIN DIODE Symbol ISD Parameter Test Conditions Min. Typ. Source-drain Current ISDM (2) Source-drain Current (pulsed) VSD (1) Forward On Voltage ISD = 8 A, VGS = 0 trr Reverse Recovery Time Qrr Reverse Recovery Charge ISD = 9 A, di/dt = 100A/µs VDD = 100V, Tj = 150°C (see test circuit, Figure 5) IRRM Reverse Recovery Current Max. Unit 8 A 32 A 1.6 V 610 ns 5.14 µC 17 A Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Safe Operating Area for TO-220 Safe Operating Area for TO-220FP 3/9 STP9NC65/FP Thermal Impedance for TO-220 Thermal Impedance for TO-220FP Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance 4/9 STP9NC65/FP Gate Charge vs Gate-source Voltage Capacitance Variations Normalized Gate Thereshold Voltage vs Temp. Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/9 STP9NC65/FP Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuit For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/9 STP9NC65/FP TO-220 MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. MAX. A 4.40 4.60 0.173 0.181 C 1.23 1.32 0.048 0.051 D 2.40 2.72 0.094 D1 0.107 1.27 0.050 E 0.49 0.70 0.019 0.027 F 0.61 0.88 0.024 0.034 F1 1.14 1.70 0.044 0.067 F2 1.14 1.70 0.044 0.067 G 4.95 5.15 0.194 0.203 G1 2.4 2.7 0.094 0.106 H2 10.0 10.40 0.393 0.409 L2 16.4 0.645 13.0 14.0 0.511 0.551 L5 2.65 2.95 0.104 0.116 L6 15.25 15.75 0.600 0.620 L7 6.2 6.6 0.244 0.260 L9 3.5 3.93 0.137 0.154 DIA. 3.75 3.85 0.147 0.151 D1 C D A E L4 H2 G G1 F1 L2 F2 F Dia. L5 L9 L7 L6 L4 P011C 7/9 STP9NC65/FP TO-220FP MECHANICAL DATA mm DIM. MIN. inch MAX. MIN. A 4.4 TYP. 4.6 0.173 TYP. MAX. 0.181 B 2.5 2.7 0.098 0.106 D 2.5 2.75 0.098 0.108 E 0.45 0.7 0.017 0.027 F 0.75 1 0.030 0.039 F1 1.15 1.7 0.045 0.067 F2 1.15 1.7 0.045 0.067 G 4.95 5.2 0.195 0.204 G1 2.4 2.7 0.094 0.106 H 10 10.4 0.393 0.409 28.6 30.6 1.126 1.204 L4 9.8 10.6 0.385 0.417 L6 15.9 16.4 0.626 0.645 L7 9 9.3 0.354 0.366 Ø 3 3.2 0.118 0.126 L2 16 0.630 B D A E L3 L3 L6 F2 H G G1 ¯ F F1 L7 1 2 3 L2 8/9 L4 STP9NC65/FP Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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