STS9NH3LL N-channel 30 V - 0.018 Ω - 9 A - SO-8 low gate charge STripFET™ III Power MOSFET Features Type VDSS RDS(on) max ID STS9NH3LL 30 V 0.022 Ω 9A ■ Optimal RDS(on) x Qg trade-off @ 4.5 V ■ Conduction losses reduced ■ Switching losses reduced SO-8 Application ■ Switching applications Description This application specific Power MOSFET is the third generation of STMicroelectronics unique “single feature size” strip-based process. The resulting transistor shows the best trade-off between on-resistance and gate charge. When used as high and low side in buck regulators, it gives the best performance in terms of both conduction and switching losses. This is extremely important for motherboards where fast switching and high efficiency are of paramount importance. Table 1. Figure 1. Internal schematic diagram Device summary Order code Marking Package Packaging STS9NH3LL S9NH3LL SO-8 Tape & reel December 2007 Rev 3 1/13 www.st.com 13 Contents STS9NH3LL Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ............................. 6 3 Test circuit 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2/13 ................................................ 8 STS9NH3LL 1 Electrical ratings Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage (VGS = 0) 30 V VGS Gate-source voltage ±16 V ID Drain current (continuous) at TC = 25 °C 9 A ID Drain current (continuous) at TC= 100 °C 6 A Drain current (pulsed) 36 A Total dissipation at TC = 25 °C 2.5 W Single pulse avalanche energy 100 mJ Operating junction temperature Storage temperature -55 to 150 °C IDM (1) PTOT EAS (2) TJ Tstg 1. Pulse width limited by safe operating area 2. Starting TJ = 25 °C, ID = 6 A. Table 3. Thermal data Symbol Parameter Value Unit Rthj-amb(1) Thermal resistance junction-ambient max 50 °C/W 1. When mounted on 1 inch² FR-4 board, 2oz Cu (t < 10 sec.) 3/13 Electrical characteristics 2 STS9NH3LL Electrical characteristics (TCASE=25°C unless otherwise specified) Table 4. Symbol V(BR)DSS On/off states Parameter Drain-source breakdown voltage Test conditions ID = 250 µA, VGS= 0 Zero gate voltage drain current (VGS = 0) IGSS Gate body leakage current (VDS = 0) VGS = ±16 V VGS(th) Gate threshold voltage VDS= VGS, ID = 250 µA RDS(on) Static drain-source on resistance VGS= 10 V, ID= 4.5 A Symbol gfs (1) Ciss Coss Crss Qg Qgs Qgd Max. 30 1 10 µA µA ±100 nA 1 VGS= 4.5 V, ID= 4.5 A Unit V VDS = Max rating @ 125 °C V 0.018 0.020 0.022 0.025 Ω Ω Typ. Max. Unit Dynamic Parameter Test conditions Min. Forward transconductance VDS =10 V, ID = 4.5 A 8.5 S Input capacitance Output capacitance Reverse transfer capacitance VDS = 25 V, f=1 MHz, VGS=0 857 147 20 pF pF pF Total gate charge Gate-source charge Gate-drain charge VDD= 15 V, ID = 9 A VGS = 4.5 V, (see Figure 16) 1. Pulsed: pulse duration=300 µs, duty cycle 1.5% 4/13 Typ. VDS = Max rating IDSS Table 5. Min. 7.0 2.5 2.3 10 nC nC nC STS9NH3LL Electrical characteristics Table 6. Switching times Symbol Parameter td(on) tr td(off) tf Table 7. Symbol Turn-on delay time Rise time Turn-off delay time Fall time Test conditions VDD=15 V, ID= 4.5 A, RG= 4.7 Ω, VGS= 4.5 V (see Figure 15) VDD=15 V, ID= 4.5 A, RG= 4.7 Ω, VGS= 4.5 V (see Figure 15) Parameter Test conditions ISDM(1) VSD(2) Forward on voltage ISD= 4.5 A, VGS=0 Reverse recovery time Reverse recovery charge Reverse recovery current ISD= 9 A, di/dt = 100 A/µs, VDD = 15 V, Tj=150 °C trr Qrr IRRM Typ. Max. Unit 12 14.5 ns ns 23 8 ns ns Source drain diode Source-drain current Source-drain current (pulsed) ISD Min. (see Figure 17) Min. Typ. 15 5.7 0.76 Max. Unit 9 36 A A 1.5 V ns nC A 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration=300 µs, duty cycle 1.5% 5/13 Electrical characteristics STS9NH3LL 2.1 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance Figure 4. Output characteristics Figure 5. Transfer characteristics Figure 6. Transconductance Figure 7. Static drain-source on resistance 6/13 STS9NH3LL Figure 8. Electrical characteristics Gate charge vs gate-source voltage Figure 9. Capacitance variations Figure 10. Normalized gate threshold voltage vs temperature Figure 11. Normalized on resistance vs temperature Figure 12. Source-drain diode forward characteristics Figure 13. Normalized breakdown voltage vs temperature 7/13 Electrical characteristics Figure 14. Normalized on resistance vs temperature (VGS = 4.5V) 8/13 STS9NH3LL STS9NH3LL 3 Test circuit Test circuit Figure 15. Switching times test circuit for resistive load Figure 16. Gate charge test circuit Figure 17. Test circuit for inductive load Figure 18. Unclamped inductive load test switching and diode recovery times circuit Figure 19. Unclamped inductive waveform Figure 20. Switching time waveform 9/13 Package mechanical data 4 STS9NH3LL Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 10/13 STS9NH3LL Package mechanical data SO-8 MECHANICAL DATA DIM. mm. MIN. TYP A a1 inch MAX. MIN. TYP. 1.75 0.1 0.068 0.25 a2 MAX. 0.003 0.009 1.65 0.064 a3 0.65 0.85 0.025 0.033 b 0.35 0.48 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.25 0.5 0.010 0.019 D 4.8 5.0 0.188 0.196 E 5.8 6.2 0.228 c1 45 (typ.) 1.27 e e3 3.81 0.150 F 3.8 4.0 0.14 L 0.4 1.27 0.015 M S 0.244 0.050 0.6 0.157 0.050 0.023 8 (max.) 11/13 Revision history 5 STS9NH3LL Revision history Table 8. 12/13 Document revision history Date Revision Changes 24-Jul-2006 1 Initial release. 15-May-2007 2 Update on Table 2. 12-Dec-2007 3 – Inserted Figure 14: Normalized on resistance vs temperature (VGS = 4.5V) – Inserted new EAS value on Table 2. STS9NH3LL Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. 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