STMICROELECTRONICS STS5N15M3

STS5N15M3
N-channel 150 V, 45 mΩ, 5 A, SO-8
ultra low gate charge MDmesh™ III Power MOSFET
Features
Type
VDSS
RDS(on)
max
ID
STS5N15M3
150 V
< 0.057 Ω
5A
■
Low on-resistance
■
Low input capacitance and gate charge
■
Low gate input resistance
■
High dv/dt avalanche capabilities
SO-8
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Application
■
Figure 1.
Switching applications
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Internal schematic diagram
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Description
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This device is realized with the third generation of
MDmesh™ technology. This Power MOSFET
associates an improved vertical structure to the
company’s strip layout to yield one of the world’s
lowest on-resistance and gate charge. It is
therefore suitable for the most demanding high
efficiency converters.
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Table 1.
Device summary
Order code
Marking
Package
Packaging
STS5N15M3
5R15-
SO-8
Tape and reel
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June 2008
Rev 2
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www.st.com
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Contents
STS5N15M3
Contents
1
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves)
............................. 6
3
Test circuit
................................................ 8
4
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
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STS5N15M3
1
Electrical ratings
Electrical ratings
Table 2.
Absolute maximum ratings
Symbol
Parameter
Value
Unit
VDS
Drain-source voltage (VGS = 0)
150
V
VGS
Gate-source voltage
± 20
V
ID
Drain current (continuous) at TC = 25 °C
5
A
ID
Drain current (continuous) at TC=100 °C
3.2
A
IDM(1)
Drain current (pulsed)
20
A
PTOT
Total dissipation at TC = 2 5°C
2.5
W
Tstg
Storage temperature
-55 to 150
°C
Tj
Operating junction temperature
1. Pulse width limited by safe operating area
Table 3.
Symbol
Rthj-pcb (1)
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Thermal data
Parameter
Thermal resistance junction-pcb max
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1. When mounted on FR-4 board of 1 inch², 2 oz Cu, t < 10 sec
Table 4.
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Avalanche characteristics
Symbol
Parameter
(s)
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Value
Unit
50
°C/W
Max value
Unit
IAS
Avalanche current, repetitive or not-repetitive
(pulse width limited by Tj max)
2.5
A
EAS
Single pulse avalanche energy
(starting Tj = 25 °C, ID = IAS, VDD = 140 V)
1.6
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Electrical characteristics
2
STS5N15M3
Electrical characteristics
(TJ = 25 °C unless otherwise specified)
Table 5.
On/off states
Symbol
V(BR)DSS
Parameter
Drain-source breakdown
voltage
IGSS
Gate body leakage current
(VDS = 0)
VGS = ±20 V
VGS(th)
Gate threshold voltage
VDS= VGS, ID = 250 µA
RDS(on)
Static drain-source on
resistance
VGS= 10 V, ID= 2.5 A
Ciss
Coss
Crss
Qg
Parameter
Test conditions
Input capacitance
Output capacitance
Reverse transfer
capacitance
VDS =25 V, f = 1 MHz,
VGS = 0
Qgd
Rg
Gate input resistance
Qgs
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(s)
Typ.
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VDD = 75 V, ID = 5 A
VGS =10 V
Figure 14 on page 8
f=1 MHz Gate DC Bias=0
Test signal level=20 mV
open drain
Max.
150
1
10
µA
µA
±100
nA
4
V
0.057
Ω
2
0.045
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Min.
Unit
V
VDS = 150 V, @125 °C
Dynamic
Total gate charge
Gate-source charge
Gate-drain charge
Min.
VDS = 150 V,
Zero gate voltage drain
current (VGS = 0)
Symbol
4/12
ID = 1 mA, VGS= 0
IDSS
Table 6.
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Test conditions
Typ.
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Max.
Unit
1300
140
20.5
pF
pF
pF
29
3.6
14.6
nC
nC
nC
3.7
Ω
STS5N15M3
Electrical characteristics
Table 7.
Switching times
Symbol
Parameter
td(on)
tr
td(off)
tf
Table 8.
Test conditions
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Min.
Typ.
Max.
9
13
46
20
VDD= 75 V, ID= 2.5 A,
RG=4.7 Ω, VGS=10 V
Figure 13 on page 8
Unit
ns
ns
ns
ns
Source drain diode
Symbol
Max
Unit
Source-drain current
5
A
ISDM(1)
Source-drain current (pulsed)
20
A
VSD(2)
Forward on voltage
1.3
V
ISD
trr
Qrr
IRRM
Parameter
Test conditions
Typ.
ISD = 5 A, VGS = 0
ISD = 5 A,
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Figure 15 on page 8
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2. Pulsed: pulse duration=300µs, duty cycle 1.5%
110
498
9.1
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di/dt = 100 A/µs,
VR = 40 V, TJ = 150 °C
1. Pulse width limited by safe operating area
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Min
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nC
A
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Electrical characteristics
STS5N15M3
2.1
Electrical characteristics (curves)
Figure 2.
Safe operating area
Figure 3.
Thermal impedance
Figure 4.
Output characteristics
Figure 5.
Transfer characteristics
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Figure 6.
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Normalized BVDSS vs temperature
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Figure 7.
Static drain-source on resistance
STS5N15M3
Figure 8.
Electrical characteristics
Capacitance variations
Figure 9.
Figure 10. Normalized gate threshold voltage
vs temperature
Gate charge vs gate-source voltage
Figure 11. Normalized on resistance vs
temperature
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Figure 12. Source-drain diode forward
characteristics
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Test circuit
3
STS5N15M3
Test circuit
Figure 13. Switching times test circuit for
resistive load
Figure 14. Gate charge test circuit
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Figure 15. Test circuit for inductive load
Figure 16. Unclamped inductive load test
switching and diode recovery times
circuit
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Figure 17. Unclamped inductive waveform
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Figure 18. Switching time waveform
STS5N15M3
4
Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect. The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
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Package mechanical data
STS5N15M3
SO-8 MECHANICAL DATA
mm.
DIM.
MIN.
TYP
A
inch
MAX.
MIN.
0.1
0.068
0.25
a2
0.003
1.65
0.064
0.65
0.85
0.025
0.033
b
0.35
0.48
0.013
0.018
b1
0.19
0.25
0.007
0.010
C
0.25
0.5
0.010
0.019
D
4.8
5.0
0.188
0.196
E
5.8
6.2
0.228
45 (typ.)
1.27
e
e3
3.81
4.0
0.14
L
0.4
1.27
0.015
0.6
S
8 (max.)
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0.150
3.8
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0.244
0.050
F
M
10/12
0.009
a3
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MAX.
1.75
a1
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TYP.
0.157
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0.050
0.023
STS5N15M3
5
Revision history
Revision history
Table 9.
Document revision history
Date
Revision
Changes
02-Apr-2007
1
First release
25-Jun-2008
2
Modified values in Table 6: Dynamic
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STS5N15M3
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