TB6598FN/FNG TENTATIVE TOSHIBA Bi-CMOS Integrated Circuit Silicon Monolithic TB6598FN/FNG Dual Full-Bridge Driver for Stepping Motors The TB6598FN/FNG is a 2-phase bipolar stepping motor driver employing an LDMOS structure with low ON-resistance for output drive transistors. By applying four input signals (EN1, EN2, IN1, IN2), it is possible to control the rotation direction (forward/reverse) of 2-phase/1-2-phase stepper motor. It is also possible to achieve constant-current drive (PWM chopper drive). Features • Motor supply voltage: VM ≤ 15 V (max) • Control supply voltage: VCC = 2.7 V to 6 V • Output current: Iout ≤ 0.8 A (max) Weight: 0.07 g (typ.) • Low ON-resistance: 1.5 Ω (upper side + lower side typ. @ VM = 5 V) • Constant-current control (PWM chopper drive) • Standby (power-saving) mode • On-chip thermal shutdown circuit (TSD) • Compact package: SSOP-16 TB6598FNG: TB6598FNG is a Pb-free product. The following conditions apply to solderability: *Solderability 1. Use of Sn-37Pb solder bath *solder bath temperature = 230°C *dipping time = 5 seconds *number of times = once *use of R-type flux 2. Use of Sn-3.0Ag-0.5Cu solder bath *solder bath temperature=245°C *dipping time = 5 seconds *the number of times = once *use of R-type flux z z This product has a MOS structure and is sensitive to electrostatic discharge. When handling the product, ensure that the environment is protected against electrostatic discharge by using an earth strap, a conductive mat and an ionizer. Ensure also that the ambient temperature and relative humidity are maintained at reasonable levels. Install the product correctly. Otherwise, breakdown, damage and/or degradation in the product or equipment may result. 1 2006-3-6 TB6598FN/FNG Block Diagram GND VCC 5 6 13 VM EN1 8 EN2 9 IN1 10 Control Logic 3 AO1 IN2 11 Timing Logic OSC Pre-Drive H-Bridge B 1 AO2 2 RFA 12 OSC TSD 16 BO1 Timing Logic Vlim 7 Vref 4 Vref 0.6 V Pre-Drive H-Bridge B 14 BO2 Band Gap 15 RFB Some functional blocks, circuits, or constants may be omitted or simplified in the block diagram for explanatory purposes. Pin Functions Pin Name Pin No. Functional Description Remarks AO2 1 Output 2 (Ch. A) RFA 2 Winding current detection pin (Ch. A) AO1 3 Output 1 (Ch. A) Ch. A motor winding connection pin Vref 4 Internal reference voltage +0.6 V (typ.) GND 5 Ground pin VCC 6 Small-signal power supply pin VCC (ope) = 2.7 V to 5.5 V Vlim 7 Winding current setting pin Icoil (A) = Vlimit (V)/external RF (Ω) EN1 8 Enable input 1 EN2 9 Enable input 2 IN1 10 Control input 1 IN2 11 Control input 2 OSC 12 Internal oscillation frequency setting pin Connect an oscillator capacitor externally VM 13 Motor power supply pin VM (ope) = 4.5 V to 13.5 V BO2 14 Output 2 (Ch. B) Ch. B motor winding connection pin RFB 15 Winding current detection pin (Ch. B) BO1 16 Output 1 (Ch. B) Ch. A motor winding connection pin Ch. B motor winding connection pin 2 2006-3-6 TB6598FN/FNG Truth Table 1 EN1 (EN2) IN1 (IN2) AO1 (BO1) AO2 (BO2) Mode L * OFF OFF ALL OFF H L H Reverse L H L Forward H “*” indicates “don’t care.” Truth Table 2 EN1 L EN2 (Note) L L H H L H H Mode (Note) Standby Operation Note: VINL (EN1 = EN2) < = 0.5 V. Operating Description The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes. 115uA 20 uA VCC t2 1.2 V Charge ON Discharge ON 0.8 V Cosc 115 uA 20 kΩ 40 kΩ OSC Oscillator circuit t1 Vosc waveform • The internal oscillation frequency is determined by charging and discharging an external capacitor (Cosc). Vosc = 1 ∫ i dt , Cosc ∆Vosc = I× (t1 − t2)/Cosc, 1 t1 − t2 ＝ I , ∆Vosc･Cosc 1 I fosc = = , 2 (t1 − t2) 2 ･∆Vosc･Cosc 1 1 （theoretical formula）. = = 2 × 0.4/115 µA × Cosc 6.957 × 10 3 × Cosc 3 2006-3-6 TB6598FN/FNG • Chopper control The winding current flows while the output drive transistor is On. When the VRF reaches the limit voltage level (Vlimit), the comparator detects it and turns off the output drive transistor. The oscillator output is squared to generate an internal clock. The off timer starts on the edge of the internal clock and is active for two internal clocks. When the off timer stops, the PWM goes high. osc Internal clock Off timer 2-bit counter PWM output V limit Winding current *2 chop on *1 *2 *1 *2 *1 *2 *1 *1: Increase of current *2: Chopping of current The PWM control limits the winding current to a level determined by the current value (IO) as expressed in the equation below: IO = Vlimt/RNF. • PWM control function When PWM control is provided, normal operation and short brake operation are repeated. To prevent penetrating current, dead time t2 and t4 are provided in the IC. VM M M M <PWM ON> t1 <PWM ON → OFF> t2 = 400 ns (typ.) <PWM OFF> t3 RF M M <PWM OFF → ON> t4 = 400 ns (typ.) <PWM ON> t5 4 2006-3-6 TB6598FN/FNG Absolute Maximum Ratings (Ta = 25°C) Characteristics Symbol Rating VM 15 VCC 6 Input voltage VIN −0.2 to 6 V Output current IOUT 0.8 A Power supply voltage Unit Remarks V Power dissipation PD 0.78 (Note 1) Operating temperature Topr −20 to 85 °C Storage temperature Tstg −55 to 150 °C IN1, IN2, EN1 and EN2 pins W Note 1: When mounted on a glass-epoxy PCB (50 mm × 30 mm × 1.6 mm, Cu area: 40%) The absolute maximum ratings of a semiconductor device are a set of specified parameter values that must not be exceeded during operation, even for an instant. If any of these ratings are exceeded during operation, the electrical characteristics of the device may be irreparably altered, in which case the reliability and lifetime of the device can no longer be guaranteed. Moreover, any exceeding of the ratings during operation may cause breakdown, damage and/or degradation in other equipment. Applications using the device should be designed so that no maximum rating will ever be exceeded under any operating conditions. Before using, creating and/or producing designs, refer to and comply with the precautions and conditions set forth in this document. Operating Range (Ta = −20 to 85°C) Characteristics Symbol Min Typ. Max Unit Power supply voltage (VCC) VCC 2.7 3 5.5 V Power supply voltage (VM) VM 2.5 5 13.5 V Output current IOUT ⎯ ⎯ 0.6 A Limit voltage Vlimit GND ⎯ Vref V OSC frequency f osc ⎯ ⎯ 1 MHz Chopping frequency fchop 20 ⎯ 250 kHz 5 2006-3-6 TB6598FN/FNG Electrical Characteristics (unless otherwise specified, VCC = 3 V, VM = 12 V, Ta = 25°C) Characteristics Symbol ICC1 ICC2 ICC3 Test Circuit Min Typ. Max Unit 1 1ch ON EN1 = 0.8 V, EN2 = 2.0 V ⎯ 1.4 3 mA 1 2ch ON EN1 = EN2 = 2.0 V ⎯ 1.4 3 mA 1 Standby mode EN1 = EN2 = 0.5 V ⎯ 7 15 µA 1 1ch ON, Output open EN1 = 0.8 V, EN2 = 2.0 V ⎯ 1.9 3.0 1 2ch ON, Output open EN1 = EN2 = 2.0 V ⎯ 1.9 3.0 1 Standby mode EN1 = EN2 = 0.5 V ⎯ ⎯ 1 Supply current IM1 Test Condition mA IM2 IM3 Input voltage Control circuit Hysteresis voltage Input current Output saturating voltage VINH 2 2 ⎯ VCC + 0.2 VINL1 2 −0.2 ⎯ 0.8 VINL2 2 Standby mode −0.2 ⎯ 0.5 VIN (HIS) ⎯ (Design target value) ⎯ 0.2 ⎯ IINH 2 VIN = 3 V 5 15 30 µA IINL 2 VIN = GND ⎯ ⎯ 1 µA 0.3 0.4 3 IO = 0.2 A ⎯ Vsat (U + L) IO = 0.6 A ⎯ 0.9 1.2 Output constant-current detection level VRF Reference voltage Vref Reference voltage current capacity Iref Input current at winding current setting pin µA IIN (limit) V V 4 RRF = 0.1 Ω, Vref = 0.6 V 0.565 0.6 0.635 V 5 No load 0.57 0.6 0.63 V 5 Source (∆Vref = 50 mV) ⎯ ⎯ 100 µA 6 Vlimit = GND ⎯ ⎯ 1 µA ⎯ ⎯ 1 ⎯ ⎯ 1 IL (U) 7 IL (L) 7 VF (U) 8 IO = 0.6 A ⎯ 1 1.2 VF (L) 9 IO = 0.6 A ⎯ 1 1.2 f osc 10 Cosc = 220 pF 430 530 630 kHz Capacitor charge current IC1 11 Vosc = 0 V ⎯ 115 ⎯ µA Capacitor discharge current IC2 11 Vosc = 2 V ⎯ 115 ⎯ µA Thermal shutdown circuit operating temperature TSD ⎯ 170 ⎯ °C ⎯ 20 ⎯ °C Output leakage current Diode forward voltage Oscillation frequency Thermal shutdown hysterisis ∆TSD VM = 15 V ⎯ µA V (Design target value) ⎯ 6 2006-3-6 TB6598FN/FNG Test Circuit 1: ICC1, ICC2, ICC3, IM1, IM2, IM3 1 AO2 BO1 16 2 RFA RFB 15 3 AO1 BO2 14 IM ICC 5 GND OSC 12 6 VCC IN2 11 7 Vlim IN1 10 8 EN1 EN2 9 0.8 V, 2.0 V, 0.5 V 2.0 V, 2.0 V, 0.5 V A 1Ω VM 13 12 V 1Ω 4 Vref 3.0 V A ICC1, IM1: EN1 = 0.8 V, EN2 = 2.0 V ICC2, IM2: EN1 = 2.0 V, EN2 = 2.0 V ICC3, IM3: EN1 = 0.5 V, EN2 = 0.5 V 7 2006-3-6 TB6598FN/FNG RFB 15 3 AO1 BO2 14 VM 13 OSC 12 6 VCC IN2 11 7 Vlim IN1 10 8 EN1 EN2 9 100 kΩ IINL 5 GND VINL 3.0 V 1Ω 4 Vref 8 A A IINH 2 RFA VINH BO1 16 1Ω 1 AO2 100 kΩ VB02 100 kΩ VB01 100 kΩ VA02 12 V 100 kΩ VA01 100 kΩ 100 kΩ 100 kΩ Test Circuit 2: VINH, VINL1, VINL2, IINH, IINL 2006-3-6 TB6598FN/FNG 2 RFA RFB 15 3 AO1 BO2 14 4 Vref VM 13 OSC 12 6 VCC IN2 11 7 Vlim IN1 10 8 EN1 EN2 9 1 AO2 BO1 16 2 RFA RFB 15 3 AO1 BO2 14 3V 5 GND V VO (Note1) BO1 16 12 V V 1 AO2 RL (Note2) RL (Note2) VO (Note1) Test Circuit 3: VSAT (U + L) Note1: VSAT (U + L) =12 − VO Note2: Calibrate IO to 0.2 A / 0.6 A by RL. Test Circuit 4: VRF 4 Vref 1Ω V VM 13 5 GND OSC 12 6 VCC IN2 11 7 Vlim IN1 10 8 EN1 EN2 9 9 12 V 1Ω 220 pF V 5 mH 1Ω 1Ω 5 mH 2006-3-6 TB6598FN/FNG 1 AO2 BO1 16 2 RFA RFB 15 3 AO1 BO2 14 4 Vref OSC 12 6 VCC IN2 11 7 Vlim IN1 10 8 EN1 EN2 9 12 V 5 GND 220 pF VM 13 3V 100 µA V 0.1 µF SW (Note) Vref Test Circuit 5: Vref, Iref Note: 1. Vref: SW = OFF 2. Iref: The Vref voltage descent at the time of SW = ON checks below 50 mV. Test Circuit 6: IIN (limit) 1 AO2 BO1 16 2 RFA RFB 15 3 AO1 BO2 14 4 Vref OSC 12 6 VCC IN2 11 7 Vlim IN1 10 8 EN1 EN2 9 12 V 5 GND 3V A VM 13 10 2006-3-6 TB6598FN/FNG RFB 15 3 AO1 BO2 14 4 Vref A A 15 V 2 RFA IL (U) BO1 16 A IL (L) 1 AO2 IL (U) IL (U) A A IL (L) A IL (L) A IL (U) A IL (L) Test Circuit 7: IL (U), IL (L) VM 13 220 pF 5 GND OSC 12 6 VCC IN2 11 7 Vlim IN1 10 8 EN1 EN2 9 1 AO2 BO1 16 2 RFA RFB 15 3 AO1 BO2 14 V 0.6 A Test Circuit 8: VF (U) 4 Vref 0.6 A VM 13 5 GND OSC 12 6 VCC IN2 11 7 Vlim IN1 10 8 EN1 EN2 9 11 V 2006-3-6 TB6598FN/FNG Test Circuit 9: VF (L) 1 AO2 BO1 16 2 RFA RFB 15 3 AO1 BO2 14 0.6 A 0.6 A V VF (L) 4 Vref V VF (L) VM 13 5 GND OSC 12 6 VCC IN2 11 7 Vlim IN1 10 8 EN1 EN2 9 1 AO2 BO1 16 2 RFA RFB 15 3 AO1 BO2 14 Test Circuit 10: fOSC 4 Vref 6 VCC IN2 11 7 Vlim IN1 10 8 EN1 EN2 9 F.C 12 V OSC 12 3V 5 GND 220 pF VM 13 12 2006-3-6 TB6598FN/FNG RFB 15 3 AO1 BO2 14 4 Vref 5 GND OSC 12 6 VCC IN2 11 7 Vlim IN1 10 8 EN1 EN2 9 13 A A 0.65 V VM 13 1.35 V 2 RFA IC2 BO1 16 IC1 1 AO2 12 V Test Circuit 11: IC1, IC2 2006-3-6 TB6598FN/FNG Application Circuit Example 3V 3 V to 5 V VDD (Note 1) VM (Note 1) VM VCC AO1 M AO2 EN1 RFA EN2 MCU IN1 TB6598FNG BO1 IN2 M BO2 RFB GND GND Vref Vlim OSC (Note 1) (Note 1) Note 1: Noise suppression capacitors and oscillator capacitors should be connected as close as possible to the IC. Note 2: Utmost care is necessary in the design of the output, VCC, VM, and GND lines since the IC may be destroyed by short-circuiting between outputs, air contamination faults, or faults due to improper grounding, or by short-circuiting between contiguous pins. 14 2006-3-6 TB6598FN/FNG Package Dimensions Weight: 0.07 g (typ.) 15 2006-3-6 TB6598FN/FNG Notes on Contents 1. Block Diagrams Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for explanatory purposes. 2. Equivalent Circuits The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes. 3. Timing Charts Timing charts may be simplified for explanatory purposes. 4. Application Circuits The application circuits shown in this document are provided for reference purposes only. Thorough evaluation is required, especially at the mass production design stage. Toshiba does not grant any license to any industrial property rights by providing these examples of application circuits. 5. Test Circuits Components in the test circuits are used only to obtain and confirm the device characteristics. These components and circuits are not guaranteed to prevent malfunction or failure from occurring in the application equipment. IC Usage Considerations Notes on handling of ICs [1] The absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even for a moment. Do not exceed any of these ratings. Exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. [2] Use an appropriate power supply fuse to ensure that a large current does not continuously flow in case of over current and/or IC failure. The IC will fully break down when used under conditions that exceed its absolute maximum ratings, when the wiring is routed improperly or when an abnormal pulse noise occurs from the wiring or load, causing a large current to continuously flow and the breakdown can lead smoke or ignition. To minimize the effects of the flow of a large current in case of breakdown, appropriate settings, such as fuse capacity, fusing time and insertion circuit location, are required. [3] If your design includes an inductive load such as a motor coil, incorporate a protection circuit into the design to prevent device malfunction or breakdown caused by the current resulting from the inrush current at power ON or the negative current resulting from the back electromotive force at power OFF. IC breakdown may cause injury, smoke or ignition. Use a stable power supply with ICs with built-in protection functions. If the power supply is unstable, the protection function may not operate, causing IC breakdown. IC breakdown may cause injury, smoke or ignition. [4] Do not insert devices in the wrong orientation or incorrectly. Make sure that the positive and negative terminals of power supplies are connected properly. Otherwise, the current or power consumption may exceed the absolute maximum rating, and exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. In addition, do not use any device that is applied the current with inserting in the wrong orientation or incorrectly even just one time. 16 2006-3-6 TB6598FN/FNG Points to remember on handling of ICs (1) Thermal Shutdown Circuit Thermal shutdown circuits do not necessarily protect ICs under all circumstances. If the thermal shutdown circuits operate against the over temperature, clear the heat generation status immediately. Depending on the method of use and usage conditions, such as exceeding absolute maximum ratings can cause the thermal shutdown circuit to not operate properly or IC breakdown before operation. (2) Heat Radiation Design In using an IC with large current flow such as power amp, regulator or driver, please design the device so that heat is appropriately radiated, not to exceed the specified junction temperature (TJ) at any time and condition. These ICs generate heat even during normal use. An inadequate IC heat radiation design can lead to decrease in IC life, deterioration of IC characteristics or IC breakdown. In addition, please design the device taking into considerate the effect of IC heat radiation with peripheral components. (3) Back-EMF When a motor rotates in the reverse direction, stops or slows down abruptly, a current flow back to the motor’s power supply due to the effect of back-EMF. If the current sink capability of the power supply is small, the device’s motor power supply and output pins might be exposed to conditions beyond maximum ratings. To avoid this problem, take the effect of back-EMF into consideration in system design. 17 2006-3-6 TB6598FN/FNG 18 2006-3-6