TDA1175P LOW-NOISE VERTICAL DEFLECTION SYSTEM FEATURES SUMMARY ■ COMPLETE VERTICAL DEFLECTION SYSTEM ■ LOW NOISE ■ SUITABLE FOR HIGH DEFINITION MONITORS ■ ESD PROTECTED Figure 1. Package DESCRIPTION The TDA1175P is a monolithic integrated circuit in POWERDIP16 plastic package. It is intended for use in black and white and colour TV receivers. Low-noise makes this device particularly suitable for use in monitors. The functions incorporated are: synchronization circuit, oscillator and ramp generator, high power gain amplifier, flyback generator, voltage regulator. POWERDIP16 (Plastic Package) Figure 2. Pin Connections RAMP OUTPUT 1 16 RAMP GENERATOR SUPPLY VOLTAGE 2 15 COMPENSATION FLYBACK 3 14 AMP. INPUT GROUND 4 13 GROUND GROUND 5 12 GROUND POWER AMPLIFIER OUTPUT POWER AMPLIFIER SUPPLY VOLTAGE REGULATED VOLTAGE 6 11 OSCILLATOR 7 10 SYNC. INPUT 8 9 HEIGHT ADJUSTMENT REV. 2 April 2004 1/13 TDA1175P Figure 3. Block Diagram + VS C4 FREQ P1 8 TDA1175P 11 DA 3 2 7 C9 RH VOLTAGE REGULATOR OSCILLATOR FLYBACK GENERATOR POWER AMPLIFIER 6 C1 RG YOKE C8 SYNC CIRCUIT 10 SYNC RAMP GENERATOR BUFFER STAGE 15 PREAMPLIFIER C5 4 5 12 13 9 16 1 LINEARITY 14 RD C2 TABS HEIGHT C7 RE P2 RA P3 RB RC C3 C6 RF Table 1. Absolute Maximum Ratings Symbol VS V6, V7 V14 Parameter Value Unit Supply Voltage at Pin 2 35 V Flyback Peak Voltage 60 V + 10 – 0.5 V 2 A Power Amplifier Input Voltage IO Output Peak Current (non repetitive) at t = 2ms IO Output Peak Current at f = 50Hz, t ≤ 10µs 2.5 A IO Output Peak Current at f = 50Hz, t > 10µs 1.5 A I3 Pin 3 DC Current at V6 < V2 100 mA I3 Pin 3 Peak to Peak Flyback Current for f = 50Hz, tfly ≤ 1.5ms 1.8 A I10 Pin 10 Current ± 20 mA Power Dissipation at at Ttab = 90°C 4.3 W 1 W – 40 to 150 °C Value Unit PTOT TSTG , Tj Power Dissipation at Tamb = 70°C (free air) (1) Storage and Junction Temperature Table 2. Thermal Data Symbol Parameter Rth (j-tab) Thermal Resistance Junction-pin Max. 12 °C/W Rth (j-amb) Thermal Resistance Junction-ambient Max. 80 °C/W(1) Note: 1. Obtained with tabs soldered to printed circuit with minimized copper area. 2/13 TDA1175P ELECTRICAL CHARACTERISTICS (Tamb = 25°C, unless otherwise specified) Table 3. DC CHARACTERISTICS (Refer to the test circuits, VS = 35V) Symbol Parameter Test Conditions Min. Typ. Max. Unit Fig. I2 Pin 2 Quiescent Current I3 = 0 7 14 mA 5 I7 Pin 7 Quiescent Current I6 = 0 8 17 mA 5 –I11 Oscillator Bias Current V11 = 1V 0.1 1 µA 4 –I14 Amplifier Input Bias Current V14 = 1V 1 10 µA 5 –I16 Ramp Generator Bias Current V16 = 0 0.02 0.3 µA 4 –I16 Ramp Generator Current I9 = 20µA, V16 = 0 20 21.5 µA 5 Ramp Generator Non-linearity ∆V16 = 0 to 12V, I9 = 20µA 0.2 1 % 5 35 V ∆I 16 ---------I 16 18.5 VS Supply Voltage Range V1 Pin 1 Saturation Voltage to Ground I1 = 1mA 1 14 V V3 Pin 3 Saturation Voltage to Ground I3 = 10mA 1.5 2.5 V 4 V6 Qiuescent output Voltage Vs = 10V, R1 = 1kΩ, R2 = 1kΩ 4.1 4.4 4.7 V 4 Vs = 35V, R1 = 3kΩ, R2 = 1kΩ 8.2 8.8 9.4 V 4 – I6 = 0.1A 0.9 1.2 V 6 – I6 = 0.8A 1.8 2.2 V 6 I6 = 0.1A 1.4 2.1 V 7 I6 = 0.8A 2.8 3.1 V 7 6.5 6.7 6.9 V 5 6.6 6.8 7 V 5 1 2 mV/V 5 2.27 2.35 V V6L V6H Output Saturation Voltage to Ground Output Saturation Voltage to Supply 10 V8 Regulated Voltage at Pin 8 V9 Regulated Voltage at Pin 9 I9 = 20µA ∆V 8 ∆V 9 ------------ ------------∆V S ∆V S Regulated Voltage Drift with Supply Voltage ∆Vs = 10 to 35V Amplifier Input Reference Voltage V10 ≤ 0.4V V14 2.20 3/13 TDA1175P Table 4. AC CHARACTERISTICS (Refer to the AC test circuit, VS = 22V, f = 50Hz) Symbol Test Conditions Min. IY = 1APP Typ. Max. Unit Fig. mA 8 mA 8 IS Supply Current I10 Sync. Input Current (positive or negative) V6 Flyback Voltage IY = 1APP 45 V 8 tfly Flyback Time IY = 1APP 0.7 ms 8 Peak to Peak Output Noise Pin 11 Connected to GND 18 mVpp 8 Free Running Frequency (P1 + R1) = 300kΩ C9 = 0.1 µF Hz 8 Hz 8 Hz 8 VON fO fOPER 140 0.5 Operating Frequency Range 36 2 30 43.5 10 120 Synchronization Range I10 = 0.5mA, C9 = 0.1µF (P1+R1) = 300kΩ ∆f ---------∆V S Frequency Drift with Supply Voltage VS = 10 to 35V 0.00 5 Hz/V ∆f -----------∆T ab Frequency Drift with tab Temperature Ttab = 40 to 120°C 0.01 Hz/°C ∆f 4/13 Parameter 14 8 8 TDA1175P DC TEST CIRCUITS Figure 6. Figure 4. 3 + VS +VS I3 V3 7 2 2 I4 7 10 TDA1175P 6 11 11 9 I8 1κΩ - I9 1V 1V 16 TABS TDA1175P 6 R1 14 14 TABS V4 - I12 V4L R2 8V 4V Figure 5. Figure 7. +VS I2 + VS I5 2 TDA1175P 8 V6 - I12 11 14 TDA1175P - I10 1V 6 TABS TABS V7 V4H 7 14 9 16 100kΩ 11 2 7 I4 1V 5/13 TDA1175P Figure 8. AC Test and Application Circuit for Large Screen B/W TV Set 10Ω/20mH/1APP VS = 22V 0.1µF 470µF 1N4001 TABS 100µF 7 0.1µF 2 3 3.3Ω 6 220kΩ 100pF 5.6kΩ Yoke Ry = 10Ω Ly = 20mH 560Ω* 15 SYNC. INPUT 1000µF 470pF 10 5.6kΩ TDA1175P 14 10µF 22kΩ 1 11 P1 100kΩ R1 100kΩ 8 9 16 47kΩ 220kΩ 1.8kΩ 100kΩ 0.1µF C9 0.1µF 120kΩ 1Ω 910kΩ 0.1µF *on application only 6/13 TDA1175P Figure 9. Typical Application Circuit for VGA Monitor (RY = 10Ω, LY = 20mH, IY = 0.8APP) C9 C10 560pF 3.3nF R12 R13 3.3Ω 220kΩ C11 0.1µF VS (26V) C1 0.1µF C2 1000µF 35V 15 D1 1N4007 2 C8 22µF 35V 6 Y1 YOKE TDA1175P R8 10 1 11 P3 50kΩ C4 0.15µF 8 9 16 R2 82kΩ 4 5 C6 0.1µF 12 13 47kΩ R9 5.1kΩ V.LIN R6 56kΩ R10 0.82Ω R4 1MΩ P1 100kΩ C7 0.1µF V.FREQ R3 240kΩ R14 220µF 1/2W 14 3 R5 200kΩ C12 470µF 50V R7 27kΩ 7 C3 100µF 35V R1 3.3kΩ C5 1.8µF R11 2.7kΩ P2 220kΩ V. SIZE 7/13 TDA1175P Figure 10. P.C. Board and Components Layout of the Circuit of Figure 9 (1:1 scale) V-SIZE V-FREQ C9 C12 R12 C18 C6 P2 R18 P1 R6 R9 C2 R11 R2 GND C4 VS C11 R1 R10 C1 D1 C8 Y1 R8 C3 IC1 R14 P3 R7 V.LIN R8 R4 C7 C6 R6 R Table 5. Bill of Material Item Qty Reference Part 1 4 C1, C6, C7, C11 0.1µF 2 1 C2 1000µF 35V 3 1 C3 100µF 35V 4 1 C4 0.15µF 5 1 C5 1.8nF 6 1 C8 22µF 35V 7 1 C9 3.3nF 8 1 C10 560pF 9 1 C12 470µF 50V 10 1 D1 1N4007 11 1 IC1 TDA1175P 12 1 P1 100kΩ POT 13 1 P2 220kΩ POT 14 1 P3 50kΩPOT 8/13 Item Qty Reference Part 15 1 R1 3.3kΩ 16 1 R2 82kΩ 17 1 R3 240kΩ 18 1 R4 1MΩ 19 1 R5 200kΩ 20 1 R6 56kΩ 21 1 R7 27kΩ 22 1 R8 47kΩ 23 1 R9 5.1kΩ 24 1 R10 0.82Ω 25 1 R11 2.7kΩ 26 1 R12 220kΩ 27 1 R13 3.3Ω 28 1 R14 220Ω 1/2W 29 1 Y1 YOKE TDA1175P MOUNTING INSTRUCTION The Rth (j-a) can be reduced by soldering the GND pins to a suitable copper area of the printed circuit board (Figure 11) or to an external heatsink (Figure 12). The diagram of Figure 13 shows the maximum dissipable power Ptot and the Rth (j-a) as a function of the side "I" of two equal square copper areas having a thicknessof 35µ (1.4 mils). During soldering the pins temperature must not exceed 260°C and the soldering time must not be longer than 12 seconds. The external heatsink or printed circuit copper area must be connected to electrical ground. Figure 11. Example of P.C. Board Copper Area COPPER AREA 35µ THICKNESS Figure 13. Maximum Power Dissipation and Junction-ambient Thermal Resistance versus "I" G-3558 Ptot (W) Rth (˚C/W) 4 80 Rth j - amb 3 60 2 40 Ptot (Tamb = 70˚C) 1 20 0 0 0 10 20 30 40 l (mm) Figure 14. Maximum Allowable Power Dissipation versus Ambient Temperature G-3559/2 Ptot WIT S-3181 4 H IT H IN W P.C. BOARD AT FINI HE TE H NK Rt SINK NG VI EAT HA 2 h = 25 17.0 mm 3 SI Figure 12. External Heatsink Mounting Example AIR /W EE ˚C FR 1 0 11.9 mm -50 0 50 100 Tamb(˚C) 38.0 mm S-3474 9/13 TDA1175P PART NUMBERING Table 6. Order Codes 10/13 Part Number Package Temperature Range TDA1175P POWERDIP16 -25 to 85 °C TDA1175P PACKAGE MECHANICAL Table 7. POWERDIP16 - Mechanical Data millimeters inches Symbol Typ a1 0.51 B 0.85 Min Max Typ Max 0.020 1.4 b 0.033 0.5 b1 Min 0.055 0.020 0.38 0.5 D 0.015 0.020 20 0.787 E 8.8 0.346 e 2.54 0.100 e3 17.78 0.700 F 7.1 0.280 i 5.1 0.201 L 3.3 Z 0.130 1.27 0.050 I b1 L a1 Figure 15. POWERDIP16 - Package Dimensions b Z B e E e3 D 9 1 8 F 16 Note: Drawing is not to scale 11/13 TDA1175P REVISION HISTORY Table 8. Revision History 12/13 Date Revision Description of Changes August-1995 1 First Issue 14-Apr-2004 2 Stylesheet update. No content change. TDA1175P Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners © 2004 STMicroelectronics - All rights reserved STMicroelectronics GROUP OF COMPANIES Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States www.st.com 13/13