TDA7435 DIGITALLY CONTROLLED AUDIO PROCESSOR WITH LOUDSPEAKERS EQUALIZER INPUT - FOUR HIGH PASS CHANNELS - TWO AUX STEREO CHANNELS VOLUME CONTROL IN 1dB STEPS WITH GAIN UP TO 15dB SOFT MUTE AND DIRECT MUTE FOUR AUXILIARY CHANNELS: - TWO SPEAKERS CONTROL IN 1dB STEP - TWO CHANNELS MULTIPLEXED WITH THE HIGH PASS CHANNELS ALL FUNCTIONS PROGRAMMABLE VIA SERIAL I2 CBUS DESCRIPTION The audioprocessor TDA7435 is an upgrade of the TDA731X audioprocessor family. Due to a highly linear signal processing, using CMOS-switching techniques instead of standard bipolar multipliers, very low distortion and very low noise are obtained. SO28 ORDERING NUMBER: TDA7435D A second programmable high pass filtering provides the loudspeakers equalization. The soft Mute function is implemented andcan be activated in two ways: 1 Via serial bus (Mute byte, bit D0) 2 Directly on pin 3 through an I/O line of the microcontroller Very low DC stepping is obtained by use of a BICMOS technology. BLOCK DIAGRAM CSM HP FL 1 HP FL 2 HP FR 1 HP FR 2 HP RL 1 HP RL 2 HP RR 1 HP RR 2 AUX 2 IN L AUX 2 IN R 3 22 21 HP FILTER 27 26 25 2 I C BUS 20 19 17 SOFT MUTE VCC 23 SUPPLY 28 12 11 HP FILTER 13 16 15 24 10 HP FILTER 18 14 HP FILTER 9 6 MUX 7 1 AUX 1 IN L AUX 1 IN R SDA SCL DGND AGND CREF 2 GAIN 0-15dB/1dB step 8 5 ATTENUATOR 0/-79dB 4 ATTENUATOR 0/-79dB OUT REF HP FL OUT HP FR OUT HP RL OUT HP RR OUT AUX 2 OUT L AUX 2 OUT R AUX 1 OUT L AUX 1 OUT R D96AU437A November 1996 1/10 TDA7435 ABSOLUTE MAXIMUM RATINGS Symbol VS Parameter Operating Supply Voltage Value Unit 10.5 V Tamb Operating Ambient Temperature -40 to 85 °C Tstg Storage Temperature Range -55 to 150 °C PIN CONNECTION AUX 1 IN L 1 28 VCC AUX 1 IN R 2 27 SDA CSM 3 26 SCL AUX 1 OUT R 4 25 DGND AUX 1 OUT L 5 24 AGND AUX 2 IN L 6 23 CREF AUX 2 IN R 7 22 HP FL 1 AUX 2 OUT R 8 21 HP FL 2 AUX 2 OUT L 9 20 HP FR 1 HP FL OUT 10 19 HP FR 2 HP FR OUT 11 18 HP RL 1 OUT REF 12 17 HP RL 2 HP RL OUT 13 16 HP RR 1 HP RR OUT 14 15 HP RR 2 D96AU438 THERMAL DATA Symbol Rth j-amb Parameter Thermal Resistance Junction-pins Value Unit 65 °C/W QUICK REFERENCE DATA Symbol Parameter VS Supply Voltage VCL Max. input signal handling Min. Typ. Max. 6 9 10.2 2.1 2.6 THD Total Harmonic Distortion V = 1Vrms f = 1KHz 0.01 S/N Signal to Noise Ratio 106 SC Channel Separation f = 1KHz Input Gain AUX1 1dB step 2/10 V Vrms 0.08 % dB 80 0 Unit dB 15 dB TDA7435 ELECTRICAL CHARACTERISTICS (VS = 9V; RL = 10KΩ; Rg = 50Ω; Tamb = 25°C; all gains = 0dB; f = 1KHz. Refer to the test circuit, unless otherwise specified.) Symbol Parameter Test Condition Min. Typ. Max. Unit 24 33 42 KΩ 2.1 2.6 70 80 INPUT STAGE: AUX1 RI VCL SI Input Resistance Clipping Level d ≤ 0.3% Input Separation VRMS dB GI MIN Minimum Input Gain -0.75 0 0.75 dB GI MAX Maximum Input Gain 13.75 15 16.25 dB Gstep Step Resolution 0.5 1.0 1.5 dB -1.25 0 1.25 dB Adiacent Gain Steps 0.5 10 mV GIIN to GIMAX 2.5 Ea Set Error VDC DC Steps mV SPEAKER ATTENUATORS - AUX 1 C RANGE Astep Control Range Step Resolution 79 Av = 0 to -40dB 0.5 1 80 105 Output Mute Attenuation Data Word = 1111XXXX EA Attenuation Set Error Av = 0 to -40dB VDC DC Steps Adjacent Attenuation Steps AMUTE 0 dB 1.5 dB 1.5 dB 3 mV dB AUDIO OUTPUT (Pin 4 - 5, 8 - 9, 10 - 14) Vclip Clipping Level RL Output Load Resistance d = 0.3% 2.1 2 2.6 Vrms RO Output Impedance 20 30 100 Ω VDC DC Voltage Level 3.5 3.8 4.1 V Input Resistance 24 33 42 KΩ KΩ STAGE: AUX2 RI Clipping Level 2.1 2.6 SI Input Separation 70 80 GI Gain -0.75 0 80 100 120 170 VCL Input Mute Vrms dB 0.75 dB dB STAGE: HP FILTER R1 Resistance at pin HP1 R2 Resistance at pin HP2 HIGHPASS BYTE D3 = 1 VCL Clipping Level d ≤ 0.3% XXXX1XXX 220 KΩ 1 MΩ 2.1 2.6 Vrms 40 50 dB SOFT MUTE AMUTE Mute Attenuation TDON ON Delay Time TDOFF OFF Current CCSM = 22nF; 0 to -20dB; I = IMAX 0.7 1 2 ms CCSM = 22nF; 0 to -20dB; I = IMIN 10 30 50 ms VCSM = 0V; I = IMAX 60 160 µA VCSM = 0V; I = IMIN 110 210 µA 3/10 TDA7435 ELECTRICAL CHARACTERISTICS (continued) Symbol Parameter Test Condition Min. Soft Mute Threshold VTHSM RINT Pullup Resistor (pin 3) VSMH (pin 3) Level High VSML (pin 3) Level Low (note 2) Typ. Max. Unit 2.3 V 100 KΩ 3.5 V Soft Mute Active 1 V GENERAL VCC Supply Voltage 6 9 10.2 V ICC Supply Current 7 11 15 mA PSRR Power Supply Rejection Ratio f = 1KHz e NO Output Noise Output Muted (B = 20 to 20kHz flat) 60 S/N Signal to Noise Ratio SC Channel Separation All Gains 0dB (B = 20 to 20kHz flat) d dB µV 5 All Gains = 0dB; VO = 1Vrms 15 106 70 VIN =1V Distortion 70 3.5 80 0.01 µV dB dB 0.08 % BUS INPUTS VIL Input Low Voltage V lN Input High Voltage 1 IlN Input Current VIN = 0.4V VO Output Voltage SDA Acknowledge IO = 1.6mA V 3 -5 V 5 µA 0.4 V Note 1: WIN represents the MUTE programming bit pair D6, D5 for the zero crossing window threshold Note 2: Internall pullup resistor to Vs/2; ”LOW” = softmute active Figure 1: HP Filter. 56K 18.7K 9.3K 7.6K 56K 4.3K 3.5K 52.5K + 100nF HP2 100nF HP1 6.2K 3.5K 2.1K 3.8K 4.6K 9.3K 28K R1 = EQUIVALENT RESISTANCE AT PIN HP1 R2 = EQUIVALENT RESISTANCE AT PIN HP2 28K D96AU439 4/10 TDA7435 I2C BUS INTERFACE Data transmission from microprocessor to the TDA7435 and viceversa takes place thru the 2 wires I2C BUS interface, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage must be externally connected). Data Validity As shown in fig. 2, the data on the SDA line must be stable during the high period of the clock. The HIGH and LOW state of the data line can only change when the clock signal on the SCL line is LOW. Start and Stop Conditions As shown in fig.3 a start condition is a HIGH to LOW transition of the SDA line while SCL is HIGH. The stop condition is a LOW to HIGH transition of the SDA line while SCL is HIGH. A STOP conditions must be sent before each START condition. Byte Format Every byte transferred to the SDA line must con- tain 8 bits. Each byte must be followed by an acknowledge bit. The MSB is transferred first. Acknowledge The master (µP) puts a resistive HIGH level on the SDA line during the acknowledge clock pulse (see fig. 4). The peripheral (audioprocessor) that acknowledges has to pull-down (LOW) the SDA line during the acknowledge clock pulse, so that the SDA line is stable LOW during this clock pulse. The audioprocessor which has been addressed has to generate an acknowledge after the reception of each byte, otherwise the SDA line remains at the HIGH level during the ninth clock pulse time. In this case the master transmitter can generate the STOP information in order to abort the transfer. Transmission without Acknowledge Avoiding to detect the acknowledge of the audioprocessor, the µP can use a simplier transmission: simply it waits one clock without checking the slave acknowledging, and sends the new data. This approach of course is less protected from misworking and decreases the noise immunity. Figure 2: Data Validity on the I2CBUS Figure 3: Timing Diagram of I2CBUS 2 Figure 4: Acknowledge on the I CBUS 5/10 TDA7435 SOFTWARE SPECIFICATION Interface Protocol The interface protocol comprises: A start condition (s) A chip address byte,(the LSB bit determines CHIP ADDRESS SUBADDRESS MSB S 1 LSB 0 0 0 1 0 read/write transmission) A subaddress byte. A sequence of data (N-bytes + acknowledge) A stop condition (P) MSB 1 R/W ACK X X DATA 1 to DATA n LSB X I MSB X A2 A1 A0 ACK LSB DATA ACK P ACK = Acknowledge S = Start P = Stop I = Auto Increment X = Not used MAX CLOCK SPEED 500kbits/s AUTO INCREMENT If bit I in the subaddress byte is set to ”1”, the autoincrement of the subaddress is enabled SUBADDRESS (receive mode) MSB LSB X X X I X D1 D0 0 0 0 Mux & Gain 0 0 1 Mute 0 1 0 Speaker Attenuator AUX 1 L 0 1 1 Speaker Attenuator AUX 1 R 1 0 0 High Pass Filter FL 1 0 1 High Pass Filter FR 1 1 0 High Pass Filter RL 1 1 1 High Pass Filter RR TRANSMITTED DATA Send Mode MSB X LSB X X X X SM X X SM = Soft mute activated (HIGH active) X = Not used The transmitted data is automatically updated after each ACK. Transmission can be repeated without new chipaddress. 6/10 FUNCTION D2 TDA7435 DATA BYTE SPECIFICATION MUX & GAIN MSB LSB D7 D6 D5 D4 FUNCTION D3 D2 D1 D0 0 0 0 0 0dB 0 0 0 1 1dB 0 0 1 0 2dB 0 0 1 1 3dB 0 1 0 0 4dB 0 1 0 1 5dB 0 1 1 0 6dB 0 1 1 1 7dB 1 0 0 0 8dB 1 0 0 1 9dB 1 0 1 0 10dB 1 0 1 1 11dB 1 1 0 0 12dB 1 1 0 1 13dB 1 1 1 0 14dB 1 1 1 1 15dB AUX 1 Input Gain AUX 2 Output Selection 0 0 High Pass Filter Front 0 1 High Pass Filter Rear 1 0 Aux 2 Input 1 1 Mute Mute MSB D7 LSB D6 D5 D4 D3 D2 FUNCTION D1 D0 0 0 Soft mute - SLOW SLOPE 0 1 Soft mute - FAST SLOPE 0 Soft mute ON 1 Soft mute OFF 0 0 AUX 1 Input Mute Enabled 1 0 AUX 1 Input Mute Disabled 7/10 TDA7435 Speaker MSB D7 LSB D6 D5 D4 D3 D2 D1 AUX 1 L, R D0 -1dB STEPS 0 0 0 0dB 0 0 1 -1dB 0 1 0 -2dB 0 1 1 -3dB 1 0 0 -4dB 1 0 1 -5dB 1 1 0 -6dB 1 1 1 -7dB -8dB STEPS 0 0 0 0 0dB 0 0 0 1 -8dB 0 0 1 0 -16dB 0 0 1 1 -24dB 0 1 0 0 -32dB 0 1 0 1 -40dB 0 1 1 0 -48dB 0 1 1 1 -56dB 1 0 0 0 -64dB 1 0 0 1 -72dB 1 0 0 1 0 1 1 1 1 MUTE HIGH PASS FILTERS MSB D7 LSB D6 D5 D4 D3 D2 D1 D0 FL, FR, RL, RR 2nd order HP Filter Mode (C1 = C2 = 100nF) 0 0 0 0 fc = 40Hz 0 0 0 1 fc = 60Hz 0 0 1 0 fc = 80Hz 0 0 1 1 fc = 100Hz 0 1 0 0 fc = 120Hz 0 1 0 1 fc = 150Hz 0 1 1 0 fc = 180Hz 0 1 1 1 fc = 220Hz First order HP Flat Mode 1 8/10 fc = 9Hz TDA7435 SO28 PACKAGE MECHANICAL DATA mm DIM. MIN. TYP. A inch MAX. MIN. TYP. 2.65 MAX. 0.104 a1 0.1 0.3 0.004 0.012 b 0.35 0.49 0.014 0.019 b1 0.23 0.32 0.009 0.013 C 0.5 0.020 c1 45° (typ.) D 17.7 18.1 0.697 0.713 E 10 10.65 0.394 0.419 e 1.27 0.050 e3 16.51 0.65 F 7.4 7.6 0.291 0.299 L 0.4 1.27 0.016 0.050 S 8° (max.) 9/10 TDA7435 Purchase of I2C Components of SGS-THOMSON Microlectronics, conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specifications as defined by Philips. Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as criticalcomponents in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. 1996 SGS-THOMSON Microelectronics – Printed in Italy – All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. 10/10