TLV2371-Q1, TLV2372-Q1, TLV2374-Q1
FAMILY OF 550-μA/Ch 3-MHz RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS
SGLS244A − MAY 2004 − REVISED JUNE 2008
D
D
D
D
D
D
D
D
D
D
Operational Amplifier
Qualified for Automotive Applications
Rail-To-Rail Input/Output
Wide Bandwidth . . . 3 MHz
High Slew Rate . . . 2.4 V/μs
Supply Voltage Range . . . 2.7 V to 16 V
Supply Current . . . 550 μA/Channel
Input Noise Voltage . . . 39 nV/√Hz
Input Bias Current . . . 1 pA
Specified Temperature Range
−40°C to 125°C . . . Automotive Grade
Ultrasmall Packaging
− 5 Pin SOT-23 (TLV2371)
− 8 Pin MSOP (TLV2372)
−
+
description
The TLV237x single supply operational amplifiers provide rail-to-rail input and output capability. The TLV237x
takes the minimum operating supply voltage down to 2.7 V over the extended automotive temperature range
while adding the rail-to-rail output swing feature. The TLV237x also provides 3-MHz bandwidth from only
550 μA. The maximum recommended supply voltage is 16 V, which allows the devices to be operated from (±8
V supplies down to ±1.35 V) a variety of rechargeable cells.
The CMOS inputs enable use in high-impedance sensor interfaces, with the lower voltage operation making
an ideal alternative for the TLC227x in battery-powered applications. The rail-to-rail input stage further
increases its versatility. The TLV237x is the seventh member of a rapidly growing number of RRIO products
available from Texas Instruments and it is the first to allow operation up to 16-V rails with good ac performance.
The 2.7-V operation makes the TLV237x compatible with Li-Ion powered systems and the operating supply
voltage range of many micro-power microcontrollers available today including Texas Instruments’ MSP430.
SELECTION OF SIGNAL AMPLIFIER PRODUCTS†
DEVICE
TLV237x
TLC227x
VIO
(μV)
Iq/Ch
(μA)
IIB (pA)
GBW
(MHz)
SR
(V/μs)
SHUTDOWN
RAILTORAIL
SINGLES/DUALS/QUADS
2.7−16
500
550
1
3
2.4
Yes
I/O
S/D/Q
4−16
300
1100
1
2.2
3.6
—
O
D/Q
2.7−16
500
550
1
3
2.4
—
O
S/D/Q
TLC27x
3−16
1100
675
1
1.7
3.6
—
—
S/D/Q
TLV246x
2.7−6
150
550
1300
6.4
1.6
Yes
I/O
S/D/Q
TLV247x
2.7−6
250
600
2
2.8
1.5
Yes
I/O
S/D/Q
TLV244x
2.7−10
300
725
1
1.8
1.4
—
O
D/Q
TLV27x
†
VDD (V)
Typical values measured at 5 V, 25°C
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright © 2008, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
TLV2371-Q1, TLV2372-Q1, TLV2374-Q1
FAMILY OF 550-μA/Ch 3-MHz RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS
SGLS244A − MAY 2004 − REVISED JUNE 2008
FAMILY PACKAGE TABLE{
PACKAGE TYPES}
NUMBER OF
CHANNELS
SOIC
TLV2371
1
TLV2372
2
TLV2374
4
DEVICE
SOT-23
TSSOP
MSOP
8
5
—
—
8
—
—
8
14
—
14
—
UNIVERSAL
EVM BOARD
See the EVM
Selection Guide
(SLOU060)
†
For the most current package and ordering information, see the Package Option Addendum at
the end of this document, or see the TI web site at http://www.ti.com.
‡ Package
drawings,
thermal
data,
and
symbolization
are
available
at
http://www.ti.com/packaging.
TLV2371 AVAILABLE OPTIONS
PACKAGED DEVICES
†
TA
VIOMAX AT
25°C
−40°C to 125°C
4.5 mV
SOT-23
SMALL OUTLINE
(D)
(DBV)
TLV2371QDRQ1
TLV2371QDBVRQ1†
SYMBOL
Product Preview
TLV2372 AVAILABLE OPTIONS
PACKAGED DEVICES
VIOMAX AT
25°C
TA
−40°C to 125°C
†
4.5 mV
MSOP
SMALL OUTLINE
(D)
(DGK)
TLV2372QDRQ1
TLV2372QDGKRQ1†
SYMBOL
Product Preview
TLV2374 AVAILABLE OPTIONS
PACKAGED DEVICES
2
TA
VIOMAX AT
25°C
−40°C to 125°C
4.5 mV
POST OFFICE BOX 655303
SMALL OUTLINE
(D)
TLV2374QDRQ1
• DALLAS, TEXAS 75265
TSSOP
(PW)
TLV2374QPWRQ1
TLV2371-Q1, TLV2372-Q1, TLV2374-Q1
FAMILY OF 550-μA/Ch 3-MHz RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS
SGLS244A − MAY 2004 − REVISED JUNE 2008
TLV237x PACKAGE PINOUTS(1)
TLV2371
DBV PACKAGE
(TOP VIEW)
OUT
1
GND
2
IN+
3
5
4
TLV2371
D PACKAGE
(TOP VIEW)
VDD
NC
IN −
IN +
GND
1
8
2
7
3
6
4
5
TLV2372
D OR DGK PACKAGE
(TOP VIEW)
NC
VDD
OUT
NC
1OUT
1IN −
1IN +
GND
1
8
2
7
3
6
4
5
VDD
2OUT
2IN −
2IN+
IN −
TLV2374
D OR PW PACKAGE
(TOP VIEW)
1OUT
1IN −
1IN+
VDD
2IN+
2IN −
2OUT
1
14
2
13
3
12
4
11
5
10
6
9
7
8
4OUT
4IN −
4IN+
GND
3IN+
3IN −
3OUT
NC − No internal connection
(1) SOT−23 may or may not be indicated
TYPICAL PIN 1 INDICATORS
Pin 1
Printed or
Molded Dot
Pin 1
Stripe
Pin 1
Bevel Edges
POST OFFICE BOX 655303
Pin 1
Molded ”U” Shape
• DALLAS, TEXAS 75265
3
TLV2371-Q1, TLV2372-Q1, TLV2374-Q1
FAMILY OF 550-μA/Ch 3-MHz RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS
SGLS244A − MAY 2004 − REVISED JUNE 2008
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16.5 V
Differential input voltage, VID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± VDD
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.2 V to VDD + 0.2 V
Input current range, II . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 10 mA
Output current range, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 100 mA
Package thermal impedance, θJA (see Notes 2 and 3): D (8-pin) package . . . . . . . . . . . . . . . . . . . . . 176°C/W
D (14-pin) package . . . . . . . . . . . . . . . . . 122.3°C/W
D (16-pin) package . . . . . . . . . . . . . . . . . 114.7°C/W
DBV (5-pin) package . . . . . . . . . . . . . . . . 324.1°C/W
DGK (8-pin) package . . . . . . . . . . . . . . . 259.96°C/W
PW (14-pin) package . . . . . . . . . . . . . . . . 173.6°C/W
Operating free-air temperature range, TA: Q suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 125°C
Maximum junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to GND.
2. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) − TA)/θJA. Selecting the maximum of 150°C can affect reliability.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions
Single supply
Supply voltage
voltage, VDD
Split supply
Common-mode input voltage range, VICR
MIN
MAX
2.7
16
±1.35
±8
V
0
VDD
V
2
V
125
°C
Turnon voltage level, V(ON), relative to GND pin voltage
Turnoff voltage level, V(OFF), relative to GND pin voltage
Operating free-air temperature, TA
4
0.8
Q-suffix
POST OFFICE BOX 655303
−40
• DALLAS, TEXAS 75265
UNIT
V
TLV2371-Q1, TLV2372-Q1, TLV2374-Q1
FAMILY OF 550-μA/Ch 3-MHz RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS
SGLS244A − MAY 2004 − REVISED JUNE 2008
electrical characteristics at specified free-air temperature, VDD = 2.7 V, 5 V, and 15 V (unless
otherwise noted)
dc performance
PARAMETER
TEST CONDITIONS
TA
MIN
25°C
VIO
Input offset voltage
αVIO
Offset voltage drift
VO = VDD/2
/2,
VIC = VDD/2,
/2
RS = 50 Ω
VIC = 0 to VDD−1.35
1.35 V,
RS = 50 Ω
7V
VDD = 2
2.7
VIC = 0 to VDD,
RS = 50 Ω,
CMRR
Common mode rejection ratio
Common-mode
VIC = 0 to VDD−1.35
1.35 V,
RS = 50 Ω,
VDD = 5 V
VIC = 0 to VDD,
RS = 50 Ω,
VIC = 0 to VDD−1.35
1.35 V,
RS = 50 Ω,
VDD = 15 V
VDD = 2
2.7
7V
AVD
Large signal differential voltage
Large-signal
amplification
VO(PP) = VDD/2,
RL = 10 kΩ
VDD = 5 V
VDD = 15 V
MAX
2
4.5
6
Full range
25°C
VIC = 0 to VDD,
RS = 50 Ω
TYP
50
Full range
49
25°C
53
Full range
54
25°C
55
Full range
54
25°C
58
Full range
57
25°C
64
Full range
63
25°C
67
Full range
66
25°C
95
Full range
76
25°C
80
Full range
82
25°C
77
Full range
79
mV
V/°C
μV/°C
2
25°C
UNIT
68
70
72
dB
80
82
84
106
110
dB
83
input characteristics
PARAMETER
TEST CONDITIONS
TA
25°C
IIO
Input offset current
IIB
Input bias current
ri(d)
Differential input resistance
CIC
Common-mode input capacitance
VDD = 15 V,
VO = VDD/2
VIC = VDD/2,
MIN
TYP
1
125°C
25°C
1
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
UNIT
60
500
125°C
f = 21 kHz
MAX
pA
60
500
pA
25°C
1000
GΩ
25°C
8
pF
5
TLV2371-Q1, TLV2372-Q1, TLV2374-Q1
FAMILY OF 550-μA/Ch 3-MHz RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS
SGLS244A − MAY 2004 − REVISED JUNE 2008
electrical characteristics at specified free-air temperature, VDD = 2.7 V, 5 V, and 15 V (unless
otherwise noted) (continued)
output characteristics
PARAMETER
TEST CONDITIONS
VDD = 2
2.7
7V
VIC = VDD/2, IOH = −1
1 mA
VID = 1 V
VDD = 5 V
VDD = 15 V
VOH
High level output voltage
High-level
VDD = 2
2.7
7V
VIC = VDD/2, IOH = −5
5 mA
VID = 1 V
VDD = 5 V
VDD = 15 V
TA
MIN
TYP
25°C
2.55
2.58
Full range
2.48
25°C
4.9
Full range
4.85
25°C
14.92
Full range
14.9
25°C
1.88
Full range
1.42
25°C
4.58
Full range
4.44
25°C
14.7
Full range
14.6
25°C
VDD = 2
2.7
7V
VDD = 5 V
VOL
Low level output voltage
Low-level
VDD = 5 V
VDD = 15 V
4.68
14.8
0.15
0.22
Full range
0.1
0.15
0.05
Full range
0.08
0.1
0.52
Full range
0.7
V
1.15
25°C
VIC = VDD/2, IOL = 5 mA
VID = 1 V
V
2
0.05
25°C
VDD = 2
2.7
7V
14.96
Full range
25°C
VDD = 15 V
UNIT
4.93
0.1
25°C
VIC = VDD/2, IOL = 1 mA
VID = 1 V
MAX
0.28
Full range
0.4
0.54
25°C
0.19
Full range
0.3
0.35
power supply
PARAMETER
IDD
Supply current (per channel)
TEST CONDITIONS
VO = VDD/2
/2,
6
Supply voltage rejection ratio
(ΔVDD /ΔVIO)
VDD = 2.7 V to 15 V,
No load
POST OFFICE BOX 655303
MIN
TYP
MAX
VDD = 2.7 V
25°C
470
560
VDD = 5 V
25°C
550
660
25°C
750
900
VDD = 15 V
PSRR
TA
VIC = VDD /2,
• DALLAS, TEXAS 75265
Full range
UNIT
μA
1200
25°C
70
Full range
65
80
dB
TLV2371-Q1, TLV2372-Q1, TLV2374-Q1
FAMILY OF 550-μA/Ch 3-MHz RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS
SGLS244A − MAY 2004 − REVISED JUNE 2008
electrical characteristics at specified free-air temperature, VDD = 2.7 V, 5 V, and 15 V (unless
otherwise noted) (continued)
dynamic performance
PARAMETER
UGBW
Unity gain bandwidth
TEST CONDITIONS
RL = 2 kΩ,
CL = 10 pF
TA
2.4
VDD = 5 V to 15 V
25°C
3
25°C
Slew rate at unity gain
VO(PP) = VDD/2,
CL = 50 pF,
pF
RL = 10 kΩ
VDD = 5 V
VDD = 15 V
φm
ts
TYP
25°C
VDD = 2
2.7
7V
SR
MIN
VDD = 2.7 V
1.4
Full range
MHz
V/ s
V/μs
1
25°C
1.4
Full range
1.2
25°C
1.9
Full range
1.4
UNIT
2
2.4
V/ s
V/μs
2.1
V/ s
V/μs
Phase margin
RL = 2 kΩ,
CL = 100 pF
25°C
65°
Gain margin
RL = 2 kΩ,
CL = 10 pF
25°C
18
VDD = 2.7 V,
V(STEP)PP = 1 V, AV = −1,
RL = 2 kΩ
CL = 10 pF,
0.1%
VDD = 5 V, 15 V,
V(STEP)PP = 1 V, AV = −1,
RL = 2 kΩ
CL = 47 pF,
0.1%
Settling time
MAX
dB
2.9
μs
25°C
2
noise/distortion performance
PARAMETER
THD + N
TEST CONDITIONS
TA
AV = 100
0.18%
VDD = 5 V, 5 V,
VO(PP) = VDD/2 V,
RL = 2 kΩ, f = 10 kHz
AV = 1
0.02%
AV = 10
AV = 10
In
Equivalent input noise current
25°C
25
C
25°C
25
C
AV = 100
UNIT
0.05%
0.09%
0.5%
39
25°C
f = 10 kHz
f = 1 kHz
POST OFFICE BOX 655303
MAX
0.02%
f = 1 kHz
Equivalent input noise voltage
TYP
VDD = 2.7 V,
VO(PP) = VDD/2 V,
RL = 2 kΩ, f = 10 kHz
Total harmonic distortion plus noise
Vn
MIN
AV = 1
25°C
• DALLAS, TEXAS 75265
35
0.6
nV/√Hz
fA /√Hz
7
TLV2371-Q1, TLV2372-Q1, TLV2374-Q1
FAMILY OF 550-μA/Ch 3-MHz RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS
SGLS244A − MAY 2004 − REVISED JUNE 2008
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
VIO
Input offset voltage
vs Common-mode input voltage
CMRR
Common-mode rejection ratio
vs Frequency
4
Input bias and offset current
vs Free-air temperature
5
VOL
Low-level output voltage
vs Low-level output current
6, 8, 10
VOH
High-level output voltage
vs High-level output current
7, 9, 11
VO(PP)
Peak-to-peak output voltage
vs Frequency
12
IDD
Supply current
vs Supply voltage
13
PSRR
Power supply rejection ratio
vs Frequency
14
AVD
Differential voltage gain & phase
vs Frequency
15
Gain-bandwidth product
vs Free-air temperature
16
vs Supply voltage
17
vs Free-air temperature
18
19
SR
Slew rate
φm
Phase margin
vs Capacitive load
Vn
Equivalent input noise voltage
vs Frequency
20
Voltage-follower large-signal pulse response
21, 22
Voltage-follower small-signal pulse response
23
Inverting large-signal response
24, 25
Inverting small-signal response
26
Crosstalk
8
1, 2, 3
vs Frequency
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
27
TLV2371-Q1, TLV2372-Q1, TLV2374-Q1
FAMILY OF 550-μA/Ch 3-MHz RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS
SGLS244A − MAY 2004 − REVISED JUNE 2008
TYPICAL CHARACTERISTICS
INPUT OFFSET VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
INPUT OFFSET VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
1000
800
600
400
200
0
1000
VDD = 5 V
TA = 25 °C
800
600
400
200
0
−200
−200
0.4
0.8
1.2
1.6
2
0
VICR − Common-Mode Input Voltage − V
100
VDD = 5 V, 15 V
80
VDD = 2.7 V
40
20
100 k
10 k
250
200
150
100
50
0
−40 −25 −10 5
1M
TA = 70°C
TA = 25°C
0.80
TA = 0°C
0.40
0
1 2 3 4 5 6 7 8 9 10 11 12
IOH − High-Level Output Current − mA
Figure 7
1.60
1.20
TA = 70 °C
TA = 25 °C
0.80
0.40
4.50
4
3.50
TA = 125 °C
TA = 70 °C
3
2.50
TA = 25 °C
2
1.50
1
TA = 0 °C
TA = 40 °C
2 4 6 8 10 12 14 16 18 20 22 24
IOL − Low-Level Output Current − mA
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
5
VDD = 5 V
TA = 0 °C
TA = −40 °C
0.50
0
0
TA = 125 °C
Figure 6
V OH − High-Level Output Voltage − V
TA = 125°C
14 15
2
0
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
VOL − Low-Level Output Voltage − V
TA =−40°C
12
0
20 35 50 65 80 95 110 125
5
2.40
10
VDD = 2.7 V
2.40
Figure 5
VDD = 2.7 V
8
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
TA − Free-Air Temperature − °C
2.80
6
2.80
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
1.20
4
Figure 3
VDD = 2.7 V, 5 V and 15 V
VIC = VDD/2
Figure 4
1.60
2
VICR − Common-Mode Input Voltage −V
300
f − Frequency − Hz
2
0
0
−50
0
1k
200
INPUT BIAS/OFFSET CURRENT
vs
FREE-AIR TEMPERATURE
I IB / I IO − Input Bias / Offset Current − pA
120
100
400
Figure 2
COMMON-MODE REJECTION RATIO
vs
FREQUENCY
10
600
1
2
3
4
5
VICR − Common-Mode Input Voltage − V
Figure 1
60
VDD =15 V
TA = 25 °C
800
−200
2.4 2.7
VOL − Low-Level Output Voltage − V
0
CMRR − Common-Mode Rejection Ratio − dB
V IO − Input Offset Voltage − μV
VDD = 2.7 V
TA = 25°C
V IO − Input Offset Voltage − μV
V IO − Input Offset Voltage − μV
1000
V OH − High-Level Output Voltage − V
INPUT OFFSET VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
VCC = 5 V
4.50
TA = −40°C
4
TA = 0°C
3.50
3
2.50
TA = 25°C
2
1.50
TA = 70°C
1
TA = 125°C
0.50
0
0 5 10 15 20 25 30 35 40 45 50 55 60 65 70
IOL − Low-Level Output Current − mA
Figure 8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
0
5
10
15
20
25
30
35
40
45
IOH − High-Level Output Current − mA
Figure 9
9
TLV2371-Q1, TLV2372-Q1, TLV2374-Q1
FAMILY OF 550-μA/Ch 3-MHz RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS
SGLS244A − MAY 2004 − REVISED JUNE 2008
TYPICAL CHARACTERISTICS
12
TA =70°C
10
TA =25°C
8
TA =0°C
6
TA =−40°C
4
2
15
14
VDD = 15 V
12
TA = −40°C
V O(PP) − Peak-to-Peak Output Voltage − V
VDD = 15 V
TA =125°C
V OH − High-Level Output Voltage − V
VOL − Low-Level Output Voltage − V
15
14
PEAK-TO-PEAK OUTPUT VOLTAGE
vs
FREQUENCY
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
10
TA = 0°C
8
6
TA = 25°C
4
TA = 70°C
TA = 125°C
2
0
0
0
0
20 40 60 80 100 120 140 160
IOL − Low-Level Output Current − mA
20
40
60
80
VDD = 2.7 V
100
AV = 1
VIC = VDD / 2
TA = 70°C
0.7
0.6
0.5
0.4
TA = 25°C
0.3
TA = 0°C
0.2
TA = −40°C
0.1
0
120
TA = 25°C
100
VDD = 5 V, 15 V
80
VDD = 2.7 V
60
40
20
0
10
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
VCC − Supply Voltage − V
100
1k
180
100
135
Phase
40
0
Gain
−45
20
−90
VDD=5 Vdc
RL=2 kΩ
CL=10 pF
TA=25°C
1k
Phase − °
45
100
4
90
60
−40
10
1M
−135
10 k
100 k 1 M
−180
10 M
f − Frequency − Hz
GAIN BANDWIDTH PRODUCT
vs
FREE-AIR TEMPERATURE
GBWP − Gain Bandwidth Product − MHz
120
−20
100 k
Figure 14
DIFFERENTIAL VOLTAGE GAIN AND PHASE
vs
FREQUENCY
0
10 k
f − Frequency − Hz
Figure 13
80
10 k
POWER SUPPLY REJECTION RATIO
vs
FREQUENCY
TA = 125°C
0.8
1k
3.5
VDD = 15 V
3
2.5
2
VDD = 5 V
VDD = 2.7 V
1.5
1
0.5
0
−40 −25 −10 5
20 35 50 65 80 95 110 125
TA − Free-Air Temperature − °C
Figure 16
Figure 15
POST OFFICE BOX 655303
100 k
f − Frequency − Hz
Figure 12
PSRR − Power Supply Rejection Ratio − dB
I DD − Supply Current − mA/Ch
VDD = 5 V
Figure 11
1
AVD − Differential Voltage Gain − dB
AV = −10
RL = 2 kΩ
CL = 10 pF
TA = 25°C
THD = 5%
10
100 120 140 160
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
10
VDD = 15 V
IOH − High-Level Output Current − mA
Figure 10
0.9
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
• DALLAS, TEXAS 75265
1M
10 M
TLV2371-Q1, TLV2372-Q1, TLV2374-Q1
FAMILY OF 550-μA/Ch 3-MHz RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS
SGLS244A − MAY 2004 − REVISED JUNE 2008
TYPICAL CHARACTERISTICS
SLEW RATE
vs
FREE-AIR TEMPERATURE
PHASE MARGIN
vs
CAPACITIVE LOAD
3.5
3
100
SR−
SR+
1
AV = 1
RL = 10 kΩ
CL = 50 pF
TA = 25°C
0.5
8.5
10.5
12.5
SR+
1.5
VDD = 5 V
AV = 1
RL = 10 kΩ
CL = 50 pF
VI = 3 V
1
0
−40 −25 −10 5
14.5
Rnull = 100
60
50
40
Rnull = 0
30
Rnull = 50
20
10
0
20 35 50 65 80 95 110 125
10
TA − Free-Air Temperature − °C
VCC − Supply Voltage −V
100
CL − Capacitive Load − pF
Figure 18
Figure 17
1000
Figure 19
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
VOLTAGE-FOLLOWER LARGE-SIGNAL
PULSE RESPONSE
V − Input Voltage − V
I
100
VDD = 2.7, 5, 15 V
TA = 25°C
90
70
80
70
60
50
4
3
2
1
VDD = 5 V
AV = 1
RL = 2 kΩ
CL = 10 pF
VI = 3 VPP
TA = 25°C
VI
0
4
40
3
30
2
20
1
VO
10
0
0
10
100
1k
10 k
f − Frequency − Hz
100 k
0
2
VOLTAGE-FOLLOWER LARGE-SIGNAL
PULSE RESPONSE
12
9
6
3
VO
0
0
2
4
6
8
10 12 14 16 18
V − Input Voltage − mV
I
VI
0
V − Output Voltage − V
O
9
VDD = 15 V
AV = 1
RL = 2 kΩ
CL = 10 pF
VI = 9 VPP
TA = 25°C
8
10 12 14 16 18
VOLTAGE-FOLLOWER SMALL-SIGNAL
PULSE RESPONSE
12
3
6
Figure 21
Figure 20
6
4
t − Time − μs
0.12
0.08
0.04
VI
0
VDD = 5 V
AV = 1
RL = 2 kΩ
CL = 10 pF
VI = 100 mVPP
TA = 25°C
0.08
0.04
VO
0
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8
t − Time − μs
t − Time − μs
Figure 22
Figure 23
POST OFFICE BOX 655303
0.12
• DALLAS, TEXAS 75265
V − Output Voltage − mV
O
6.5
Hz
4.5
V n − Equivalent Input Noise Voltage − nV/
2.5
2
0.5
0
80
SR−
2.5
Phase Margin − °
SR − Slew Rate − V/ μs
1.5
V − Input Voltage − V
I
SR − Slew Rate − V/ μs
2
VDD = 5 V
RL= 2 kΩ
TA = 25°C
AV = Open Loop
90
3
2.5
V − Output Voltage − V
O
SLEW RATE
vs
SUPPLY VOLTAGE
11
TLV2371-Q1, TLV2372-Q1, TLV2374-Q1
FAMILY OF 550-μA/Ch 3-MHz RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS
SGLS244A − MAY 2004 − REVISED JUNE 2008
TYPICAL CHARACTERISTICS
INVERTING LARGE-SIGNAL RESPONSE
VDD = 5 V
AV = 1
RL = 2 kΩ
CL = 10 pF
VI = 3 VPP
TA = 25°C
2
1
0
3
2
1
0
VO
0
2
4
6
8
10
12
14
12
9
VDD = 15 V
AV = −1
RL = 2 kΩ
CL = 10 pF
VI = 9 Vpp
TA = 25°C
6
3
0
6
3
0
16
0
2
4
6
8
10
12
14
16
t − Time − μs
Figure 25
Figure 24
CROSSTALK
vs
FREQUENCY
INVERTING SMALL-SIGNAL RESPONSE
0
VDD = 2.7, 5, & 15 V
VI = VDD/2
AV = 1
RL = 2 kΩ
TA = 25°C
−20
0.10
0
−40
VI
0.1
VO
0.05
0
0
0.5 1 1.5 2 2.5 3 3.5 4 4.5
Crosstalk − dB
VDD = 5 V
AV = −1
RL = 2 kΩ
CL = 10 pF
VI = 100 mVpp
TA = 25°C
0.05
V O − Output Voltage − V
V I − Input Voltage − V
9
VO
t − Time − μs
−60
−80
Crosstalk in Shutdown
−100
−120
Crosstalk
−140
10
t − Time − μs
100
1k
10 k
f − Frequency −Hz
Figure 27
Figure 26
12
VI
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
100 k
V O − Output Voltage − V
VI
3
V I − Input Voltage − V
4
VO − Output Voltage − V
V − Input Voltage − V
I
INVERTING LARGE-SIGNAL RESPONSE
TLV2371-Q1, TLV2372-Q1, TLV2374-Q1
FAMILY OF 550-μA/Ch 3-MHz RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS
SGLS244A − MAY 2004 − REVISED JUNE 2008
APPLICATION INFORMATION
rail-to-rail input operation
The TLV237x input stage consists of two differential transistor pairs, NMOS and PMOS, that operate together
to achieve rail-to-rail input operation. The transition point between these two pairs can be seen in Figure 1
through Figure 3 for a 2.7-V, 5-V, and 15-V supply. As the common-mode input voltage approaches the positive
supply rail, the input pair switches from the PMOS differential pair to the NMOS differential pair. This transition
occurs approximately 1.35 V from the positive rail and results in a change in offset voltage due to different device
characteristics between the NMOS and PMOS pairs. If the input signal to the device is large enough to swing
between both rails, this transition results in a reduction in common-mode rejection ratio (CMRR). If the input
signal does not swing between both rails, it is best to bias the signal in the region where only one input pair is
active. This is the region in Figure 1 through Figure 3 where the offset voltage varies slightly across the input
range and optimal CMRR can be achieved. This has the greatest impact when operating from a 2.7-V supply
voltage.
driving a capacitive load
When the amplifier is configured in this manner, capacitive loading directly on the output decreases the device’s
phase margin, leading to high frequency ringing or oscillations. Therefore, for capacitive loads of greater than
10 pF, it is recommended that a resistor be placed in series (RNULL) with the output of the amplifier, as shown
in Figure 28. A minimum value of 20 Ω should work well for most applications.
RF
RG
RNULL
−
Input
Output
+
CLOAD
VDD/2
Figure 28. Driving a Capacitive Load
offset voltage
The output offset voltage, (VOO) is the sum of the input offset voltage (VIO) and both input bias currents (IIB) times
the corresponding gains. The schematic and formula in Figure 29 can be used to calculate the output offset
voltage.
RF
IIB−
RG
+
−
VI
IIB+
V
OO
+V
IO
ǒ ǒ ǓǓ
1)
R
R
F
G
VO
+
RS
"I
IB)
R
S
ǒ ǒ ǓǓ
1)
R
R
F
G
"I
IB–
R
F
Figure 29. Output Offset Voltage Model
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
13
TLV2371-Q1, TLV2372-Q1, TLV2374-Q1
FAMILY OF 550-μA/Ch 3-MHz RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS
SGLS244A − MAY 2004 − REVISED JUNE 2008
APPLICATION INFORMATION
general configurations
When receiving low-level signals, limiting the bandwidth of the incoming signals into the system is often
required. The simplest way to accomplish this is to place an RC filter at the noninverting terminal of the amplifier
(see Figure 30).
RG
RF
VDD/2
−
VO
+
VI
R1
C1
f
V
O +
V
I
ǒ
1)
R
R
F
G
–3dB
Ǔǒ
+
1
2pR1C1
Ǔ
1
1 ) sR1C1
Figure 30. Single-Pole Low-Pass Filter
If even more attenuation is needed, a multiple pole filter is required. The Sallen-Key filter can be used for this
task. For best results, the amplifier should have a bandwidth that is 8 to 10 times the filter frequency bandwidth.
Failure to do this can result in phase shift of the amplifier.
C1
+
_
VI
R1
R1 = R2 = R
C1 = C2 = C
Q = Peaking Factor
(Butterworth Q = 0.707)
R2
f
C2
RG
RF
RG =
VDD/2
Figure 31. 2-Pole Low-Pass Sallen-Key Filter
14
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
–3dB
+
(
1
2pRC
RF
1
2−
Q
)
TLV2371-Q1, TLV2372-Q1, TLV2374-Q1
FAMILY OF 550-μA/Ch 3-MHz RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS
SGLS244A − MAY 2004 − REVISED JUNE 2008
APPLICATION INFORMATION
circuit layout considerations
To achieve the levels of high performance of the TLV237x, follow proper printed-circuit board design techniques.
The following is a general set of guidelines.
D Ground planes—It is highly recommended that a ground plane be used on the board to provide all
components with a low inductive ground connection. However, in the areas of the amplifier inputs and
output, the ground plane can be removed to minimize the stray capacitance.
D Proper power supply decoupling—Use a 6.8-μF tantalum capacitor in parallel with a 0.1-μF ceramic
capacitor on each supply terminal. It may be possible to share the tantalum capacitor among several
amplifiers depending on the application, but a 0.1-μF ceramic capacitor should always be used on the
supply terminal of every amplifier. In addition, the 0.1-μF capacitor should be placed as close as possible
to the supply terminal. As this distance increases, the inductance in the connecting trace makes the
capacitor less effective. The designer should strive for distances of less than 0.1 inches between the device
power terminals and the ceramic capacitors.
D Sockets—Sockets can be used but are not recommended. The additional lead inductance in the socket pins
often leads to stability problems. Surface-mount packages soldered directly to the printed-circuit board is
the best implementation.
D Short trace runs/compact part placements—Optimum high performance is achieved when stray series
inductance has been minimized. To realize this, the circuit layout should be made as compact as possible,
thereby minimizing the length of all trace runs. Particular attention should be paid to the inverting input of
the amplifier. Its length should be kept as short as possible. This helps to minimize stray capacitance at the
input of the amplifier.
D Surface-mount passive components—Using surface-mount passive components is recommended for high
performance amplifier circuits for several reasons. First, because of the extremely low lead inductance of
surface-mount components, the problem with stray series inductance is greatly reduced. Second, the small
size of surface-mount components naturally leads to a more compact layout thereby minimizing both stray
inductance and capacitance. If leaded components are used, it is recommended that the lead lengths be
kept as short as possible.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
15
TLV2371-Q1, TLV2372-Q1, TLV2374-Q1
FAMILY OF 550-μA/Ch 3-MHz RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS
SGLS244A − MAY 2004 − REVISED JUNE 2008
APPLICATION INFORMATION
general power dissipation considerations
For a given θJA, the maximum power dissipation is shown in Figure 32 and is calculated by the following formula:
P
D
+
Where:
PD
TMAX
TA
θJA
ǒ
T
Ǔ
–T
MAX A
q
JA
= Maximum power dissipation of TLV237x IC (watts)
= Absolute maximum junction temperature (150°C)
= Free-ambient air temperature (°C)
= θJC + θCA
θJC = Thermal coefficient from junction to case
θCA = Thermal coefficient from case to ambient air (°C/W)
MAXIMUM POWER DISSIPATION
vs
FREE-AIR TEMPERATURE
2
Maximum Power Dissipation − W
1.75
1.5
1.25
TJ = 150°C
PDIP Package
Low-K Test PCB
θJA = 104°C/W
MSOP Package
Low-K Test PCB
θJA = 260°C/W
SOIC Package
Low-K Test PCB
θJA = 176°C/W
1
0.75
0.5
0.25
SOT-23 Package
Low-K Test PCB
θJA = 324°C/W
0
−55 −40 −25 −10 5 20 35 50 65 80 95 110 125
TA − Free-Air Temperature − °C
NOTE A: Results are with no air flow and using JEDEC Standard Low-K test PCB.
Figure 32.
16
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
12-Oct-2011
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package
Drawing
Pins
Package Qty
Eco Plan
(2)
Lead/
Ball Finish
MSL Peak Temp
TLV2371QDBVRQ1
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLV2371QDRG4Q1
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLV2371QDRQ1
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLV2372QDRG4Q1
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLV2372QDRQ1
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLV2374QDRG4Q1
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLV2374QDRQ1
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLV2374QPWRG4Q1
ACTIVE
TSSOP
PW
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLV2374QPWRQ1
ACTIVE
TSSOP
PW
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
(3)
Samples
(Requires Login)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
(3)
12-Oct-2011
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TLV2371-Q1, TLV2372-Q1, TLV2374-Q1 :
• Catalog: TLV2371, TLV2372, TLV2374
• Enhanced Product: TLV2371-EP, TLV2374-EP
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
• Enhanced Product - Supports Defense, Aerospace and Medical Applications
Addendum-Page 2
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