TMP122 TMP124 SBOS272B – JUNE 2003 – REVISED DECEMBER 2003 1.5°C Accurate Programmable Digital Temperature Sensors with SPI™ Interface FEATURES DESCRIPTION ● DIGITAL OUTPUT: SPI-Compatible Interface ● PROGRAMMABLE RESOLUTION: 9- to 12-Bits + Sign ● ACCURACY: ±1.5°C from –25°C to +85°C (max) ±2.0°C from –40°C to +125°C (max) ● LOW QUIESCENT CURRENT: 50µA ● WIDE SUPPLY RANGE: 2.7V to 5.5V ● TINY SOT23-6 AND SO-8 PACKAGES ● OPERATION TO 150°C ● PROGRAMMABLE HIGH/LOW SETPOINTS The TMP122 and TMP124 are SPI-compatible temperature sensors available in SOT23-6 and SO-8 packages. Requiring only a pull-up resistor for complete function, the TMP122 and TMP124 temperature sensors are capable of measuring temperatures within 2°C of accuracy over a temperature range of –40°C to +125°C, with operation up to 150°C. Programmable resolution, programmable set points and shut down function provide versatility for any application. Low supply current and a supply range from 2.7V to 5.5V make the TMP122 and TMP124 excellent candidates for lowpower applications. APPLICATIONS ● ● ● ● ● ● ● ● ● POWER-SUPPLY TEMPERATURE MONITORING COMPUTER PERIPHERAL THERMAL PROTECTION NOTEBOOK COMPUTERS CELL PHONES BATTERY MANAGEMENT OFFICE MACHINES THERMOSTAT CONTROLS ENVIRONMENTAL MONITORING and HVAC ELECTROMECHANICAL DEVICE TEMPERATURE The TMP122 and TMP124 are ideal for extended thermal measurement in a variety of communication, computer, consumer, environmental, industrial, and instrumentation applications. Temperature Temperature SO/I ALERT 1 Diode Temp. Sensor Control Logic 6 GND V+ 2 3 Serial Interface 5 Config and Temp Register 4 Control Logic 8 ∆Σ A/D Converter Serial Interface 7 OSC Config and Temp Register V+ 2 CS CS NC OSC Diode Temp. Sensor SO/I SCK ∆Σ A/D Converter 1 SCK GND 3 6 4 5 NC ALERT TMP124 TMP122 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. SPI is a registered trademark of Motorola. All other trademarks are the property of their respective owners. Copyright © 2003, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. www.ti.com ELECTROSTATIC DISCHARGE SENSITIVITY ABSOLUTE MAXIMUM RATINGS(1) Power Supply, V+ .................................................................................. 7V Input Voltage(2) ....................................................................... –0.3V to 7V Input Current ..................................................................................... 10mA Operating Temperature Range ...................................... –55°C to +150°C Storage Temperature Range ......................................... –60°C to +150°C Junction Temperature (TJ Max) .................................................... +150°C Lead Temperature (soldering) ....................................................... +300°C This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. NOTES: (1) Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. Exposure to absolute maximum conditions for extended periods may affect device reliability. (2) Input voltage rating applies to all TMP122 and TMP124 input voltages. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PACKAGE/ORDERING INFORMATION PRODUCT PACKAGE-LEAD PACKAGE DESIGNATOR(1) SPECIFIED TEMPERATURE RANGE PACKAGE MARKING ORDERING NUMBER TRANSPORT MEDIA, QUANTITY SOT23-6 DBV –40°C to +125°C T122 " " " " SO-8 D –40°C to +125°C T124 " " " " TMP122AIDBVT TMP122AIDBVR TMP124AID TMP124AIDR Tape and Reel, 250 Tape and Reel, 3000 Rails, 100 Tape and Reel, 2500 TMP122 " TMP124 " NOTE: (1) For the most current specifications and package information, refer to our web site at www.ti.com. PIN CONFIGURATIONS Top View SOT23-6 GND 2 V+ 3 6 SO/I 5 CS 4 SCK SO-8 SI/O 1 SC 2 NC 3 GND 4 T124 1 T122 ALERT Top View 8 V+ 7 CS 6 NC 5 ALERT TMP122 TMP124 NC = No Connection 2 TMP122, TMP124 www.ti.com SBOS272B ELECTRICAL CHARACTERISTICS At TA = –40°C to +125°C, and V+ = 2.7V to 5.5V, unless otherwise noted. TMP122, TMP124 PARAMETER CONDITION TEMPERATURE INPUT Range Accuracy (Temperature Error) –0.3 Selectable DIGITAL INPUT/OUTPUT Input Logic Levels: VIH VIL Input Current, SO/I, SCK, CS Output Logic Levels: VOL SO/I VOH SO/I VOL ALERT Leakage Current ALERT Input Capacitance, SO/I, SCK, CS, ALERT Resolution Conversion Time TEMPERATURE RANGE Specified Range Operating Range Storage Range Thermal Resistance, θJA TYP –40 –25°C to +85°C –40°C to +125°C –55°C to +150°C vs Supply Resolution(1) POWER SUPPLY Operating Range Quiescent Current Shutdown Current MIN ±0.5 ±1.0 ±1.5 0.1 ±0.0625 MAX UNITS +125 ±1.5 ±2.0 °C °C °C °C °C/V °C +0.3 0.7(V+) 0.3(V+) ±1 0V ≤ VIN ≤ V+ ISINK = 3mA ISOURCE = 2mA ISINK = 4mA 0V ≤ VIN ≤ 6V 0.4 2.5 9 to 12 + Sign 30 60 120 240 40 80 160 320 V V V µA pF Bits ms ms ms ms 50 0.1 5.5 75 1 V µA µA +125 +150 +150 °C °C °C °C/W °C/W (V+)–0.4 0.4 ±1 Selectable 9-Bit + Sign 10-Bit + Sign 11-Bit + Sign 12-Bit + Sign 2.7 IQ ISD Serial Bus Inactive Serial Bus Inactive –40 –55 –60 SOT23-6 Surface-Mount SO-8 Surface-Mount V V µA 200 150 NOTE: (1) Specified for 12-bit resolution. TMP122, TMP124 SBOS272B www.ti.com 3 TYPICAL CHARACTERISTICS At TA = +25°C, and V+ = 5.0V, unless otherwise noted. QUIESCENT CURRENT vs TEMPERATURE SHUTDOWN CURRENT vs TEMPERATURE 70 1.0 0.9 0.8 60 0.7 0.6 ISD (µA) IQ (µA) V+ = 5V 50 0.5 0.4 0.3 V+ = 2.7V 0.2 40 0.1 0.0 Serial Bus Inactive –0.1 30 –60 –40 –20 0 20 40 60 80 100 120 140 –60 –40 –20 0 Temperature (°C) 20 40 60 80 100 120 140 Temperature (°C) TEMPERATURE ACCURACY vs TEMPERATURE CONVERSION TIME vs TEMPERATURE 2.0 400 300 Temperature Error (°C) Conversion Time (ms) 1.5 V+ = 5V 200 V+ = 2.7V 1.0 0.5 0.0 –0.5 –1.0 –1.5 3 typical units 12-bit resolution. 12-bit resolution. –2.0 100 –60 –40 –20 0 20 40 60 80 100 –60 –40 –20 120 140 4 0 20 40 60 80 100 120 140 160 Temperature (°C) Temperature (°C) TMP122, TMP124 www.ti.com SBOS272B APPLICATIONS INFORMATION COMMUNICATING WITH THE TMP122 The TMP122/TMP124 converts continuously. If CS is brought low during a conversion the conversion process continues, but the last completed conversion is available at the output register. Communication with the TMP122/TMP124 is initiated by pulling CS low. The first 16 clocks of data transfer will return temperature data from the temperature sensors. The 16-bit data word is clocked out sign bit first, followed by the MSB. Any portion of the 16-bit word may be read before raising CS . If the user wishes to continue with CS low, the following 16 clocks transfer in a READ or WRITE command. READ and WRITE commands are described in Tables I and II. The TMP122 and TMP124 digital temperature sensors are optimal for thermal management and thermal protection applications. The TMP122/TMP124 are SPI interface-compatible and specified for a temperature range of –40°C to +125°C. The TMP122/TMP124 require minimal external components for operation, needing only a pull-up resistor on the ALERT pin and a bypass capacitor on the supply. Bypass capacitors of 0.1µF is recommended. Figure 1 shows typical connections for the TMP122 and TMP124. V+ V+ 0.1µF 0.1µF 3 SCK SO/I 8 1 4 ALERT (Output) SO/I SCK TMP122 6 5 CS 1 7 2 6 TMP124 CS NC 5 3 NC 2 GND The READ command contains an embedded address in bits D4 and D3 to identify which register to read. Bits D4 and D3 are internally registered and will hold their value following a READ command until a entire 16-bit read is completed by the user. The completion of the 16-bit READ acknowledges that the READ command has been completed. If the user issues a READ command and then raises CS with less than 16 subsequent clocks, the data from that register will be available at the next fall of CS . The registered READ address will remain in effect until a full 16 clocks have been received. After the completion of a 16-bit READ from the part, the READ address is reset to return data from the Temperature Register. A WRITE command to a register will not change the READ address registered. For further discussion on the READ address register, see the Read Address Register section. ALERT (Output) 4 NOTE: Alert requires pull-up resistor (open drain). NC indicates pin should be left open or floating. GND FIGURE 1. Typical Connections of the TMP122 and TMP124. Multiple commands may be strung together as illustrated in Figure 2. The TMP122/TMP124 accepts commands alternating with 16-bit response data. On lowering CS , the part always responds with a READ from the address location indicated by the READ address register. If the next command is a READ command then data is returned from the address specified by the READ command with the 16th clock resetting the READ address register to the default temperature register. The TMP122/TMP124 then expect a 16-bit command. If the command is a WRITE command, then the 16 clocks following the command will again return temperature data. To maintain accuracy in applications requiring air or surface temperature measurement, care should be taken to isolate the package and leads from ambient air temperature. CS 16-Bit READ SO/I 16-Bit READ COMMAND 16-Bit WRITE/ Embedded Address 16-Bit Response 16-Bit READ Figures 3, 4, 5, and 6 detail the communication sequences. FIGURE 2.Multiple Command Sequence. Read Command D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Temperature Configuration Register 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 Low Temp Threshold 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 High Temp Threshold 1 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 TABLE I. Read Command. Write Command D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Configuration Register 0 0 0 0 D1 D0 R1 R0 F1 F0 POL TM1 TM0 0 1 0 Low Temp Threshold T12 T11 T10 T9 T8 T7 T6 T5 T4 T3 T2 T1 T0 1 0 0 High Temp Threshold T12 T11 T10 T9 T8 T7 T6 T5 T4 T3 T2 T1 T0 1 1 0 Shutdown Command x x x x x x x x 1 1 1 1 1 1 1 1 TABLE II. Write Command. TMP122, TMP124 SBOS272B www.ti.com 5 CS CS 16-Bit READ SO/I 16-Bit WRITE/ Embedded Address ... SCK SO/I (Continued) D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 1 Z Z T12 T11 T10 T9 T8 T7 T6 T5 T4 T3 T2 T1 T0 1 0/1(1) 0 CS ... SCK SO/I NOTE: (1) 0 indicates TLOW register, 1 indicates THIGH register. FIGURE 3. READ followed by WRITE COMMAND to TLOW/THIGH Register. CS CS 16-Bit READ SO/I SCK 16-Bit WRITE/ Embedded Address ... SO/I (Continued) ... D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 1 Z Z 0 0 0 0 D1 D0 R1 R0 F1 F0 POL TM1 TM0 0 1 0 CS SCK SO/I FIGURE 4. READ followed by WRITE COMMAND to Configuration Register. CS CS 16-Bit READ SO/I 16-Bit READ COMMAND 16-Bit Response ... SCK SO/I (Continued) ... D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 1 Z Z CS ... SCK SO/I (Continued) ... 1 0 0 0 0 0 0 0 0 0 0 P1 P0 0 0 0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 1 Z Z D3 1 CS SCK SO/I FIGURE 5. READ followed by READ COMMAND and Response. CS CS SO/I 16-Bit READ SCK SO/I D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 Z Z FIGURE 6. Data READ. 6 TMP122, TMP124 www.ti.com SBOS272B READ ADDRESS REGISTER Figure 7 shows the internal register structure of the TMP122/TMP124. Table III describes the addresses of the registers available. The READ address register uses the two bits to identify which of the data registers should respond to a read command. Following a complete 16-bit read, the READ address register is reset to the default power-up state of P1/P0 equal 0/0. D15 D14 D13 D12 D11 D10 D9 D8 T12 T11 T10 T9 T8 T7 T6 T5 D7 D6 D5 D4 D3 D2 D1 D0 T4 T3 T2 T1 T0 1 Z Z TABLE IV. Temperature Register. 150 125 25 0.0625 0 –0.0625 –25 –55 READ Address Register Temperature Register CS 0100 0011 0000 0000 0000 1111 1111 1110 1011 1110 1100 0000 0000 1111 0011 0100 0000 1000 1000 0000 0000 1111 1000 1000 HEX 0111 0111 0111 1111 0111 1111 0111 0111 4B07 3E87 0C87 000F 0007 FFFF F387 E487 NOTE: (1) The last 2 bits are high impedance and are shown as 11 in the table. SCK Configuration Register DIGITAL OUTPUT(1) (BINARY) TEMPERATURE (°C) TABLE V. Temperature Data Format. I/O Control Interface TLOW Register The user can obtain 9, 10, 11, or 12 bits of resolution by addressing the Configuration Register and setting the resolution bits accordingly. For 9-, 10-, or 11-bit resolution, the most significant bits in the Temperature Register are used with the unused LSBs set to zero. SO/I THIGH Register CONFIGURATION REGISTER FIGURE 7. Internal Register Structure of the TMP122 and TMP124. P1 P0 0 0 1 1 0 1 0 1 REGISTER Temperature Register (READ Only) Configuration Register (READ/WRITE) TLOW Register (READ/WRITE) THIGH Register (READ/WRITE) TABLE III. Pointer Addresses of the TMP122 and TMP124 Registers. The Configuration Register is a 16-bit read/write register used to store bits that control the operational modes of the temperature sensor. Read/write operations are performed MSB first. The format of the Configuration Register for the TMP122/TMP124 is shown in Table VI, followed by a breakdown of the register bits. The power-up/reset value of the Configuration Register bits R1/R0 equal 1/1, all other bits equal zero. D15 D14 D13 D12 D11 D10 D9 D8 0 0 0 0 D1 D0 R1 R0 D7 D6 D5 D4 D3 D2 D1 D0 F1 F0 POL TM1 TM0 0 1 0 TEMPERATURE REGISTER The Temperature Register of the TMP122/TMP124 is a 16bit, signed read-only register that stores the output of the most recent conversion. The TMP122/TMP124 are specified for the temperature range of –40°C to +125°C with operation from –55°C to +150°C. Up to 16 bits can be read to obtain data and are described in Table IV. The first 13 bits are used to indicate temperature where bit D2 is 1, and D1, D0 are in a high impedance state. Data format for temperature is summarized in Table V. Following power-up or reset, the Temperature Register will read 0°C until the first conversion is complete. TABLE VI. Configuration Register. SHUTDOWN MODE (SD) The Shutdown Mode of the TMP122/TMP124 can be used to shut down all device circuitry except the serial interface. Shutdown mode occurs when the last 8 bits of the WRITE command are equal to 1, and will occur once the current conversion is completed, reducing current consumption to less than 1µA. To take the part out of shutdown, send any command or pattern after the 16-bit read with the last 8 bits not equal to one. Power on default is in active mode. TMP122, TMP124 SBOS272B www.ti.com 7 THERMOSTAT MODE (TM1/TM0) HIGH AND LOW LIMIT REGISTERS The Thermostat Mode bits of the TMP122/TMP124 indicate to the device whether to operate in Comparator Mode, Interrupt Mode or Interrupt Comparator Mode. For more information on Comparator and Interrupt Mode, see text HIGH and LOW limit registers. The bit assignments for thermostat mode are described in Table VII. Power on default is comparator mode. In Comparator Mode (TM1/TM0 = 0/0), the ALERT Pin of the TMP122/TMP124 becomes active when the temperature equals or exceeds the value in THIGH and generates a consecutive number of faults according to fault bits F1 and F0. The ALERT pin will remain active until the temperature falls below the indicated TLOW value for the same number of faults. TM1 TM0 MODE OF OPERATION 0 0 1 1 0 1 0 1 Comparator Mode Interrupt Mode Interrupt Comparator Mode — TABLE VII. Mode Settings of the TMP122. POLARITY (POL) The Polarity Bit of the TMP122/TMP124 adjusts the polarity of the ALERT pin output. By default, POL = 0 and the ALERT pin will be active LOW, as shown in Figure 8. For POL = 1 the ALERT Pin will be active HIGH, and the state of the ALERT Pin is inverted. THIGH Measured Temperature TLOW In Interrupt Mode (TM1/TM0 = 0/1) the ALERT pin becomes active when the temperature equals or exceeds THIGH for a consecutive number of fault conditions. The ALERT pin remains active until a read operation of any register occurs. The ALERT pin will also be cleared if the device is placed in Shutdown Mode. Once the ALERT pin is cleared, it will only become active again by the temperature falling below TLOW. When the temperature falls below TLOW, the ALERT pin becomes active and remains active until cleared by a read operation of any register. Once the ALERT pin is cleared, the above cycle will repeat with the ALERT pin becoming active when the temperature equals or exceeds THIGH. In Interrupt/Comparator Mode (TM1/TM0 = 1/0), the ALERT Pin of the TMP122/TMP124 becomes active when the temperature equals or exceeds the value in THIGH and generates a consecutive number of faults according to fault bits F1 and F0. The ALERT pin will remain active until the temperature falls below the indicated TLOW value for the same number of faults and a communication with the device has occurred after that point. Operational modes are represented in Figure 8. Tables IX and X describe the format for the THIGH and TLOW registers. Power-up reset values for THIGH and TLOW are: THIGH = 80°C and TLOW = 75°C. The format of the data for THIGH and TLOW is the same as for the Temperature Register. TMP122/124 ALERT PIN (Comparator Mode) POL = 0 TMP122/124 ALERT PIN (Interrupt Mode) POL = 0 All 13 bits for the Temperature, THIGH, and TLOW registers are used in the comparisons for the ALERT function for all converter resolutions. The three LSBs in T HIGH and TLOW can affect the ALERT output even if the converter is configured for 9-bit resolution. TMP122/124 ALERT PIN (Interrupt/Comparator Mode) POL = 0 Read Read Read Time FIGURE 8. ALERT Output Transfer Function Diagrams. D15 D14 D13 D12 D11 D10 D9 D8 H12 H11 H10 H9 H8 H7 H6 H5 D7 D6 D5 D4 D3 D2 D1 D0 H4 H3 H2 H1 H0 1 1 0 FAULT QUEUE (F1/F0) A fault condition occurs when the measured temperature exceeds the limits set in the THIGH and TLOW registers. The Fault Queue is provided to prevent a false alert due to environmental noise and requires consecutive fault measurements to trigger the alert function of the TMP122/TMP124. Table VIII defines the number of consecutive faults required to trigger a consecutive alert condition. Power-on default for F1/F0 is 0/0. F1 F0 CONSECUTIVE FAULTS 0 0 1 1 0 1 0 1 1 2 4 6 TABLE IX. THIGH Register. D15 D14 D13 D12 D11 D10 D9 D8 L12 L11 L10 L9 L8 L7 L6 L5 D7 D6 D5 D4 D3 D2 D1 D0 L4 L3 L2 L1 L0 1 0 0 TABLE X. TLOW Register. TABLE VIII. Fault Settings of the TMP122 and TMP124. 8 TMP122, TMP124 www.ti.com SBOS272B CONVERTER RESOLUTION (R1/R0) The Converter Resolution Bits control the resolution of the internal Analog-to-Digital (A/D) converter. This allows the user to maximize efficiency by programming for higher resolution or faster conversion time. Table XI identifies the Resolution Bits and the relationship between resolution and conversion time. The TMP122/TMP124 have a default resolution of 12 bits. R1 R0 RESOLUTION CONVERSION TIME (typical) 0 0 1 1 0 1 0 1 9 Bits (0.5°C) plus sign 10 Bits (0.25°C) plus sign 11 Bits (0.125°C) plus sign 12 Bits (0.0625°C) plus sign 30ms 60ms 120ms 240ms D1 D0 CONVERSION TIME CONVERSION PERIOD 0 0 1 1 0 1 0 1 0.25s 0.25s 0.25s 0.25s 0.25s 0.5s 1s 8s TABLE XII. Conversion Delay for 12-Bit Resolution. 0.5s 0.25s 50µA (active) D1/D0 = 0/1 20µA (idle) 1s 0.25s D1/D0 = 1/0 TABLE XI. Resolution of the TMP122 and TMP124. 0.25s 8s D1/D0 = 1/1 DELAY TIME The Delay Bits control the amount of time delay between each conversion. This feature allows the user to maximize power savings by eliminating unnecessary conversions, and minimizing current consumption. During active conversion the TMP122/ TMP124 typically requires 50µA of current for approximately 0.25s conversion time, and approximately 20µA for idle times between conversions. Delay settings are identified in Table XII as conversion time and period, and are shown in Figure 9. Default power up is D1/D0 equal 0/0. Conversion time and conversion periods scale with resolution. Conversion period denotes time between conversion starts. 12-Bit Resolution FIGURE 9. Conversion Time and Period Description. Timing Diagrams The TMP122/TMP124 are SPI compatible. Figures 10 to 12 describe the various timing parameters of the TMP122/ TMP124 with timing definitions in Table XIII. PARAMETER MIN MAX UNITS SCK Period t1 100 ns Data In to Rising Edge SCK Setup Time t2 20 ns SCK Falling Edge to Output Data Delay t3 SCK Rising Edge to Input Data Hold Time t4 20 CS to Rising Edge SCK Set-Up Time t5 40 CS to Output Data Delay t6 30 ns CS Rising Edge to Output High Impedance t7 30 ns 30 ns ns ns TABLE XIII. Timing Description. TMP122, TMP124 SBOS272B www.ti.com 9 SCK t5 t1 t3 CS t6 SO/I FIGURE 10. Output Data Timing Diagram. SCK SCK CS CS SO/I SO/I t7 t7 FIGURE 11. High Impedance Output Timing Diagram. SCK SCK t2 t2 t4 t4 CS CS SO/I SO/I FIGURE 12. Input Data Timing Diagram. 10 TMP122, TMP124 www.ti.com SBOS272B PACKAGE OPTION ADDENDUM www.ti.com 9-Dec-2004 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TMP122AIDBVR ACTIVE SOT-23 DBV 6 3000 None CU NIPDAU Level-1-235C-UNLIM TMP122AIDBVT ACTIVE SOT-23 DBV 6 250 None CU NIPDAU Level-1-235C-UNLIM TMP124AID ACTIVE SOIC D 8 100 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1YEAR/ Level-1-220C-UNLIM TMP124AIDR ACTIVE SOIC D 8 2500 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1YEAR/ Level-1-220C-UNLIM Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. None: Not yet available Lead (Pb-Free). Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens, including bromine (Br) or antimony (Sb) above 0.1% of total product weight. (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. 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