TI TPS60250RTERG4

TPS60250
TPS60252
www.ti.com............................................................................................................................................................ SLVS769C – APRIL 2007 – REVISED APRIL 2008
HIGH EFFICIENCY CHARGE PUMP FOR 7 WLEDs WITH I2C INTERFACE
FEATURES
1
•
•
•
•
•
•
•
•
•
•
•
•
3.0 V to 6.0 V Input Voltage Range
×1 and ×1.5 Charge Pump
Fully Programmable Current with I2C
– 64 Dimming Steps with 25mA Maximum
(Sub and Main Display Banks)
– 4 Dimming Steps with 80mA Maximum
(DM5 for Auxiliary Application)
2% Current Matching for Sub LEDs at Light
Load Condition (Each 100µA)
750 kHz Charge Pump Frequency
Continuous 230mA Maximum Output Current
Auto Switching Between ×1 and ×1.5 Mode for
Maximum Efficiency
Built-in Soft Start and Current Limit
Open Lamp Detection
16-Pin 3mm x 3mm QFN
TPS60250 (I2C Slave Address: 1110111)
TPS60252 (I2C Slave Address: 1110110)
DESCRIPTION
The TPS60250/2 are high efficiency, constant
frequency charge pump DC/DC converters that use
dual mode 1× and 1.5× conversions to maximize
efficiency over the input voltage range. The devices
drive up to five white LEDs for the main display and
up to two white LEDs for the sub display with
regulated constant current for uniform intensity. By
utilizing adaptive 1×/1.5× charge pump modes and
very low-dropout current regulators, the TPS60250/2
achieve high efficiency over the full 1-cell
lithium-battery input voltage range.
Four enable inputs, ENmain, ENsub1, ENsub2, and
ENaux, available through the I2C, are used for simple
on/off controls for the independent main, sub1, sub2,
and DM5 displays, respectively. To lower the
operating current when using one sub display LED,
the devices provide completely separate operation for
the sub display LEDs.
The TPS60250/2 are available in a 16-pin 3mm x
3mm thin QFN.
APPLICATIONS
•
•
•
Main Display
Cellular Phones
PDA, PMP, GPS (Up To 4 Inch LCD Display)
Multidisplay Handheld Devices
GND DM4 DM3 DM2
C1DM1
95
4 Main LED - 15 mA,
VF = 3.1 V
90
Efficiency - %
85
C2
1mF
80
C3
1mF
75
70
C2+
DS2
C2-
DS1
C1+
DM5
VIN SCLK SDAT
Sub Display
VOUT
65
C4
4.7mF
60
C1
4.7mF
55
I2C Interface
On/Off, Digital Dimming
50
3
3.5
4
4.5
5
VI - Input Voltage - V
5.5
Figure 2. Typical Application for Sub and Main
6
Figure 1. Efficiency vs Input Voltage
ORDERING INFORMATION (1)
PART NUMBER
TPS60250RTE
TPS60252RTE
(1)
PACKAGE
TA
16-Pin 3 mm × 3 mm QFN (RTE)
–40°C to +85°C
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007–2008, Texas Instruments Incorporated
TPS60250
TPS60252
SLVS769C – APRIL 2007 – REVISED APRIL 2008............................................................................................................................................................ www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted) (1)
VI
Input voltage range (all pins)
VALUE
UNIT
–0.3 to 7
V
650
mA
2
kV
500
V
MAX Output current limit
HBM ESD Rating
(2)
CDM ESD Rating (3)
MM ESD Rating
(4)
TA
Operating temperature range
TJ
Maximum operating junction temperature
TST
Storage temperature
(1)
(2)
(3)
(4)
200
V
–40 to 85
°C
150
°C
–55 to 150
°C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The Human body model (HBM) is a 100 pF capacitor discharged through a 1.5kΩ resistor into each pin. The testing is done according
JEDECs EIA/JESD22-A114.
Charged Device Model
Machine Model (MM) is a 200pF capacitor discharged through a 500 nH inductor with no series resistor into each pin. The testing is
done according JEDECs EIA/JESD22-A115.
DISSIPATION RATINGS
PACKAGE
THERMAL
RESISTANCE, RθJC
THERMAL
RESISTANCE, RθJA
TA ≤ 25°C POWER
RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 85°C POWER
RATING
QFN 3×3 RTE
74.6°C/W
48.7°C/W
2.05 W
1.13 W
0.821 W
RECOMMENDED OPERATING CONDITIONS
MIN
NOM
3.0
MAX
6.0
UNIT
VI
Input voltage range
V
IO(max)
Maximum output current
230
mA
CI
Input capacitor
4.7
µF
CO
Output capacitor
4.7
µF
C1, C2
Flying capacitor
TA
Operating ambient temperature
–40
85
°C
TJ
Operating junction temperature
–40
125
°C
µF
1.0
ELECTRICAL CHARACTERISTICS
VI = 3.5 V, TA = –40°C to 85°C, typical values are at TA = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY VOLTAGE
VI
Input voltage range
3.0
750 kHz Switching in 1.5× mode
(IMAIN_LED = 15 mA × 4, IO = 60 mA)
6.0
V
6.7
mA
IQ
Operating quiescent current
No switching in ×1 mode (IO = 100 µA)
68
µA
ISD
Shutdown current
Enable Control Register has 0x00
1.3
µA
VUVLO1
UVLO Threshold voltage1 (1)
VI falling
2.2
2.4
2.6
V
VUVLO2
UVLO Threshold voltage2 (2)
VI falling
1.2
1.3
1.5
V
(1)
(2)
2
Shut down charge pump and power stage and keep I2C content
Shut down completely and come up with all 0's after device restart
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Product Folder Link(s): TPS60250 TPS60252
TPS60250
TPS60252
www.ti.com............................................................................................................................................................ SLVS769C – APRIL 2007 – REVISED APRIL 2008
ELECTRICAL CHARACTERISTICS (continued)
VI = 3.5 V, TA = –40°C to 85°C, typical values are at TA = 25°C (unless otherwise noted)
PARAMETER
Vhys
TS
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Under-voltage lockout hysterisis
UVLO1
210
mV
Soft start time (3)
VI = 3 V, CO = 1 µF,
IMAIN_LED = 15 mA × 4
0.5
ms
CHARGE PUMP
Vout
Overvoltage limit
6.5
V
Fs
Switching frequency
750
kHz
RO
Open loop output impedance
×1 Mode, (VI –VO)/IO
1.2
×1.5 Mode, (VI × 1.5 – VO)/IO VI = 3.0V (IO =
120 mA)
3.5
5.0
0
±2%
±0.1%
±5%
Ω
CURRENT SINK
ISUB_LED = 100 µA × 2, VDXX = 0.4 V
Km_sub
Current matching of sub LEDs at light
load condition (4)
Km_main
LED to LED Current matching (5)
IMAIN_LED = 15 mA × 4,
3.0 V ≤ VI ≤ 4.2 V
Ka
Current accuracy
ILED = 15 mA
ID_MS
Maximum LED current of DM1-4 and
DS1-2
Main and Sub Display Current Register =
0×01&2(111111),
VDXX = 0.2 V
ID_DM5
Maximum LED current of DM5
Aux Display Current Register = 0×03 (XXXX11)
VDropOut
LED Drop out voltage
See
VTH_GU
1× Mode to 1.5× mode transition
threshold voltage (7)
VDXX Falling, 15 mA × 4 measured on the
lowest VDXX
VTH_GD
Input voltage hysteresis for 1.5× to 1×
mode transition
Measured as VI – (VO – VDXX_MIN), IMAIN_LED =
15 mA × 4
±7%
25.5
mA
80
(6)
85
mA
80
120
mV
100
120
mV
550
mV
SERIAL INTERFACE TIMING REQUIREMENTS
fmax
Clock frequency
twH(HIGH)
Pulse duration, clock high time
600
400
kHz
twL(LOW)
Pulse duration, clock low time
1300
tr
DATA and CLK rise time
300
ns
tf
DATA and CLK fall time
300
ns
th(STA)
High time (repeated) START
condition(after this period the first clock
pulse is generated)
600
ns
tsu(STA)
Setup time for repeated START
condition
600
ns
th(DATA)
Data input hold time
0
ns
tsu(DATA)
Data input setup time
100
ns
tsu(STO)
STOP condition setup time
600
ns
t(BUF)
Bus free time
1300
ns
ns
ns
I2C COMPATIBLE INTERFACE VOLTAGE SPECIFICATION (SCLK, SDAT, VIO)
VIL
Low-leveI input voltage
3.0 V ≤ VI ≤ 6.0 V
0
VIH
High-level input voltage
3.0 V ≤ VI ≤ 6.0 V
1.1
VOL
Low-level output voltage
ILOAD = 2 mA
(3)
(4)
(5)
(6)
(7)
0.5
V
V
0.4
V
Measurement Condition: From enabling the LED driver to 90% output voltage after VI is already up.
LED current matching is defined as: (ISUB_LED_WORST – IAVG_SUB) / IAVG_SUB
LED to LED Current Matching is defined as: (IMAIN_LED_WORST – IAVG_MAIN) / IAVG_MAIN
Dropout Voltage is defined as VDXX (WLED Cathode) to GND voltage at which current into the LED drops 10% from the LED current at
VDXX = 0.2 V, WLED current = 15 mA × 4.
As VI drops, VDXX eventually falls below the switchover threshold of 100mV, and TPS60250/2 switches to 1.5× mode. See the Operating
Principle section for details about the mode transition thresholds.
Copyright © 2007–2008, Texas Instruments Incorporated
Product Folder Link(s): TPS60250 TPS60252
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TPS60250
TPS60252
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PIN ASSIGNMENTS
QFN 16-PIN RTE
3mmX3mm
(TOP VIEW)
GND DM4 DM3 DM2
C1-
12
11
10
9
13
8
DM1
C2+ 14
7
DS2
C2-
6
DS1
5
DM5
15
C1+ 16
1
2
3
4
VOUT VIN SCLK SDAT
TERMINAL FUNCTIONS
TERMINAL
I/O
DESCRIPTION
1
O
Connect the anodes of the sub, main, and aux display white LEDs to this pin.
2
I
Supply voltage input. Connect to a 3 V to 6 V input supply source.
SCLK
3
I
I2C Interface
SDAT
4
I/O
I2C Interface
DM5
5
I
DS1
6
I
DS2
7
I
DM1
8
I
DM2
9
I
DM3
10
I
DM4
11
I
GND
12
–
Ground
C1–
13
–
Connect to the flying capacitor C1
C2+
14
–
Connect to the flying capacitor C2
C2–
15
–
Connect to the flying capacitor C2
C1+
16
–
Connect to the flying capacitor C1
NAME
NO.
VOUT
VIN
4
Current sink inputs. Connect the cathode of the aux display or the 5th main display white LED to this pin.
Current sink inputs. Connect the cathode of one of the sub display white LEDs to these pins.
Current sink input. Connect the cathode of one of the main display white LEDs to these pins.
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TPS60250
TPS60252
www.ti.com............................................................................................................................................................ SLVS769C – APRIL 2007 – REVISED APRIL 2008
FUNCTIONAL BLOCK DIAGRAM
C 1+
16
VIN
2
C2-
C2+ C1-
15
14
VOUT
DM 4
DM 3
DM 2
DM 1
1
11
10
9
8
13
1X, 1.5X CHARGE PUMP
GEAR
CONTROL
&
OPEN LAMP
DETECTION
ENold
I2C
INTERFACE
7
DS2
6
DS1
5
DM5
12
GND
ENmain
Main Dimming
6
ENsub 1
ENsub 2
Sub Dimming
SCLK
3
ENaux
AUX Dimming
SDAT
6
6
4
BIAS, TEST, & MONITORING
TYPICAL CHARACTERISTICS
TABLE OF GRAPHS
DESCRIPTION
Efficiency
Output Impedance of ×1
and ×1.5 Mode
Shutdown Current
REF
Efficiency vs Input Voltage, 4 Main LED - 15 mA, 25 mA
Figure 3
Efficiency vs Input Voltage, 2 Sub LED with Light Load Condition, ×1 Mode Operation
Figure 4
Switch Resistance vs Free-Air Temperature, ×1 Mode, ILED = 230 mA
Figure 5
Switch Resistance vs Free-Air Temperature, ×1 Mode, ILED = 100 mA
Figure 6
Switch Resistance vs Free-Air Temperature, ×1.5 Mode Charge Pump Open-Loop , ILED = 230 mA
Figure 7
Switch Resistance vs Free-Air Temperature, ×1.5 Mode Charge Pump Open-Loop, ILED = 100 mA
Figure 8
Shutdown Current vs Input Voltage
Figure 9
Copyright © 2007–2008, Texas Instruments Incorporated
Product Folder Link(s): TPS60250 TPS60252
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TPS60252
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TYPICAL CHARACTERISTICS (continued)
DESCRIPTION
REF
Input Current
Input Current vs Supply Voltage, 4 Main LED
Figure 10
DM5 with Maximum 80
mA
DM5 Current vs Input Voltage, Programmed with 80 mA
Figure 11
Current Accuracy
WLED Current vs Input Voltage, 4 Main LED with 15 mA
Figure 12
EFFICIENCY
vs
INPUT VOLTAGE
(2 Sub LED with Light Load Condition,
×1 Mode Operation)
EFFICIENCY
vs
INPUT VOLTAGE
(4 Main LED - 15mA, 25mA)
100
90
0.5 mA, VF = 2.7 V
Efficiency - %
Efficiency - %
1 mA, VF = 2.8 V
80
25 mA, VF = 3.79 V
80
70
60
0.2 mA, VF = 2.6 V
40
60
15 mA, VF = 3.43 V
20
50
3
4
5
3
6
4
5
VI - Input Voltage - V
VI - Input Voltage - V
Figure 3.
Figure 4.
SWITCH RESISTANCE
vs
FREE-AIR TEMPERATURE
(×1 Mode)
SWITCH RESISTANCE
vs
FREE-AIR TEMPERATURE
(×1 Mode)
6
1.15
1.10
1.10
ILED = 230 mA
ILED = 100 mA
VI = 3.3 V
1.05
VI = 3.3 V
Switch Resistance - W
Switch Resistance - W
1.05
1
VI = 3.6 V
0.95
0.90
VI = 3.9 V
0.85
1
VI = 3.6 V
0.95
0.90
0.85
0.80
VI = 3.9 V
0.80
0.75
0.75
0.70
0.70
-40
-20
0
20
40
60
80
0.65
-40
-20
TA - Free-Air Temperature - °C
Figure 5.
6
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0
20
40
TA - Free-Air Temperature - °C
60
80
Figure 6.
Copyright © 2007–2008, Texas Instruments Incorporated
Product Folder Link(s): TPS60250 TPS60252
TPS60250
TPS60252
www.ti.com............................................................................................................................................................ SLVS769C – APRIL 2007 – REVISED APRIL 2008
SWITCH RESISTANCE
vs
FREE-AIR TEMPERATURE
(×1.5 Mode Charge Pump Open-Loop)
SWITCH RESISTANCE
vs
FREE-AIR TEMPERATURE
(×1.5 Mode Charge Pump Open-Loop)
3.8
3.8
ILED = 230 mA
ILED = 100 mA
3.6
Switch Resistance - W
Switch Resistance - W
3.6
VI = 3 V
3.4
3.2
3
3.4
VI = 3 V
3.2
3
2.8
2.8
-40
-20
40
20
0
TA - Free-Air Temperature - °C
60
2.6
-40
80
0
20
40
Figure 7.
Figure 8.
SHUTDOWN CURRENT
vs
INPUT VOLTAGE
INPUT CURRENT
vs
SUPPLY VOLTAGE
(4 Main LED)
ICC - Input Current - A
8
6
4
TA = 85°C
0.16
0.15
0.14
0.13
0.12
80
25 mA
0.11
0.10
0.09
0.08
0.07
0.06
15 mA
0.05
0.04
0.03
0.02
TA = 25°C
TA = -40°C
60
TA - Free-Air Temperature - °C
10
Shutdown Current - mA
-20
2
2 mA
0.01
0
3
6
5
4
3
VI - Input Voltage - V
Figure 9.
5
4
6
VI - Input Voltage - V
Figure 10.
Copyright © 2007–2008, Texas Instruments Incorporated
Product Folder Link(s): TPS60250 TPS60252
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TPS60250
TPS60252
SLVS769C – APRIL 2007 – REVISED APRIL 2008............................................................................................................................................................ www.ti.com
DM5 CURRENT
vs
INPUT VOLTAGE
(Programmed with 80 mA)
WLED CURRENT
vs
INPUT VOLTAGE
(4 Main LED with 15 mA)
0.08
0.016
IDM2
IDM3
0.07
0.06
0.35 V
0.05
IDM1
0.3 V
WLED Current - A
DM5 Current - A
0.4 V
0.25 V
0.2 V
0.15 V 0.1 V
0.04
0.03
0.05 V
IDM4
0.014
0.012
0.02
0.01
0
2.5
0.010
3
3.5
4
3
4
VI - Input Voltage - V
Figure 11.
8
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5
6
VI - Input Voltage - V
Figure 12.
Copyright © 2007–2008, Texas Instruments Incorporated
Product Folder Link(s): TPS60250 TPS60252
TPS60250
TPS60252
www.ti.com............................................................................................................................................................ SLVS769C – APRIL 2007 – REVISED APRIL 2008
APPLICATION INFORMATION
APPLICATION OVERVIEW
Most of the current handsets fall into one of three categories. First is the clamshell design, with a main display on
the inside, a secondary display on the outside and a keypad backlight. Second is the bar design, with a main
display and a keypad backlight. Third is the slide type (slide-up and slide-down) design, with a main display and
two keypad banks (inside and outside). The TPS60250/2 are well suited for use in these three major phone
designs because the devices have 7 individually regulated white LED current paths that drive up to five white
LEDs in the main display and up to two white LEDs in sub display with regulated constant current for uniform
intensity. The main and sub display LED channels drive up to 25 mA and the auxiliary LED output (DM5) that
drives up to 80 mA can be assigned to keypad backlight, torch light, or low cost/weak camera flash application
using the I2C interface.
The TPS60250/2 circuits use only 4 external components: the input/output capacitors and 2 charge pump flying
capacitors. The few external components combined with the small 3mm × 3mm QFN package provide for a small
total solution size. By combining independent control of three separate banks of backlight LEDs with low cost and
weak flash capability, the TPS60250/2 help designers minimize power consumption especially in the case of a
light load condition while reducing component count and package size.
OPERATING PRINCIPLE
Charge pumps are becoming increasingly attractive in battery-operated applications where board space and
maximum height of the converter are critical constraints. The major advantage of a charge pump is the use of
only capacitors as storage elements. The TPS60250/2 charge pumps provide regulated LED current from a 3 V
to 6 V input source. The devices operate in two modes. The 1× mode, where the input is connected to the output
through a pass element, and a high efficiency 1.5× charge pump mode. The IC maximizes power efficiency by
operating in 1× and 1.5× modes as input voltage and LED current conditions require. The mode of operation is
automatically selected by comparing the forward voltage of the WLED plus the voltage of current sink for each
LED with the input voltage. The IC starts up in 1× mode, and automatically transitions to 1.5× if the voltage at
any current sink input (DM_or DS_) falls below the 100 mV transition voltage. The IC returns to 1× mode as the
input rises. Figure 13 provides a visual explanation of the 1× to 1.5× transition.
In 1.5× mode, the internal oscillator determines the charge/discharge cycles for the flying capacitors. During a
charge cycle, the flying capacitors are connected in series and charged up to the input voltage. After the on-time
of the internal oscillator expires, the flying capacitors are reconfigured to be in parallel and then connected in
series to the input voltage. This provides an output of 1.5× the input voltage. After the off-time of the internal
oscillator expires, another charge cycle initiates and the process repeats.
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TPS60252
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VA
VO
VI
VF
CP WLED Driver
VDX
VI
x1 Operating
Area
x1.5 Operating
Area
VHYS
VB
VC
Figure 13. Input Voltage Hysteresis Between ×1 and ×1.5 Mode
As shown in Figure 13, there is input hysteresis voltage between 1× and 1.5× mode to ensure stable operation
during mode transition. For the 1 cell Li-Ion battery input voltage range, the TPS6025/2 operate in 1× mode when
a fully charged battery is installed. Once the battery voltage drops below the VB level, which is the mode
transition voltage from 1× to 1.5×, the WLED driver operates in 1.5× mode. Once in 1.5× mode, the battery
voltage must rise to the VC level in order to transition from 1.5× to 1×. This hysteresis ensures stable operation
when there is some input voltage fluctuation at the 1×/1.5× mode transition.
The transition voltage, VB, depends on VDX (the mode transition threshold voltage), VF (WLED forward voltage
drop) and VA (the drop out voltage of the charge pump stage) and is calculated as follows:
VB = VA + VF + VDX
VA = ROUT1X × ILEDTOTAL
Where ROUT1X is the 1× mode output impedance of the IC. See the Electrical Characteristics table for output
impedance specifications.
The TPS60250/2 switch up to 1.5× mode when the input voltage is below VB and remain in 1.5× mode as long as
the input is lower than VC. 1.5× Mode is exited when the input voltage rises above VC. VC is calculated as:
VC = VF + 550 mV
The input voltage mode transition hysteresis voltage (VHYS) between 1× and 1.5× is calculated using the following
equation.
VHYS = VC – VB = 550 mV – VDX – VA, where VDX = 100mV
Note that VA is the key factor in determining VHYS and is dependant on the 1× mode charge pump output
impedance and WLED current.
10
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LED CURRENT SINKS (DM_, DS_)
The TPS60250/2 have constant current sinks which drive seven individual LED current paths. Each current sink
regulates the LED current to a constant value determined by the I2C interface. The internal register addressing
allows the LED main channels DM1~DM5 to be controlled independently from the LED sub channels DS1~DS2.
All LED channels sink up to 25 mA of current except DM5 which has an 80 mA maximum current when
configured as an auxiliary output. Using the I2C interface, the user may assign DM5 to the main display bank with
up to 25 mA current or as an auxiliary output for torch or keypad light or low/weak camera flash with 80 mA
current. DM5 has 64 dimming steps; the same as the main and sub display banks when assigned to the main
display. However, it has its own current programming register and enable control. When assigned as an auxiliary,
DM5 has 4 dimming steps (full scale, 70%, 40%, 20%).
These optimized current sinks minimize the voltage headroom required to drive each LED and maximize power
efficiency by increasing the amount of time the controller stays in 1× mode before transitioning to 1.5× mode.
OPEN LAMP DETECTION
In system production it is often necessary to leave LED current paths open depending on the phone model. For
example, one phone may use 2 LEDs to backlight the main display while another uses 4 LEDs. Rather than use
two different ICs for these different phone applications, the TPS60250/2 may be used in both applications with no
additional efficiency loss in the 2 LED applications. In traditional LED driver applications when an LED current
path is open, the current sink voltage falls to ground and the current regulation circuitry drives the output to
maximum voltage in an attempt to regulate the current for the missing LED path. This severely reduces system
efficiency. The TPS60250/2 use 7 internal comparators to detect open lamp condition, when one or more open
LED conditions occur, TPS60250/2 prevent activation of 1.5X mode transition due to missing LEDs. Open lamp
detection is enabled/disabled using the I2C interface.
CAPACITOR SELECTION
The TPS60250/2 are optimized to work with ceramic capacitors with a dielectric of X5R or better. The two flying
capacitors must be the same value for proper operation. The 750 kHz switching frequency requires that the flying
capacitor be less than 4.7 µF. Use of 1 µF ceramic capacitors for both charge pump flying capacitors is
recommended.
For good input voltage filtering, low ESR ceramic capacitors are recommended. A 1 µF ceramic input capacitor is
sufficient for most applications. For better input voltage filtering this value can be increased to 4.7 µF .
The output capacitor controls the amount of ripple on the output. Since small ripple is undetectable by the human
eye, a 4.7 µF output capacitor works well. If better output filtering and lower ripple is desired, a larger output
capacitor may be used.
SETTING THE LED CURRENT
Figure 14. Dimming Steps for Sub, Main, and Keypad Backlight
Figure 14 shows the dimming steps for sub, main, and auxiliary display banks in a 25 mA maximum current
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Product Folder Link(s): TPS60250 TPS60252
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11
TPS60250
TPS60252
SLVS769C – APRIL 2007 – REVISED APRIL 2008............................................................................................................................................................ www.ti.com
applications. In order to satisfy today's requirements on LED current , the TPS60250/2 cover the low LED current
area from 100 µA to 1.5 mA with 100 µA dimming steps (total 16 steps for a 25 mA maximum current) for the
new LCD panels which have improved transparency rates. For LED currents in the range from 2 mA to 25 mA,
the devices use 48 dimming steps with 0.5 mA steps. Also, DM5 has 4 dimming steps once the current path is
assigned for auxiliary applications with a 80 mA maximum current.
SERIAL INTERFACE
The serial interface is compatible with the standard and fast mode I2C specifications, allowing transfers at up to
400 kHz. The interface adds flexibility to the WLED driver solution, enabling most functions to be programmed to
new values depending on the instantaneous application requirements. Register contents remain intact as long as
VCC remains above UVLO2 (typical 1.3 V).
For normal data transfer, DATA is allowed to change only when CLK is low. Changes when CLK is high are
reserved for indicating the start and stop conditions. During data transfer, the data line must remain stable
whenever the clock line is high. There is one clock pulse per bit of data. Each data transfer is initiated with a start
condition and terminated with a stop condition. When addressed, the TPS60250/2 devices generate an
acknowledge bit after the reception of each byte. The master device (microprocessor) must generate an extra
clock pulse that is associated with the acknowledge bit. The TPS60250/2 devices must pull down the DATA line
during the acknowledge clock pulse so that the DATA line is a stable low during the high period of the
acknowledge clock pulse. Setup and hold times must be taken into account. During read operations, a master
must signal the end of data to the slave by not generating an acknowledge bit on the last byte that was clocked
out of the slave. In this case, the slave TPS60250/2 devices must leave the data line high to enable the master
to generate the stop condition.
DATA
CLK
Data line
stable;
data valid
Change
of data
allowed
Figure 15. Bit Transfer on the Serial Interface
CE
DATA
CLK
S
P
START Condition
STOP Condition
Figure 16. START and STOP Conditions
12
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Product Folder Link(s): TPS60250 TPS60252
TPS60250
TPS60252
www.ti.com............................................................................................................................................................ SLVS769C – APRIL 2007 – REVISED APRIL 2008
SCLK
...
SDAT
A6
Start
A5
A4
...
... A0
R/W
AC
K
0
0
R7
R6
R5
...
... R0
AC
K
D7
D6 D5
...D0
0
Slave Address
AC
K
0
Register Address
Data
Stop
NOTE: SLAVE=TPS60250
Figure 17. Serial I/F READ From TPS60250/2: Protocol A
SCLK
SDAT
...
A6
.. A0
...
R/W
AC
K
0
0
R7
.. R0
...
AC
K
0
A6
.. A0
...
R/W
AC
K
1
0
Start
Register
Address
Slave Address
Slave Address
D7
.. D0
Slave
Drives
the Data
Repeated
Start
NOTE: SLAVE=TPS60250
AC
K
Master
Drives
ACK and Stop
Stop
Figure 18. Serial I/F READ From TPS60250/2: Protocol B
Figure 19. Serial I/F Timing Diagram
The I2C interface uses a combined protocol in which the START condition and the Slave Address are both
repeated. The TPS60250 provides two I2C Slave Addresses using an internal EEPROM in case more than 1
device is used in the system. The TPS60250 primary I2C Slave Address is 1110111 and the TPS60252 primary
I2C Slave Address is 1110110. For the alternative I2C addresses, contact the factory.
Copyright © 2007–2008, Texas Instruments Incorporated
Product Folder Link(s): TPS60250 TPS60252
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13
TPS60250
TPS60252
SLVS769C – APRIL 2007 – REVISED APRIL 2008............................................................................................................................................................ www.ti.com
Enable Control Register (Address: 0x00h)
ENABLE
B7
B6
B5
B4
B3
B2
B1
B0
X
ENold
ENmain
ENsub2
ENsub1
ENaux
DM5H
DM5L
BIT NAME
Bit 6
ENold (Enable Open Lamp Detection)
1: Open Lamp Detection Enabled
0: Open Lamp Detection Disabled
Bit 5
ENmain
1: Enable Main Display LEDs (DM1-DM4)
0: Disable Main Display LEDs
Bit 4
ENsub2
1: Enable Sub Display LED 2 (DS2)
0: Disable Sub Display LED 2
Bit 3
ENsub1
1: Enable Sub Display LED 1 (DS1)
0: Disable Sub Display LED 1
Bit 2
ENaux
1: Enable Aux Display LED (DM5)
0: Disable Aux Display LED
Bits 1,0
DM5H, DM5L
DM5H
(B1)
DM5L
(B0)
0
0
Shutdown mode. All outputs disabled but keep register values
0
1
Enable the IC and Group DM5 as main display with maximum current of 25 mA
1
0
Enable the IC and set DM5 as Aux output with maximum current of 80 mA.
Dimming steps determined by Iaux0 and Iaux1 bits.
1
1
Shutdown mode. All outputs disabled but keep register values
DM5 Mode and Shutdown Mode
Sub Display Current Control Register (Address: 0x01h)
SUB DISP
CURRENT
B7
B6
B5
B4
B3
B2
B1
B0
BIT NAME
X
X
Isub5
Isub4
Isub3
Isub2
Isub1
Isub0
Bits 5 - 0
Isub5 - Isub0 (total 64 steps)
6-Bit command (64 steps) to these bits sets the current for DS1 and DS2.
For LED currents between 0 and 1.5 mA, one step = 0.1 mA increment
For LED currents between 1.5 and 25.5 mA, one step = 0.5 mA increment
Main Display Current Control Register (Address: 0x02h)
MAIN DISP
CURRENT
B7
B6
B5
B4
B3
B2
B1
B0
BIT NAME
X
X
Imain5
Imain4
Imain3
Imain2
Imain1
Imain0
Bits 5 - 0
14
Imain5 - Imain0 (total 64 steps)
6-Bit command (64 steps) to these bits sets the current for DM1-DM4.
For LED currents between 0 and 1.5 mA, one step = 0.1mA increment
For LED currents between 1.5 and 25.5 mA, one step = 0.5 mA increment
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TPS60250
TPS60252
www.ti.com............................................................................................................................................................ SLVS769C – APRIL 2007 – REVISED APRIL 2008
Aux Output Brightness and Operation Mode Control Register (Address: 0x03h)
AUX DISP
CURRENT
B7
B6
B5
B4
B3
B2
B1
B0
BIT NAME
Iaux5
Iaux4
Iaux3
Iaux2
Iaux1
Iaux0
Mode1
Mode0
Bits 7 - 2 (DM5 set to Main Display Mode)
Iaux5 - Iaux0 (total 64 steps)
6-Bit command (64 steps) to these bits sets the current for DM5.
For LED currents between 0 and 1.5 mA, one step = 0.1mA increment
For LED currents between 1.5 and 25.5 mA, one step = 0.5 mA increment
Bits 7 - 2 (DM5 set to Aux Display Mode)
Bits 1,0
Iaux5
(B7)
Iaux4
(B6)
Iaux3
(B5)
Iaux2
(B4)
Iaux1
(B3)
Iaux0
(B2)
Aux Dimming
Step
X
X
X
X
0
0
20%
X
X
X
X
0
1
40%
X
X
X
X
1
0
70%
X
X
X
X
1
1
100%
Mode1, Mode0
Mode1 Mode0
(B1)
(B0)
TPS60250/2 Mode
0
0
Auto-Switchover Mode. The TPS60250/2 select
1×/1.5× mode as described in the Operating Principle
section.
0
1
1× Mode. TPS60250/2 remain in 1× mode regardless
of the input voltage. LED current may not regulate at
lower input voltages when in this mode.
1
0
1.5× Mode. TPS60250/2 remain in 1.5× mode
regardless of the input voltage.
1
1
Auto-Switchover Mode. The TPS60250/2 select
1×/1.5× mode as described in the Operating Principle
section.
Copyright © 2007–2008, Texas Instruments Incorporated
Product Folder Link(s): TPS60250 TPS60252
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TPS60250
TPS60252
SLVS769C – APRIL 2007 – REVISED APRIL 2008............................................................................................................................................................ www.ti.com
APPLICATION CIRCUITS
Main Display
GND DM4 DM3 DM2
C1DM1
C2
1 mF
C3
1mF
C2+
DS2
C2-
DS1
C1+
DM5
VIN SCLK SDAT
Sub Display
VOUT
C4
4.7mF
C1
4.7 mF
I2C Interface
On/Off, Digital Dimming
Figure 20. The Typical Application Circuit for Sub and Main Display
As shown in Figure 20, typical application circuit for a clam shell phone has 5 main LEDs and 2 sub LEDs.
Recently, the LCD panel makers have developed a new panel that has an improved transparency rate which
makes system efficiency with 100 µA LED current a critical load point. To meet system efficiency requirements
with the light load conditions for the new LCD operating panels, the TPS60250/2 have a maximum 55 µA
operating current with 100 µA output load condition. In this application, the controller always operates in 1× mode
due to the WLED's low forward voltage drop (about 2.6 VF with a 100 µA WLED current). Thus, the total
efficiency at the light load condition is determined using Equation 1:
IO VF
h Light +
Vin ǒI O ) I opǓ
(1)
Where:
IO: Output Load (WLED) Current
VF: Forward Voltage Drop of WLED
Vin: Input Voltage
Iop: Operating Current of LED Driver
16
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TPS60250
TPS60252
www.ti.com............................................................................................................................................................ SLVS769C – APRIL 2007 – REVISED APRIL 2008
Main Display
Auxiliary Port for Key Pad
or Flash Light
GND DM 4 DM3 DM2
C1DM1
C2
1mF
C3
1mF
C2+
DS 2
C2-
DS 1
C1+
DM5
VIN SCLK SDAT
Sub Display
VOUT
C4
4.7 mF
2
C1
4.7 mF
I C Interface
On/Off, Digital Dimming
Figure 21. The Typical Application Circuit for Sub, Main, and Keypad Backlight
Figure 21 shows the typical application circuit for sub, main, and keypad backlight. In this application, DM5 is
assigned as the auxiliary input for the keypad lighting application.
LAYOUT GUIDELINES
There are several points to consider when laying out a PCB for charge pump based solutions. In general, all
capacitors should be as close as possible to the device. This is especially important when placing the flying
capacitors (C2, C3 in Figure 20 and Figure 21). In cases where DM5 is assigned for torch/flash applications, with
a maximum 80 mA WLED current, this current path must be kept wide to reduce the trace resistance.
Copyright © 2007–2008, Texas Instruments Incorporated
Product Folder Link(s): TPS60250 TPS60252
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17
TPS60250
TPS60252
SLVS769C – APRIL 2007 – REVISED APRIL 2008............................................................................................................................................................ www.ti.com
Revision History
Changes from Revision B (November 2007) to Revision C ........................................................................................... Page
•
18
Added TPS60252 device information .................................................................................................................................... 1
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Copyright © 2007–2008, Texas Instruments Incorporated
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PACKAGE OPTION ADDENDUM
www.ti.com
11-Jul-2008
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TPS60250RTER
ACTIVE
QFN
RTE
16
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS60250RTERG4
ACTIVE
QFN
RTE
16
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS60250RTET
ACTIVE
QFN
RTE
16
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS60250RTETG4
ACTIVE
QFN
RTE
16
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS60252RTER
ACTIVE
QFN
RTE
16
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS60252RTERG4
ACTIVE
QFN
RTE
16
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS60252RTET
ACTIVE
QFN
RTE
16
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS60252RTETG4
ACTIVE
QFN
RTE
16
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Jul-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
TPS60250RTER
QFN
RTE
16
SPQ
Reel
Reel
Diameter Width
(mm) W1 (mm)
A0 (mm)
B0 (mm)
K0 (mm)
P1
(mm)
W
Pin1
(mm) Quadrant
3000
330.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
TPS60250RTET
QFN
RTE
16
250
180.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
TPS60252RTER
QFN
RTE
16
3000
330.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
TPS60252RTET
QFN
RTE
16
250
180.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Jul-2008
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TPS60250RTER
QFN
RTE
16
3000
346.0
346.0
29.0
TPS60250RTET
QFN
RTE
16
250
190.5
212.7
31.8
TPS60252RTER
QFN
RTE
16
3000
346.0
346.0
29.0
TPS60252RTET
QFN
RTE
16
250
190.5
212.7
31.8
Pack Materials-Page 2
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