TPS62200,, TPS62201 TPS62202, TPS62203, TPS62207 TPS62204, TPS62205, TPS62208 www.ti.com SLVS417E – MARCH 2002 – REVISED MAY 2006 HIGH-EFFICIENCY, SOT23 STEP-DOWN, DC-DC CONVERTER FEATURES • • • • • • • • • • • High Efficiency Synchronous Step-Down Converter With up to 95% Efficiency 2.5-V to 6-V Input Voltage Range Adjustable Output Voltage Range From 0.7 V to VI Fixed Output Voltage Options Available Up to 300 mA Output Current 1-MHz Fixed Frequency PWM Operation Highest Efficiency Over Wide Load Current Range Due to Power Save Mode 15-µA Typical Quiescent Current Soft Start 100% Duty Cycle Low-Dropout Operation Dynamic Output-Voltage Positioning Available in a 5-Pin SOT23 Package APPLICATIONS • • • • • • PDAs and Pocket PC Cellular Phones, Smart Phones Low Power DSP Supply Digital Cameras Portable Media Players Portable Equipment TPS62202 VI 2.5 V − 6 V 1 C1 4.7 µF 2 VI SW L1 5 10 µH GND 3 EN FB 4 DESCRIPTION The TPS6220x devices are a family of high-efficiency synchronous step-down converters ideally suited for portable systems powered by 1-cell Li-Ion or 3-cell NiMH/NiCd batteries. The devices are also suitable to operate from a standard 3.3-V or 5-V voltage rail. With an output voltage range of 6 V down to 0.7 V and up to 300 mA output current, the devices are ideal to power low voltage DSPs and processors used in PDAs, pocket PCs, and smart phones. Under nominal load current, the devices operate with a fixed switching frequency of typically 1 MHz. At light load currents, the part enters the power save mode operation; the switching frequency is reduced and the quiescent current is typically only 15 µA; therefore, it achieves the highest efficiency over the entire load current range. The TPS6220x needs only three small external components. Together with the SOT23 package, a minimum system solution size is achieved. An advanced fast response voltage mode control scheme achieves superior line and load regulation with small ceramic input and output capacitors. EFFICIENCY vs LOAD CURRENT 100 VO 1.8 V / 300 mA C2 10 µF 95 VO = 1.8 V 90 VI = 2.7 V 85 Efficiency − % • 80 VI = 3.7 V 75 VI = 5 V 70 65 60 55 Figure 1. Typical Application (Fixed Output Voltage Version) 50 45 40 0.010 0.100 1 10 100 1000 IL −Load Current − mA Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2002–2006, Texas Instruments Incorporated TPS62200,, TPS62201 TPS62202, TPS62203, TPS62207 TPS62204, TPS62205, TPS62208 www.ti.com SLVS417E – MARCH 2002 – REVISED MAY 2006 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION TA -40°C to 85°C (1) (1) OUTPUT VOLTAGE SOT23 PACKAGE SYMBOL Adjustable TPS62200DBV PHKI 1.2 V TPS62207DBV PJGI 1.5 V TPS62201DBV PHLI 1.6 V TPS62204DBV PHSI 1.8 V TPS62202DBV PHMI 1.875 V TPS62208DBV ALW 2.5 V TPS62205DBV PHTI 3.3 V TPS62203DBV PHNI The DBV package is available in tape and reel. Add R suffix (DBVR) to order quantities of 3000 parts. Add T suffix (DBVT) to order quantities of 250 parts DBV PACKAGE (TOP VIEW) VI 1 GND 2 EN 3 5 SW 4 FB Terminal Functions TERMINAL NAME 2 NO. I/O DESCRIPTION EN 3 I This is the enable pin of the device. Pulling this pin to ground forces the device into shutdown mode. Pulling this pin to Vin enables the device. This pin must not be left floating and must be terminated. FB 4 I This is the feedback pin of the device. Connect this pin directly to the output if the fixed output voltage version is used. For the adjustable version an external resistor divider is connected to this pin. The internal voltage divider is disabled for the adjustable version. GND 2 SW 5 I/O VI 1 I Ground Connect the inductor to this pin. This pin is the switch pin and is connected to the internal MOSFET switches. Supply voltage pin Submit Documentation Feedback TPS62200,, TPS62201 TPS62202, TPS62203, TPS62207 TPS62204, TPS62205, TPS62208 www.ti.com SLVS417E – MARCH 2002 – REVISED MAY 2006 FUNCTIONAL BLOCK DIAGRAM VI Current Limit Comparator + _ Undervoltage Lockout Bias Supply + _ Soft Start V V(COMP) I REF Skip Comparator REF 1 MHz Oscillator P-Channel Power MOSFET Sawtooth Generator Comparator S + _ R Driver Shoot-Through Logic Control Logic Comparator High SW N-Channel Power MOSFET Comparator Low Comparator Low 2 Load Comparator + _ Comparator High + Gm _ Comparator Low Comparator Low 2 EN R1 Compensation VREF = 0.5 V + _ R2 See Note FB GND For the adjustable version (TPS62200) the internal feedback divider is disabled and the FB pin is directly connected to the internal GM amplifier DETAILED DESCRIPTION OPERATION The TPS6220x is a synchronous step-down converter operating with typically 1-MHz fixed frequency pulse width modulation (PWM) at moderate to heavy load currents and in power save mode operating with pulse frequency modulation (PFM) at light load currents. During PWM operation the converter uses a unique fast response, voltage mode, controller scheme with input voltage feed forward. This achieves good line and load regulation and allows the use of small ceramic input and output capacitors. At the beginning of each clock cycle initiated by the clock signal (S), the P-channel MOSFET switch is turned on, and the inductor current ramps up until the comparator trips and the control logic turns off the switch. The current limit comparator also turns off the switch in case the current limit of the P-channel switch is exceeded. Then the N-channel rectifier switch is turned on and the inductor current ramps down. The next cycle is initiated by the clock signal again turning off the N-channel rectifier and turning on the P-channel switch. Submit Documentation Feedback 3 TPS62200,, TPS62201 TPS62202, TPS62203, TPS62207 TPS62204, TPS62205, TPS62208 www.ti.com SLVS417E – MARCH 2002 – REVISED MAY 2006 DETAILED DESCRIPTION (continued) The GM amplifier and input voltage determines the rise time of the Sawtooth generator; therefore any change in input voltage or output voltage directly controls the duty cycle of the converter. This gives a very good line and load transient regulation. POWER SAVE MODE OPERATION As the load current decreases, the converter enters the power save mode operation. During power save mode, the converter operates with reduced switching frequency in PFM mode and with a minimum quiescent current to maintain high efficiency. Two conditions allow the converter to enter the power save mode operation. One is when the converter detects the discontinuous conduction mode. The other is when the peak switch current in the P-channel switch goes below the skip current limit. The typical skip current limit can be calculated as I skip v 66 mA ) Vin 160 W During the power save mode the output voltage is monitored with the comparator by the thresholds comp low and comp high. As the output voltage falls below the comp low threshold set to typically 0.8% above Vout nominal, the P-channel switch turns on. The P-channel switch is turned off as the peak switch current is reached. The typical peak switch current can be calculated: I peak + 66 mA ) Vin 80 W The N-channel rectifier is turned on and the inductor current ramps down. As the inductor current approaches zero the N-channel rectifier is turned off and the P-channel switch is turned on again, starting the next pulse. The converter continues these pulses until the comp high threshold (set to typically 1.6% above Vout nominal) is reached. The converter enters a sleep mode, reducing the quiescent current to a minimum. The converter wakes up again as the output voltage falls below the comp low threshold again. This control method reduces the quiescent current typically to 15 µA and reduces the switching frequency to a minimum, thereby achieving the high converter efficiency. Setting the skip current thresholds to typically 0.8% and 1.6% above the nominal output voltage at light load current results in a dynamic output voltage achieving lower absolute voltage drops during heavy load transient changes. This allows the converter to operate with a small output capacitor of just 10 µF and still have a low absolute voltage drop during heavy load transient changes. Refer to Figure 2 for detailed operation of the power save mode. PFM Mode at Light Load 1.6% Comparator High 0.8% Comparator Low Comparator Low 2 VO PWM Mode at Medium to Full Load Figure 2. Power Save Mode Thresholds and Dynamic Voltage Positioning The converter enters the fixed frequency PWM mode again as soon as the output voltage falls below the comp low 2 threshold. 4 Submit Documentation Feedback TPS62200,, TPS62201 TPS62202, TPS62203, TPS62207 TPS62204, TPS62205, TPS62208 www.ti.com SLVS417E – MARCH 2002 – REVISED MAY 2006 DETAILED DESCRIPTION (continued) DYNAMIC VOLTAGE POSITIONING As described in the power save mode operation sections and as detailed in Figure 2, the output voltage is typically 0.8% above the nominal output voltage at light load currents, as the device is in power save mode. This gives additional headroom for the voltage drop during a load transient from light load to full load. During a load transient from full load to light load, the voltage overshoot is also minimized due to active regulation turning on the N-channel rectifier switch. SOFT START The TPS6220x has an internal soft start circuit that limits the inrush current during start-up. This prevents possible voltage drops of the input voltage in case a battery or a high impedance power source is connected to the input of the TPS6220x. The soft start is implemented as a digital circuit increasing the switch current in steps of typically 60 mA,120 mA, 240 mA and then the typical switch current limit of 480 mA. Therefore the start-up time mainly depends on the output capacitor and load current. Typical start-up time with 10 µF output capacitor and 200 mA load current is 800 µs. LOW DROPOUT OPERATION 100% DUTY CYCLE The TPS6220x offers a low input to output voltage difference, while still maintaining operation with the 100% duty cycle mode. In this mode, the P-channel switch is constantly turned on. This is particularly useful in battery powered applications to achieve longest operation time by taking full advantage of the whole battery voltage range. The minimum input voltage to maintain regulation, depending on the load current and output voltage, can be calculated as Vin min + Vout max ) Iout max ǒrds(ON)max ) RLǓ Ioutmax = maximum output current plus inductor ripple current rds(ON)max = maximum P-channel switch rds(ON) RL = DC resistance of the inductor Voutmax = nominal output voltage plus maximum output voltage tolerance ENABLE Pulling the enable low forces the part into shutdown, with a shutdown quiescent current of typically 0.1 µA. In this mode, the P-channel switch and N-channel rectifier are turned off, the internal resistor feedback divider is disconnected, and the whole device is in shutdown mode. If an output voltage, which could be an external voltage source or super cap, is present during shutdown, the reverse leakage current is specified under electrical characteristics. For proper operation the enable pin must be terminated and must not be left floating. Pulling the enable high starts up the TPS6220x with the soft start as previously described. UNDERVOLTAGE LOCKOUT The undervoltage lockout circuit prevents the device from misoperation at low input voltages. It prevents the converter from turning on the switch or rectifier MOSFET under undefined conditions. Submit Documentation Feedback 5 TPS62200,, TPS62201 TPS62202, TPS62203, TPS62207 TPS62204, TPS62205, TPS62208 www.ti.com SLVS417E – MARCH 2002 – REVISED MAY 2006 ABSOLUTE MAXIMUM RATINGS over operating free-air temperature (unless otherwise noted) (1) UNIT Supply voltages, VI (2) -0.3 V to 7.0 V Voltages on pins SW, EN, FB (2) -0.3 V to VCC +0.3 V Continuous power dissipation, PD See Dissipation Rating Table Operating junction temperature range, TJ -40°C to 150°C Storage temperature, Tstg -65°C to 150°C Lead temperature (soldering, 10 sec) (1) (2) 260°C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to network ground terminal. DISSIPATION RATING TABLE PACKAGE RθJA TA ≤ 25°C POWER RATING TA = 70°C POWER RATING TA = 85°C POWER RATING DBV 250°/W 400 mW 220 mW 160 mW RECOMMENDED OPERATING CONDITIONS MIN NOM MAX UNIT Supply voltage, VI 2.5 6.0 V Output voltage range for adjustable output voltage version, VO 0.7 VI V Output current, IO Inductor, L 300 (1) 4.7 Input capacitor, CI (1) Output capacitor, CO mA 10 µH 4.7 µF (1) 10 µF Operating ambient temperature, TA 40 85 °C Operating junction temperature, TJ 40 125 °C (1) See the application section for further information. ELECTRICAL CHARACTERISTICS VI = 3.6 V, VO = 1.8 V, IO = 200 mA, EN = VIN, TA = -40°C to 85°C, typical values are at TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SUPPLY CURRENT VI Input voltage range IQ Operating quiescent current IO = 0 mA, Device is not switching 2.5 Shutdown supply current EN = GND 15 0.1 Undervoltage lockout threshold 1.5 EN high level input voltage 1.3 6.0 V 30 µA 1 µA 2.0 V ENABLE V(EN) V EN low level input voltage I(EN) EN input bias current 0.4 V µA EN = GND or VIN 0.01 0.1 VIN = VGS = 3.6 V 530 690 VIN = VGS = 2.5 V 670 850 VIN = VGS = 3.6 V 430 540 VIN = VGS = 2.5 V 530 660 VDS = 6.0 V 0.1 1 POWER SWITCH P-channel MOSFET on-resistance rds(ON) N-channel MOSFET on-resistance Ilkg_(P) 6 P-channel leakage current Submit Documentation Feedback mΩ mΩ µA TPS62200,, TPS62201 TPS62202, TPS62203, TPS62207 TPS62204, TPS62205, TPS62208 www.ti.com SLVS417E – MARCH 2002 – REVISED MAY 2006 ELECTRICAL CHARACTERISTICS (continued) VI = 3.6 V, VO = 1.8 V, IO = 200 mA, EN = VIN, TA = -40°C to 85°C, typical values are at TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS Ilkg_(N) N-channel leakage current VDS = 6.0 V I(LIM) P-channel current limit 2.5 V < Vin < 6.0 V MIN TYP MAX UNIT 0.1 1 µA 380 480 670 mA 650 1000 1500 kHz OSCILLATOR fS Switching frequency OUTPUT VO Adjustable output voltage range Vref Reference voltage Feedback voltage 0.7 VIN 0.5 (1) Fixed output voltage (1) VO TPS62200 TPS62200 VI = 3.6 V to 6.0 V, IO = 0 mA Adjustable VI = 3.6 V to 6.0 V, 0 mA ≤ IO ≤ 300 mA TPS62207 VI = 2.5 V to 6.0 V, IO = 0 mA 1.2 V VI = 2.5 V to 6.0 V, 0 mA ≤ IO ≤ 300 mA TPS62201 VI = 2.5 V to 6.0 V, IO = 0 mA 1.5 V VI = 2.5 V to 6.0 V, 0 mA ≤ IO ≤ 300 mA TPS62204 VI = 2.5 V to 6.0 V, IO = 0 mA 1.6 V VI = 2.5 V to 6.0 V, 0 mA ≤ IO ≤ 300 mA TPS62202 VI = 2.5 V to 6.0 V, IO = 0 mA 1.8 V VI = 2.5 V to 6.0 V, 0 mA ≤ IO ≤ 300 mA TPS62208 VI = 2.5 V to 6.0 V, IO = 0 mA 1.875 V VI = 2.5 V to 6.0 V, 0 mA ≤ IO ≤ 300 mA TPS62205 VI = 2.7 V to 6.0 V, IO = 0 mA 2.5 V VI = 2.7 V to 6.0 V, 0 mA ≤ IO ≤ 300 mA TPS62203 VI = 3.6 V to 6.0 V, IO = 0 mA 3.3 V VI = 3.6 V to 6.0 V, 0 mA ≤ IO ≤ 300 mA V 0% 3% -3% 3% 0% 3% -3% 3% 0% 3% -3% 3% 0% 3% -3% 3% 0% 3% -3% 3% 0% 3% -3% 3% 0% 3% -3% 3% 0% 3% -3% V 3% Line regulation VI = 2.5 V to 6.0 V, IO = 10 mA Load regulation IO = 100 mA to 300 mA Ilkg Leakage current into SW pin Vin > Vout, 0 V ≤ Vsw ≤ Vin 0.1 1 µA Ilkg(Rev) Reverse leakage current into pin SW Vin = open, EN = GND, VSW = 6.0 V 0.1 1 µA (1) 0.26 %/V 0.0014 %/mA For output voltages ≤ 1.2 V a 22 µF output capacitor value is required to achieve a maximum output voltage accuracy of 3% while operating in power save mode (PFM mode) Submit Documentation Feedback 7 TPS62200,, TPS62201 TPS62202, TPS62203, TPS62207 TPS62204, TPS62205, TPS62208 www.ti.com SLVS417E – MARCH 2002 – REVISED MAY 2006 TYPICAL CHARACTERISTICS Table of Graphs FIGURES vs Load current 3,4,5 vs Input voltage 6 No load quiescent current vs Input voltage 7 fs Switching frequency vs Temperature 8 Vo Output voltage vs Output current 9 rds(on) - P-channel switch, vs Input voltage 10 rds(on) - N-Channel rectifier switch vs Input voltage 11 η Efficiency IQ rds(on) Line transient response 12 Load transient response 13 Power save mode operation 14 Start-up 15 EFFICIENCY vs LOAD CURRENT 100 EFFICIENCY vs LOAD CURRENT 100 VO = 3.3 V 95 90 95 VI = 3.7 V 90 85 VI = 5 V Efficiency − % Efficency − % 80 75 70 65 75 65 60 60 55 55 50 50 45 45 0.100 1 10 100 IL − Load Current − mA 1000 VI = 3.7 V 70 40 0.010 Figure 3. 8 VI = 2.7 V 85 80 40 0.010 VO = 1.8 V VI = 5 V 0.100 1 10 100 IL −Load Current − mA Figure 4. Submit Documentation Feedback 1000 TPS62200,, TPS62201 TPS62202, TPS62203, TPS62207 TPS62204, TPS62205, TPS62208 www.ti.com SLVS417E – MARCH 2002 – REVISED MAY 2006 EFFICIENCY vs LOAD CURRENT 100 EFFICIENCY vs INPUT VOLTAGE 100 VO = 1.5 V VO = 1.8 V 95 90 95 VI = 2.7 V IL = 150 mA 85 75 Efficiency − % Efficency − % 80 VI = 3.7V 70 65 60 IL = 300 mA IL = 1 mA 85 80 VI = 5 V 55 90 50 75 45 40 0.010 0.100 1 10 100 IL − Load Current − mA 70 2.50 1000 3 3.50 4 4.50 5 VI − Input Voltage − V Figure 5. Figure 6. NO LOAD QUIESCENT CURRENT vs INPUT VOLTAGE FREQUENCY vs TEMPERATURE 25 6 1080 1075 1065 TA = 25°C 15 VI = 6 V 1070 TA = 85°C 20 f − Frequency − kHz N0 Load Quiescent Current − µ A 5.50 TA = −40°C 10 VI = 3.6 V 1060 1055 1050 1045 VI = 2.5 V 1040 5 1035 1030 0 2.50 3 3.50 4 4.50 5 5.50 6 1025 −40 −30 −20 −10 0 10 20 30 40 50 60 70 80 TA − Temperature − °C VI − Input Voltage − V Figure 7. Figure 8. Submit Documentation Feedback 9 TPS62200,, TPS62201 TPS62202, TPS62203, TPS62207 TPS62204, TPS62205, TPS62208 www.ti.com SLVS417E – MARCH 2002 – REVISED MAY 2006 OUTPUT VOLTAGE vs OUTPUT CURRENT rds(on) P-CHANNEL SWITCH vs INPUT VOLTAGE 0.8 1.90 1.88 0.7 r ds(on) − P-Channel Switch − Ω VO − Outrput Voltage − V 1.86 1.84 PFM Mode 1.82 1.80 PWM Mode 1.78 1.76 1.74 TA = 85°C 0.6 TA = 25°C 0.5 TA = −40°C 0.4 0.3 1.72 1.70 0 50 100 150 200 IO − Output Current − mA 250 300 0.2 2.5 3 3.5 4 4.5 5 VI − Input Voltage − V Figure 9. Figure 10. rds(on) P-CHANNEL SWITCH vs INPUT VOLTAGE LINE TRANSIENT RESPONSE rDS(on) N-Channel Switch — Ω 0.8 0.7 VO 20 mV/div 0.6 TA = 85°C 0.5 TA = 25°C 0.4 TA = −40°C VI 3.6 V to 4.6 V 0.3 0.2 2.5 3 3.5 4 4.5 5 VI − Input Voltage − V 5.5 6 Figure 11. 10 200 µs/div Figure 12. Submit Documentation Feedback 5.5 6 TPS62200,, TPS62201 TPS62202, TPS62203, TPS62207 TPS62204, TPS62205, TPS62208 www.ti.com SLVS417E – MARCH 2002 – REVISED MAY 2006 LOAD TRANSIENT RESPONSE VO 50 mV/div POWER SAVE MODE OPERATION VSW 5 V/div VO 20 mV/div IO 3 mA to 270 mA IL 100 mA/div 100 µs/div 2 µs/div Figure 13. Figure 14. START-UP VO = 1.8 V/200 mA Enable 2 V/div VO 1 V/div IL 50 mA/div 100 µs/div Figure 15. Submit Documentation Feedback 11 TPS62200,, TPS62201 TPS62202, TPS62203, TPS62207 TPS62204, TPS62205, TPS62208 www.ti.com SLVS417E – MARCH 2002 – REVISED MAY 2006 APPLICATION INFORMATION ADJUSTABLE OUTPUT VOLTAGE VERSION When the adjustable output voltage version TPS62200 is used, the output voltage is set by the external resistor divider. See Figure 16. The output voltage is calculated as ǒ1 ) R1 Ǔ R2 V out + 0.5 V • R1 + R2 ≤ 1 MΩ and internal reference voltage V(ref)typ = 0.5 V R1 + R2 should not be greater than 1 MΩ for reasons of stability. To keep the operating quiescent current to a minimum, the feedback resistor divider should have high impedance with R1+R2 ≤ 1 MΩ. Because of the high impedance and the low reference voltage of Vref = 0.5 V, the noise on the feedback pin (FB) needs to be minimized. Using a capacitive divider C1 and C2 across the feedback resistors minimizes the noise at the feedback without degrading the line or load transient performance. C1 and C2 should be selected as C1 + • • 2 p 1 10 kHz R1 R1 = upper resistor of voltage divider C1 = upper capacitor of voltage divider For C1 a value should be chosen that comes closest to the calculated result. C2 + R1 R2 • • C1 R2 = lower resistor of voltage divider C2 = lower capacitor of voltage divider For C2 the selected capacitor value should always be selected larger than the calculated result. For example, in Figure 16 for C2, 100 pF are selected for a calculated result of C2 = 86.17 pF. If quiescent current is not a key design parameter, C1 and C2 can be omitted, and a low-impedance feedback divider must be used with R1+R2 <100 kΩ. This design reduces the noise available on the feedback pin (FB) as well, but increases the overall quiescent current during operation. TPS62200 VI 2.5 V − 6 V C3 4.7 µF VI SW R1 470k GND EN L1 10 µH C1 33 pF C4 10 µF VO 1.8 V / 300 mA FB R2 180k C2 100 pF Figure 16. Typical Application Circuit for the Adjustable Output Voltage INDUCTOR SELECTION The TPS6220x device is optimized to operate with a typical inductor value of 10 µH. For high efficiencies, the inductor should have a low dc resistance to minimize conduction losses. Although the inductor core material has less effect on efficiency than its dc resistance, an appropriate inductor core material must be used. 12 Submit Documentation Feedback TPS62200,, TPS62201 TPS62202, TPS62203, TPS62207 TPS62204, TPS62205, TPS62208 www.ti.com SLVS417E – MARCH 2002 – REVISED MAY 2006 APPLICATION INFORMATION (continued) The inductor value determines the inductor ripple current. The larger the inductor value, the smaller the inductor ripple current, and the lower the conduction losses of the converter. On the other hand, larger inductor values cause a slower load transient response. Usually the inductor ripple current, as calculated below, is around 20% of the average output current. In order to avoid saturation of the inductor, the inductor should be rated at least for the maximum output current of the converter plus the inductor ripple current that is calculated as DI + Vout L 1– Vout Vin L f I Lmax + I outmax ) DI L 2 f = switching frequency (1 MHz typical, 650 kHz minimal) L = inductor valfue ∆IL = peak-to-peak inductor ripple current ILmax = maximum inducator current The highest inductor current occurs at maximum Vin. A more conservative approach is to select the inductor current rating just for the maximum switch current of 670 mA. Refer to Table 1 for inductor recommendations. Table 1. Recommended Inductors INDUCTOR VALUE COMPONENT SUPPLIER COMMENTS 10 µH 10 µH 10 µH 10 µH Sumida CDRH5D28-100 Sumida CDRH5D18-100 Sumida CDRH4D28-100 Coilcraft DO1608-103 High efficiency 6.8 µH 10 µH 10 µH 10 µH 10 µH Sumida CDRH3D16-6R8 Sumida CDRH4D18-100 Sumida CR32-100 Sumida CR43-100 Murata LQH4C100K04 Smallest solution INPUT CAPACITOR SELECTION Because the buck converter has a pulsating input current, a low ESR input capacitor is required. This results in the best input voltage filtering and minimizing the interference with other circuits caused by high input voltage spikes. Also the input capacitor must be sufficiently large to stabilize the input voltage during heavy load transients. For good input voltage filtering, usually a 4.7 µF input capacitor is sufficient. It can be increased without any limit for better input-voltage filtering. If ceramic output capacitors are used, the capacitor RMS ripple current rating always meets the application requirements. Ceramic capacitors show a good performance because of the low ESR value, and they are less sensitive against voltage transients and spikes compared to tantalum capacitors. Place the input capacitor as close as possible to the input pin of the device for best performance (refer to Table 2 for recommended components). OUTPUT CAPACITOR SELECTION The advanced fast response voltage mode control scheme of the TPS6220x allows the use of tiny ceramic capacitors with a value of 10 µF without having large output voltage under and overshoots during heavy load transients. Ceramic capacitors with low ESR values have the lowest output voltage ripple and are therefore recommended. If required, tantalum capacitors may be used as well (refer to Table 2 for recommended components). Submit Documentation Feedback 13 TPS62200,, TPS62201 TPS62202, TPS62203, TPS62207 TPS62204, TPS62205, TPS62208 www.ti.com SLVS417E – MARCH 2002 – REVISED MAY 2006 At nominal load current the device operates in PWM mode and the overall output voltage ripple is the sum of the voltage spike caused by the output capacitor ESR plus the voltage ripple caused by charging and discharging the output capacitor: 1– Vout Vin L f DVout + Vout ǒ8 1 Cout f Ǔ ) ESR where the highest output voltage ripple occurs at the highest input voltage Vin. At light load currents, the device operates in power save mode, and the output voltage ripple is independent of the output capacitor value. The output voltage ripple is set by the internal comparator thresholds. The typical output voltage ripple is 1% of the output voltage Vo. Table 2. Recommended Capacitors CAPACITOR VALUE CASE SIZE 4.7 µF 0805 Taiyo Yuden JMK212BY475MG COMPONENT SUPPLIER COMMENTS Ceramic 10 µF 0805 Taiyo Yuden JMK212BJ106MG TDK C12012X5ROJ106K Ceramic Ceramic 10 µF 1206 Taiyo Yuden JMK316BJ106KL TDK C3216X5ROJ106M Ceramic 22 µF 1210 Taiyo Yuden JMK325BJ226MM Ceramic LAYOUT CONSIDERATIONS For all switching power supplies, the layout is an important step in the design, especially at high peak currents and switching frequencies. If the layout is not carefully done, the regulator shows stability problems as well as EMI problems. Therefore use wide and short traces for the main current paths, as indicated in bold in Figure 17. The input capacitor, as well as the inductor and output capacitor, should be placed as close as possible to the IC pins The feedback resistor network must be routed away from the inductor and switch node to minimize noise and magnetic interference. To further minimize noise from coupling into the feedback network and feedback pin, the ground plane or ground traces must be used for shielding. This becomes very important especially at high switching frequencies of 1 MHz. TPS62200 VI 2.5 V − 6 V VI C1 4.7 µF L1 10 µH VO 1.8 V / 300 mA SW GND R1 EN FB R2 Figure 17. Layout Diagram 14 Submit Documentation Feedback Cff C2 10 µF TPS62200,, TPS62201 TPS62202, TPS62203, TPS62207 TPS62204, TPS62205, TPS62208 www.ti.com SLVS417E – MARCH 2002 – REVISED MAY 2006 TYPICAL APPLICATIONS TPS62202 VI 2.5 V to 6 V 1 2 C1 4.7 µF 3 VI SW 5 L1 10 µH C2 10 µF GND EN VO 1.8 V/300 mA FB 4 Figure 18. Li-Ion to 1.8 V Fixed Output Voltage Version TPS62202 VI 2.5 V to 6 V 1 2 C1 4.7 µF 3 VI SW 5 L1 4.7 µH C2 22 µF GND EN VO 1.8 V/300 mA FB 4 Figure 19. 1.8 V Fixed Output Voltage version Using 4.7µH Inductor TPS62200 VI 2.5 V to 6 V 1 C3 4.7 µF 2 3 VI SW 5 GND EN FB L1 10 µH R1 360 kΩ C1 47 pF R2 180 kΩ C2 100 pF C4 10 µF VO 1.5 V/300 mA 4 Figure 20. Adjustable Output Voltage Version Set to 1.5 V Submit Documentation Feedback 15 PACKAGE OPTION ADDENDUM www.ti.com 31-Jul-2006 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TPS62200DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS62200DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS62200DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS62200DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS62201DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS62201DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS62201DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS62201DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS62202DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS62202DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS62202DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS62202DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS62203DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS62203DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS62203DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS62203DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS62204DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS62204DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS62204DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS62204DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS62205DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS62205DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS62205DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS62205DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS62207DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Addendum-Page 1 Lead/Ball Finish MSL Peak Temp (3) PACKAGE OPTION ADDENDUM www.ti.com 31-Jul-2006 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TPS62207DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS62207DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS62207DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS62208DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS62208DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS62208DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS62208DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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