TPS63010 TPS63011 TPS63012 www.ti.com SLVS653B – JUNE 2008 – REVISED MAY 2012 HIGHLY EFFICIENT, SINGLE INDUCTOR BUCK-BOOST CONVERTER WITH 2-A SWITCHES Check for Samples: TPS63010, TPS63011, TPS63012 FEATURES 1 • • • • • • • • • • • • • Up to 96% Efficiency 1200-mA Output Current at 3.3 V in Step Down Mode (VIN = 3.6 V to 5.5 V) Up to 800-mA Output Current at 3.3 V in Boost Mode (VIN > 2.4 V) Automatic Transition between Step Down and Boost Mode Device Quiescent Current less than 50μA Input Voltage Range: 2 V to 5.5 V Fixed and Adjustable Output Voltage Options from 1.2 V to 5.5 V Power Save Mode for Improved Efficiency at Low Output Power Forced Fixed Frequency Operation and Synchronization possible Load Disconnect During Shutdown Output Overvoltage Protection Overtemperature Protection Available in Small 20 pin 2.126 mm x 1.922 mm, WCSP Package DESCRIPTION The TPS6301x devices provide a power supply solution for products powered by either a two-cell or three-cell alkaline, NiCd or NiMH battery, or a onecell Li-Ion or Li-polymer battery. Output currents can go as high as 1200 mA while using a single-cell LiIon or Li-Polymer Battery, and discharge it down to 2.5 V or lower. The buck-boost converter is based on a fixed frequency, pulse-width-modulation (PWM) controller using synchronous rectification to obtain maximum efficiency. At low load currents, the converter enters Power Save mode to maintain high efficiency over a wide load current range. The Power Save mode can be disabled, forcing the converter to operate at a fixed switching frequency. The maximum average current in the switches is limited to a typical value of 2200 mA. The output voltage is programmable using an external resistor divider, or is fixed internally on the chip. The converter can be disabled to minimize battery drain. During shutdown, the load is disconnected from the battery. The device is packaged in a 20-pin WCSP package measuring 2.126 mm x 1.922 mm (YFF). Figure 1. Typical Application Circuit L1 APPLICATIONS • • • • • • All Two-Cell and Three-Cell Alkaline, NiCd or NiMH or Single-Cell Li Battery Powered Products Portable Audio Players PDAs Cellular Phones Personal Medical Products White LEDs 1.5 µH L1 VIN 1.8 V to 5.5 V L2 VIN C1 10 µF VOUT VINA EN FB C2 10 µF VOUT 3.3 V Up to 1200 mA PS VSEL SYNC GND PGND TPS63011 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2008–2012, Texas Instruments Incorporated TPS63010 TPS63011 TPS63012 SLVS653B – JUNE 2008 – REVISED MAY 2012 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. AVAILABLE OUTPUT VOLTAGE OPTIONS (1) TA - 40°C to 85°C (1) (2) OUTPUT VOLTAGE DC/DC at VSEL = 1 OUTPUT VOLTAGE DC/DC at VSEL = 0 PACKAGE MARKING Adjustable Adjustable TPS63010 3.3 V 2.8 V TPS63011 3.4 V 2.9 V TPS63012 PART NUMBER (2) PACKAGE TPS63010YFF 20-Pin WCSP TPS63011YFF TPS63012YFF Contact the factory to check availability of other fixed output voltage versions. The YFF package is available taped and reeled. Add R suffix to device type (e.g., TPS63010YFFR) to order quantities of 3000 devices per reel. Add T suffix to device type (e.g., TPS63010YFFT) to order quantities of 250 devices per reel. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) TPS6301x UNITS – 0.3 to 7 V °C VI Input voltage range on VIN, VINA, VINA1, L1, L2, VOUT, PS, SYNC, VSEL, EN, FB TJ Operating junction temperature range – 40 to 150 Tstg Storage temperature range – 65 to 150 Human Body Model (HBM) ESD Voltage Machine Model (MM) (2) 2.5 (2) Charged Device Model (CDM) (2) (1) (2) kV 150 V 1 kV Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. ESD testing is performed according to the respective JESD22 JEDEC standard. DISSIPATION RATINGS TABLE (1) PACKAGE (1) THERMAL RESISTANCE ΘJA POWER RATING TA ≤ 25°C DERATING FACTOR ABOVE TA = 25°C YFF 84 °C/W 1190 mW 12 mW/°C For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. RECOMMENDED OPERATING CONDITIONS MIN Supply voltage at VIN, VINA NOM MAX UNIT 2 5.5 V Operating free air temperature range, TA – 40 85 °C Operating junction temperature range, TJ – 40 125 °C 2 Submit Documentation Feedback Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): TPS63010 TPS63011 TPS63012 TPS63010 TPS63011 TPS63012 www.ti.com SLVS653B – JUNE 2008 – REVISED MAY 2012 ELECTRICAL CHARACTERISTICS over recommended free-air temperature range and over recommended input voltage range (typical at an ambient temperature range of 25°C) (unless otherwise noted) DC/DC STAGE PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VI Input voltage range 2 5.5 V VI Input voltage range for startup 2.1 5.5 V VO TPS63010 output voltage range 1.2 5.5 VFB TPS63010 feedback voltage VFB TPS63010 feedback voltage f 0°C ≤ TA ≤ 60°C 492.5 500 489 TPS63011 output voltage VSEL = LOW, 0°C ≤ TA ≤ 60°C 2.758 TPS63011 output voltage VSEL = LOW TPS63011 output voltage TPS63011 output voltage mV 500 507 mV 2.8 2.842 V 2.750 2.8 2.850 V VSEL = HIGH, 0°C ≤ TA ≤ 60°C 3.251 3.3 3.350 V VSEL = HIGH 3.241 3.3 3.359 V TPS63012 output voltage VSEL = LOW, 0°C ≤ TA ≤ 60°C 2.857 2.9 2.944 V TPS63012 output voltage VSEL = LOW 2.848 2.9 2.952 V TPS63012 output voltage VSEL = HIGH, 0°C ≤ TA ≤ 60°C 3.349 3.4 3.451 V TPS63012 output voltage VSEL = HIGH 3.339 3.4 3.461 V 2200 2400 2600 kHz 3000 kHz Oscillator frequency Frequency range for synchronization ISW 2200 Switch current limit VIN = VINA = 3.6 V, TA = 25°C 2000 2200 High side switch on resistance VIN = VINA = 3.6 V Low side switch on resistance VIN = VINA = 3.6 V Maximum line regulation PS = HIGH 0.5% Maximum load regulation PS = HIGH 0.5% VIN VINA Iq Quiescent current VOUT (adjustable output voltage version) VIN Shutdown current mA 100 mΩ 100 mΩ 1 2 μA 40 50 μA 4 6 μA 1 VEN = 0 V, VIN = VINA = 3.6 V PS, SYNC, VSEL clamped on GND or VINA VINA 2400 IO = 0 mA, VEN = VIN = VINA = 3.6 V, VOUT = 3.3 V FB input impedance (fixed output voltage versions) IS V 503.5 MΩ 0.1 1 μA 0.1 1.5 μA UNIT CONTROL STAGE PARAMETER TEST CONDITIONS UVLO Undervoltage lockout threshold VIL EN, PS, SYNC, VSEL input low voltage VIH EN, PS, SYNC, VSEL input high voltage EN, PS, SYNC, VSEL input current VINA voltage decreasing MIN TYP MAX 1.5 1.7 1.8 V 0.4 V 1.2 Clamped on GND or VINA V 0.01 0.1 μA Output overvoltage protection 6.5 V Overtemperature protection 140 °C Overtemperature hysteresis 20 °C Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): TPS63010 TPS63011 TPS63012 Submit Documentation Feedback 3 TPS63010 TPS63011 TPS63012 SLVS653B – JUNE 2008 – REVISED MAY 2012 www.ti.com PIN ASSIGNMENTS YFF PACKAGE (TOP VIEW) A4 B4 C4 D4 E4 A3 B3 C3 D3 E3 A2 B2 C2 D2 E2 A1 B1 C1 D1 E1 Pin Functions PIN NAME NO. EN A4 FB GND E3 I/O DESCRIPTION I Enable input. (1 enabled, 0 disabled) I Voltage feedback of adjustable versions, must be connected to VOUT at fixed output voltage versions C3, D3, E4 Control / logic ground PS C4 I Enable / disable power save mode (1 disabled, 0 enabled) L1 B1,B2 I Connection for Inductor L2 D1,D2 I Connection for Inductor PGND C1,C2 SYNC B4 I Clock signal for synchronization, should be connected to GND if not used VSEL D4 I Output voltage select for fixed output voltage options (1 programs higher output voltage option, 0 programs lower output voltage option), must be connected to a defined logic signal at adjustable output voltage option. A1, A2 I Supply voltage for power stage A3 I Supply voltage for control stage VINA1 B3 O Output of the 100 Ω for designing the VINA filter VOUT E1,E2 O Buck-boost converter output VIN VINA 4 Submit Documentation Feedback Power ground Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): TPS63010 TPS63011 TPS63012 TPS63010 TPS63011 TPS63012 www.ti.com SLVS653B – JUNE 2008 – REVISED MAY 2012 FUNCTIONAL BLOCK DIAGRAM (TPS63010) L1 L2 VIN VOUT Current Sensor VINA1 VIN VOUT PGND PGND Gate Control _ VINA Modulator PS Oscillator + _ + FB VREF SYNC VSEL + − Device Control EN Temperature Control PGND PGND GND FUNCTIONAL BLOCK DIAGRAM (TPS63011, TPS63012) L1 L2 VIN VOUT Current Sensor VINA1 VIN VOUT PGND PGND Gate Control FB VSEL _ VINA Modulator PS Oscillator SYNC VSEL + + − VREF Device Control EN + _ Temperature Control PGND PGND GND Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): TPS63010 TPS63011 TPS63012 Submit Documentation Feedback 5 TPS63010 TPS63011 TPS63012 SLVS653B – JUNE 2008 – REVISED MAY 2012 www.ti.com TYPICAL CHARACTERISTICS Table 1. Table of Graphs FIGURE Maximum output current Efficiency Waveforms 6 vs Input voltage (TPS63010, VOUT = 2.5 V / VOUT = 4.5 V) 1 vs Input voltage (TPS63011, VSEL = HIGH / VSEL = LOW) 2 vs Input voltage (TPS63012, VSEL = HIGH / VSEL = LOW) 3 vs Output current (TPS63010, Power Save Enabled, VOUT = 2.5 V / VOUT = 4.5 V) 4 vs Output current (TPS63010, Power Save Disabled, VOUT = 2.5V / VOUT = 4.5V) 5 vs Output current (TPS63011, Power Save Enabled, VSEL = HIGH / VSEL = LOW) 6 vs Output current (TPS63011, Power Save Disabled, VSEL = HIGH / VSEL = LOW) 7 vs Output current (TPS63012, Power Save Enabled, VSEL = HIGH / VSEL = LOW) 8 vs Output current (TPS63012, Power Save Disabled, VSEL = HIGH / VSEL = LOW) 9 vs Input voltage (TPS63010, Power Save Enabled, VOUT = 2.5V, IOUT = {10; 100; 500; 1000 mA}) 10 vs Input voltage (TPS63010, Power Save Enabled, VOUT = 4.5V, IOUT = {10; 100; 500; 1000 mA}) 11 vs Input voltage (TPS63010, Power Save Disabled, VOUT = 2.5V, IOUT = {10; 100; 500; 1000 mA}) 12 vs Input voltage (TPS63010, Power Save Disabled, VOUT = 4.5V, IOUT = {10; 100; 500; 1000 mA}) 13 vs Input voltage (TPS63011, Power Save Enabled, VSEL = HIGH, IOUT = {10; 100; 500; 1000 mA}) 14 vs Input voltage (TPS63011, Power Save Enabled, VSEL = LOW, IOUT = {10; 100; 500; 1000 mA}) 15 vs Input voltage (TPS63011, Power Save Disabled, VSEL = HIGH, IOUT = {10; 100; 500; 1000 mA}) 16 vs Input voltage (TPS63011, Power Save Disabled, VSEL = LOW, IOUT = {10; 100; 500; 1000 mA}) 17 vs Input voltage (TPS63012, Power Save Enabled, VSEL = HIGH, IOUT = {10; 100; 500; 1000 mA}) 18 vs Input voltage (TPS63012, Power Save Enabled, VSEL = LOW, IOUT = {10; 100; 500; 1000 mA}) 19 vs Input voltage (TPS63012, Power Save Disabled, VSEL = HIGH, IOUT = {10; 100; 500; 1000 mA}) 20 vs Input voltage (TPS63012, Power Save Disabled, VSEL = LOW, IOUT = {10; 100; 500; 1000 mA}) 21 Load transient response (TPS63011, VIN < VOUT, VSEL = HIGH) 22 Load transient response (TPS63011, VIN > VOUT, VSEL = HIGH) 23 Load transient response (TPS63012, VIN < VOUT, VSEL = HIGH) 24 Load transient response (TPS63012, VIN > VOUT, VSEL = HIGH) 25 Line transient response (TPS63011, VSEL = HIGH, Iout = 300 mA) 26 Line transient response (TPS63012, VSEL = HIGH, Iout = 300 mA) 27 Startup after enable (TPS63011, VSEL = HIGH) 28 Startup after enable (TPS63012, VSEL = HIGH) 29 Submit Documentation Feedback Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): TPS63010 TPS63011 TPS63012 TPS63010 TPS63011 TPS63012 www.ti.com SLVS653B – JUNE 2008 – REVISED MAY 2012 MAXIMUM OUTPUT CURRENT vs INPUT VOLTAGE (TPS63010) MAXIMUM OUTPUT CURRENT vs INPUT VOLTAGE (TPS63011) 2500 2250 VO = 2.5 V IO − Maximum Output Current − mA IO − Maximum Output Current − mA 2250 2500 2000 1750 1500 1250 VO = 4.5 V 1000 750 500 250 0 2.0 2.5 3.0 3.5 4.0 4.5 5.0 1500 VO = 3.3 V 1250 1000 750 500 0 2.0 5.5 2.5 3.0 3.5 4.0 4.5 5.0 VI − Input Voltage − V G001 Figure 2. Figure 3. MAXIMUM OUTPUT CURRENT vs INPUT VOLTAGE (TPS63012) EFFICIENCY vs OUTPUT CURRENT (TPS63010) 2500 5.5 G002 100 2250 90 VO = 2.9 V 2000 80 1750 70 η − Efficiency − % IO − Maximum Output Current − mA 1750 250 VI − Input Voltage − V 1500 VO = 3.4 V 1250 1000 VI = 2.4 V, VO = 2.5 V 50 500 20 250 10 3.0 3.5 4.0 4.5 VI − Input Voltage − V 5.0 5.5 G003 VI = 3.6 V, VO = 4.5 V 40 30 2.5 VI = 3.6 V, VO = 2.5 V 60 750 0 2.0 VO = 2.8 V 2000 0 0.1 VI = 2.4 V, VO = 4.5 V Power-Save Mode Enabled 1 10 100 1k IO − Output Current − mA Figure 4. Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): TPS63010 TPS63011 TPS63012 10k G004 Figure 5. Submit Documentation Feedback 7 TPS63010 TPS63011 TPS63012 SLVS653B – JUNE 2008 – REVISED MAY 2012 www.ti.com EFFICIENCY vs OUTPUT CURRENT (TPS63010) EFFICIENCY vs OUTPUT CURRENT (TPS63011) 100 VI = 2.4 V, VO = 2.5 V 90 80 80 70 70 η − Efficiency − % η − Efficiency − % 90 100 60 50 VI = 3.6 V, VO = 4.5 V 40 VI = 2.4 V, VO = 4.5 V 30 10 1 10 100 1k 0 0.1 10k VI = 3.6 V, VO = 3.3 V Power-Save Mode Enabled 1 10 G005 Figure 6. Figure 7. EFFICIENCY vs OUTPUT CURRENT (TPS63011) EFFICIENCY vs OUTPUT CURRENT (TPS63012) 1k 10k G006 100 90 VI = 2.4 V, VO = 2.8 V VI = 3.6 V, VO = 2.9 V 80 70 70 η − Efficiency − % VI = 3.6 V, VO = 3.3 V 60 50 VI = 3.6 V, VO = 2.8 V 40 30 60 VI = 2.4 V, VO = 2.9 V 50 40 VI = 2.4 V, VO = 3.4 V VI = 3.6 V, VO = 3.4 V 30 VI = 2.4 V, VO = 3.3 V 20 10 20 10 Power-Save Mode Disabled 1 10 100 IO − Output Current − mA 1k 10k G007 0 0.1 Power-Save Mode Enabled 1 10 Submit Documentation Feedback 100 IO − Output Current − mA Figure 8. 8 100 IO − Output Current − mA 80 η − Efficiency − % 40 VI = 2.4 V, VO = 3.3 V 10 100 0 0.1 VI = 2.4 V, VO = 2.8 V 50 20 Power-Save Mode Disabled IO − Output Current − mA 90 60 30 VI = 3.6 V, VO = 2.5 V 20 0 0.1 VI = 3.6 V, VO = 2.8 V 1k 10k G008 Figure 9. Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): TPS63010 TPS63011 TPS63012 TPS63010 TPS63011 TPS63012 www.ti.com SLVS653B – JUNE 2008 – REVISED MAY 2012 EFFICIENCY vs OUTPUT CURRENT (TPS63012) EFFICIENCY vs INPUT VOLTAGE (TPS63010) 100 90 100 90 VI = 2.4 V, VO = 2.9 V 80 80 70 VI = 2.4 V, VO = 3.4 V η − Efficiency − % η − Efficiency − % 70 60 50 VI = 3.6 V, VO = 2.9 V 40 30 50 40 10 Power-Save Mode Disabled 0 0.1 1 10 100 1k 0 2.0 10k IO − Output Current − mA 3.5 4.0 Figure 11. EFFICIENCY vs INPUT VOLTAGE (TPS63010) EFFICIENCY vs INPUT VOLTAGE (TPS63010) 90 80 80 70 η − Efficiency − % IO = 100 mA IO = 10 mA IO = 500 mA 50 40 40 20 10 4.5 VI − Input Voltage − V 5.0 5.5 G011 5.5 G010 IO = 100 mA 50 20 4.0 5.0 IO = 1000 mA 30 VO = 4.5 V Power-Save Mode Enabled 4.5 60 30 3.5 IO = 500 mA 70 IO = 1000 mA 3.0 3.0 G009 90 2.5 2.5 Figure 10. 100 0 2.0 VO = 2.5 V Power-Save Mode Enabled VI − Input Voltage − V 100 10 IO = 500 mA IO = 10 mA 20 10 η − Efficiency − % 60 30 VI = 3.6 V, VO = 3.4 V 20 60 IO = 1000 mA IO = 100 mA 0 2.0 IO = 10 mA VO = 2.5 V Power-Save Mode Disabled 2.5 3.0 3.5 4.0 4.5 5.0 VI − Input Voltage − V Figure 12. Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): TPS63010 TPS63011 TPS63012 5.5 G012 Figure 13. Submit Documentation Feedback 9 TPS63010 TPS63011 TPS63012 SLVS653B – JUNE 2008 – REVISED MAY 2012 www.ti.com EFFICIENCY vs INPUT VOLTAGE (TPS63010) EFFICIENCY vs INPUT VOLTAGE (TPS63011) 100 100 90 90 80 IO = 500 mA η − Efficiency − % 60 50 40 IO = 10 mA IO = 10 mA 40 20 20 0 2.0 2.5 3.0 3.5 10 4.0 4.5 5.0 VI − Input Voltage − V 0 2.0 5.5 EFFICIENCY vs INPUT VOLTAGE (TPS63011) 80 IO = 100 mA 70 IO = 1000 mA 60 IO = 500 mA IO = 10 mA 40 40 20 20 3.5 10 4.0 4.5 VI − Input Voltage − V 5.0 5.5 G015 Submit Documentation Feedback 5.5 G014 IO = 100 mA IO = 500 mA IO = 1000 mA 0 2.0 IO = 10 mA VO = 3.3 V Power-Save Mode Disabled 2.5 3.0 3.5 4.0 4.5 VI − Input Voltage − V Figure 16. 10 5.0 50 30 VO = 2.8 V Power-Save Mode Enabled 4.5 60 30 3.0 4.0 EFFICIENCY vs INPUT VOLTAGE (TPS63011) 80 2.5 3.5 Figure 15. 90 0 2.0 3.0 G013 90 10 2.5 Figure 14. 100 50 VO = 3.3 V Power-Save Mode Enabled VI − Input Voltage − V 100 70 IO = 500 mA 50 30 VO = 4.5 V Power-Save Mode Disabled IO = 1000 mA IO = 100 mA 60 30 10 η − Efficiency − % 70 IO = 1000 mA η − Efficiency − % η − Efficiency − % 70 80 IO = 100 mA 5.0 5.5 G016 Figure 17. Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): TPS63010 TPS63011 TPS63012 TPS63010 TPS63011 TPS63012 www.ti.com SLVS653B – JUNE 2008 – REVISED MAY 2012 EFFICIENCY vs INPUT VOLTAGE (TPS63011) EFFICIENCY vs INPUT VOLTAGE (TPS63012) 100 100 90 90 80 80 IO = 1000 mA 60 50 40 IO = 10 mA 20 2.5 3.0 3.5 10 4.0 4.5 5.0 VI − Input Voltage − V 0 2.0 5.5 G017 80 IO = 100 mA IO = 1000 mA IO = 500 mA 50 40 10 VI − Input Voltage − V 5.0 5.5 G019 G018 IO = 100 mA IO = 1000 mA IO = 10 mA 20 4.5 5.5 40 20 4.0 5.0 50 30 VO = 2.9 V Power-Save Mode Enabled 4.5 60 30 3.5 IO = 500 mA 70 η − Efficiency − % IO = 10 mA 3.0 4.0 EFFICIENCY vs INPUT VOLTAGE (TPS63012) 80 2.5 3.5 EFFICIENCY vs INPUT VOLTAGE (TPS63012) 90 0 2.0 3.0 Figure 19. 90 10 2.5 Figure 18. 100 60 VO = 3.4 V Power-Save Mode Enabled VI − Input Voltage − V 100 70 IO = 500 mA 40 20 0 2.0 IO = 10 mA 50 30 VO = 2.8 V Power-Save Mode Disabled IO = 1000 mA IO = 100 mA 60 30 10 η − Efficiency − % 70 η − Efficiency − % 70 η − Efficiency − % IO = 100 mA IO = 500 mA 0 2.0 VO = 3.4 V Power-Save Mode Disabled 2.5 3.0 3.5 4.0 4.5 5.0 VI − Input Voltage − V Figure 20. Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): TPS63010 TPS63011 TPS63012 5.5 G020 Figure 21. Submit Documentation Feedback 11 TPS63010 TPS63011 TPS63012 SLVS653B – JUNE 2008 – REVISED MAY 2012 www.ti.com EFFICIENCY vs INPUT VOLTAGE (TPS63012) 100 90 80 η − Efficiency − % IO = 100 mA IO = 500 mA 70 IO = 1000 mA 60 50 IO = 10 mA 40 30 20 10 VO = 2.9 V Power-Save Mode Disabled 0 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 VI − Input Voltage − V G021 Figure 22. LOAD TRANSIENT RESPONSE (TPS63011) VI = 2.4 V, IO = 80 mA to 750 mA Output Voltage 200 mV/div, AC Output Current 500 mA/div TPS63011, VO = 3.3 V Timebase 1 ms/div G028 Figure 23. 12 Submit Documentation Feedback Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): TPS63010 TPS63011 TPS63012 TPS63010 TPS63011 TPS63012 www.ti.com SLVS653B – JUNE 2008 – REVISED MAY 2012 LOAD TRANSIENT RESPONSE (TPS63011) VI = 4.2 V, IO = 150 mA to 1300 mA Output Voltage 200 mV/div, AC Output Current 500 mA/div TPS63011, VO = 3.3 V Timebase 1 ms/div G029 Figure 24. LOAD TRANSIENT RESPONSE (TPS63012) VI = 2.4 V, IO = 80 mA to 630 mA Output Voltage 200 mV/div, AC Output Current 500 mA/div TPS63012, VO = 3.4 V Timebase 1 ms/div G030 Figure 25. Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): TPS63010 TPS63011 TPS63012 Submit Documentation Feedback 13 TPS63010 TPS63011 TPS63012 SLVS653B – JUNE 2008 – REVISED MAY 2012 www.ti.com LOAD TRANSIENT RESPONSE (TPS63012) VI = 4.2 V, IO = 140 mA to 1100 mA Output Voltage 200 mV/div, AC Output Current 500 mA/div TPS63012, VO = 3.4 V Timebase 1 ms/div G031 Figure 26. LINE TRANSIENT RESPONSE (TPS63011) VI = 3 V to 3.6 V, IO = 300 mA Input Voltage 500 mV/div, AC Output Voltage 20 mV/div, AC TPS63011, VO = 3.3 V Timebase 2 ms/div G032 Figure 27. 14 Submit Documentation Feedback Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): TPS63010 TPS63011 TPS63012 TPS63010 TPS63011 TPS63012 www.ti.com SLVS653B – JUNE 2008 – REVISED MAY 2012 LINE TRANSIENT RESPONSE (TPS63012) VI = 3 V to 3.6V, IO = 300 mA Input Voltage 500 mV/div, AC Output Voltage 10 mV/div, AC TPS63012, VO = 3.4 V Timebase 2 ms/div G033 Figure 28. START-UP AFTER ENABLE (TPS63011) Enable 5 V/div, DC Output Voltage 1 V/div, DC Inductor Current 500 mA/div, DC Voltage at L1 2 V/div, DC TPS63011, VO = 3.3 V VI = 4.2 V, RL = 11 W Timebase 100 ms/div G034 Figure 29. Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): TPS63010 TPS63011 TPS63012 Submit Documentation Feedback 15 TPS63010 TPS63011 TPS63012 SLVS653B – JUNE 2008 – REVISED MAY 2012 www.ti.com START-UP AFTER ENABLE (TPS63012) Output Voltage 1 V/div, DC Enable 5 V/div, DC Inductor Current 500 mA/div, DC Voltage at L1 2 V/div, DC VI = 4.2 V, RL = 11 W TPS63012, VO = 3.4 V Timebase 100 ms/div G035 Figure 30. PARAMETER MEASUREMENT INFORMATION L1 L2 L1 VOUT VIN VIN VOUT R1 VINA1 C1 C3 C2 VINA FB R2 EN PS VSEL SYNC GND PGND TPS6301X Table 2. List of Components REFERENCE DESCRIPTION MANUFACTURER TPS6301 0 / 1 / 2 Texas Instruments L1 LPS3015-222 Coilcraft C1 GRM188R60J106M (10 μF 6.3V, 0603) Murata C2 2 × GRM188R60J106M (10 μF 6.3V, 0603) Murata C3 0.1 μF, X7R ceramic R1, R2 Depending on the output voltage at TPS63010, not used at TPS6301 1 / 2 (R1 shorted) 16 Submit Documentation Feedback Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): TPS63010 TPS63011 TPS63012 TPS63010 TPS63011 TPS63012 www.ti.com SLVS653B – JUNE 2008 – REVISED MAY 2012 DETAILED DESCRIPTION CONTROLLER CIRCUIT The controlling circuit of the device is based on an average current mode topology. The average inductor current is regulated by a fast current regulator loop which is controlled by a voltage control loop. The controller also uses input and output voltage feedforward. Changes of input and output voltage are monitored and immediately can change the duty cycle in the modulator to achieve a fast response to those errors. The voltage error amplifier gets its feedback input from the FB pin. At adjustable output voltages a resistive voltage divider must be connected to that pin. At fixed output voltages FB must be connected to the output voltage to directly sense the voltage. Fixed output voltage versions use a trimmed internal resistive divider. The feedback voltage will be compared with the internal reference voltage to generate a stable and accurate output voltage. The controller circuit also senses the average input current as well as the peak input current. With this, maximum input power can be controlled as well as the maximum peak current to achieve a safe and stable operation under all possible conditions. To finally protect the device from overheating, an internal temperature sensor is implemented. Synchronous Operation The device uses 4 internal N-channel MOSFETs to maintain synchronous power conversion at all possible operating conditions. This enables the device to keep high efficiency over a wide input voltage and output power range. To avoid ground shift problems due to the high currents in the switches, two separate ground pins GND and PGND are used. The reference for all control functions is the GND pin. The power switches are connected to PGND. Both grounds must be connected on the PCB at only one point ideally close to the GND pin. Due to the 4-switch topology, the load is always disconnected from the input during shutdown of the converter. Buck-Boost Operation To be able to regulate the output voltage properly at all possible input voltage conditions, the device automatically switches from step down operation to boost operation and back as required by the configuration. It always uses one active switch, one rectifying switch, one switch permanently on, and one switch permanently off. Therefore, it operates as a step down converter (buck) when the input voltage is higher than the output voltage, and as a boost converter when the input voltage is lower than the output voltage. There is no mode of operation in which all 4 switches are permanently switching. Controlling the switches this way allows the converter to maintain high efficiency at the most important point of operation; when input voltage is close to the output voltage. The RMS current through the switches and the inductor is kept at a minimum, to minimize switching and conduction losses. Switching losses are also kept low by using only one active and one passive switch. Regarding the remaining 2 switches, one is kept permanently on and the other is kept permanently off, thus causing no switching losses. Power Save Mode The PS pin can be used to select different operation modes. To enable power save, PS must be set low. Power save mode is used to improve efficiency at light load. If power save mode is enabled, the converter stops operating if the average inductor current gets lower than about 300 mA and the output voltage is at or above its nominal value. If the output voltage decreases below its nominal value, the device ramps up the output voltage again by starting operation using a programmed average inductor current higher than required by the current load condition. Operation can last for one or several pulses. The converter again stops operating once the conditions for stopping operation are met again. The power save mode can be disabled by programming high at PS. The PS input supports standard logic threshold voltages. If the device is synchronized to an external clock connected to SYNC, power save mode is disabled. Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): TPS63010 TPS63011 TPS63012 Submit Documentation Feedback 17 TPS63010 TPS63011 TPS63012 SLVS653B – JUNE 2008 – REVISED MAY 2012 www.ti.com Synchronization Connecting a clock signal at SYNC forces the device to synchronize to the connected clock frequency. Synchronization is done by a PLL, so synchronizing to lower and higher frequencies compared to the internal clock works without any issues. The PLL can also tolerate missing clock pulses without the converter malfunctioning. The SYNC input supports standard logic thresholds. If synchronization is not used SYNC must be tied low or connected to GND. Applying a clock signal to SYNC automatically disables the power save mode. Device Enable The device is put into operation when EN is set high. It is put into a shutdown mode when EN is set to GND. In shutdown mode, the regulator stops switching, all internal control circuitry is switched off, and the load is disconnected from the input. This also means that the output voltage can drop below the input voltage during shutdown. During start-up of the converter, the duty cycle and the peak current are limited in order to avoid high peak currents flowing from the input. Output Voltage Selection To program the output voltage at an adjustable device option, like TPS63010 an external resistive feedback divider, connected to FB must be used. For the fixed output voltage versions, FB is used as an output voltage sense and must be connected to the output voltage VOUT . All fixed output voltage versions have two different output voltages programmed internally. They are selected by programming high or low at VSEL. The higher output voltage is selected by programming VSEL high and the lower output voltage is selected by programming VSEL low. VSEL also supports standard logic thresholds. Softstart and Short-Circuit Protection After being enabled, the device starts operating. The average current limit ramps up from an initial 400 mA following the output voltage increasing. At an output voltage of about 1.2 V, the current limit is at its nominal value. If the output voltage does not increase, the current limit will not increase. There is no timer implemented. Thus, the output voltage overshoot at startup, as well as the inrush current, is kept at a minimum. The device ramps up the output voltage in a controlled manner even if a very large capacitor is connected at the output. When the output voltage does not increase above 1.2 V, the device assumes a short-circuit at the output, and keeps the current limit low to protect itself and the application. At a short at the output during operation, the current limit is also decreased accordingly. At 0 V at the output, for example, the output current will not exceed about 400 mA. Undervoltage Lockout If the supply voltage on VINA is lower than its approximate threshold (see electrical characteristics table), an undervoltage lockout function prevents device start-up. When in operation, the device automatically enters the shutdown mode if the voltage on VINA drops below the undervoltage lockout threshold. The device automatically restarts if the input voltage recovers to the minimum operating input voltage. Overvoltage Protection If, for any reason, the output voltage is not fed back properly to the input of the voltage amplifier, control of the output voltage will not work anymore. Therefore overvoltage protection is implemented to avoid the output voltage exceeding critical values for the device and possibly for the system it is supplying. The implemented overvoltage protection circuit monitors the output voltage internally as well. In case it reaches the overvoltage threshold the voltage amplifier regulates the output voltage to this value. Overtemperature Protection The device has a built-in temperature sensor which monitors the internal IC temperature. If the temperature exceeds the programmed threshold (see electrical characteristics table), the device stops operating. As soon as the IC temperature has decreased below the programmed threshold, it again starts operating. There is a built-in hysteresis to avoid unstable operation at IC temperatures at the overtemperature threshold. 18 Submit Documentation Feedback Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): TPS63010 TPS63011 TPS63012 TPS63010 TPS63011 TPS63012 www.ti.com SLVS653B – JUNE 2008 – REVISED MAY 2012 APPLICATION INFORMATION DESIGN PROCEDURE The TPS6301x dc/dc converters are intended for systems powered by one-cell Li-Ion or Li-Polymer battery with a typical voltage between 2.3 V and 4.5 V. They can also be used in systems powered by a double or triple cell Alkaline, NiCd, or NiMH battery with a typical terminal voltage between 2 V and 5.5 V . Additionally, any other voltage source with a typical output voltage between 2 V and 5.5 V can power systems where the TPS6301x is used. PROGRAMMING THE OUTPUT VOLTAGE Within the TPS6301X family there are fixed and adjustable output voltage versions available. To properly configure the fixed output voltage devices, the FB pin is used to sense the output voltage. This means that it must be connected directly to VOUT . At the adjustable output voltage versions, an external resistor divider is used to adjust the output voltage. The resistor divider must be connected between VOUT, FB and GND. When the output voltage is regulated properly, the typical value of the voltage at the FB pin is 500 mV. The maximum recommended value for the output voltage is 5.5 V. The current through the resistive divider should be about 100 times greater than the current into the FB pin. The typical current into the FB pin is 0.01 μA, and the voltage across the resistor between FB and GND, R2, is typically 500 mV. Based on those two values, the recommended value for R2 should be lower than 500 kΩ, in order to set the divider current at 1 μA or higher. The recommended value for this resistor is in the range of 200 kΩ. From that, the value of the resistor connected between VOUT and FB, R1, depending on the needed output voltage (VOUT ), is calculated using Equation 1: R 1 + R2 ǒ VOUT V FB Ǔ *1 (1) As an example, if an output voltage of 3.3 V is needed, a 1-MΩ resistor should be chosen for R1 if R2 is 180-kΩ. L1 L2 L1 VOUT VIN VIN VOUT R1 VINA1 C1 C3 VINA C2 FB R2 EN PS VSEL SYNC GND PGND TPS6301X Figure 31. Typical Application Circuit for Adjustable Output Voltage Option INDUCTOR SELECTION To properly configure the TPS6301X devices, an inductor must be connected between pin L1 and pin L2. To estimate the inductance value Equation 2 and Equation 3 can be used. μs L1 = (VIN1 - VOUT ) × 0.5 × A (2) μs L2 = VOUT × 0.5 × A (3) Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): TPS63010 TPS63011 TPS63012 Submit Documentation Feedback 19 TPS63010 TPS63011 TPS63012 SLVS653B – JUNE 2008 – REVISED MAY 2012 www.ti.com In Equation 2 the minimum inductance value, L1 for step down mode operation is calculated. VIN1 is the maximum input voltage. In Equation 3 the minimum inductance, L2 , for boost mode operation is calculated. The recommended minimum inductor value is either L1 or L2 whichever is higher. As an example, a suitable inductor for generating 3.3 V from a Li-Ion battery with a battery voltage range from 2.5 V up to 4.2 V is 2.2 μH. The recommended inductor value range is between 1 μH and 4.7 μH. In general, this means that at high voltage conversion rates, higher inductor values offer better performance. With the chosen inductance value, the peak current for the inductor in steady state operation can be calculated. Equation 4 shows how to calculate the peak current I1 in step down mode operation and Equation 5 shows how to calculate the peak current I2 in boost mode operation. VIN2 is the minimum input voltage. ǒ VOUT V IN1 * V OUT I I 1 + OUT ) 0.8 2 V IN1 f L Ǔ (4) ǒV OUT * V IN2Ǔ V I OUT VIN2 I 2 + OUT ) 0.8 V IN2 2 VOUT f L (5) The critical current value for selecting the right inductor is the higher value of I1 and I2 . It also needs to be taken into account that load transients and error conditions may cause higher inductor currents. This also needs to be taken into account when selecting an appropriate inductor. The following inductor series from different suppliers have been used with TPS6301x converters: Table 3. List of Inductors VENDOR Coilcraft FDK Murata Toko INDUCTOR SERIES LPS3015 LPS4012 MIPSA2520 LQH3NP LQM2HP FDSE0312 CAPACITOR SELECTION Input Capacitor At least a 4.7-μF input capacitor is recommended to improve transient behavior of the regulator and EMI behavior of the total power supply circuit. A ceramic capacitor placed as close as possible to the VIN and PGND pins of the IC is recommended. Output Capacitor For the output capacitor, it is recommended to use small ceramic capacitors placed as close as possible to the VOUT and PGND pins of the IC. If, for any reason, the application requires the use of large capacitors which can not be placed close to the IC, using a smaller ceramic capacitor in parallel to the large one is recommended. This small capacitor should be placed as close as possible to the VOUT and PGND pins of the IC. To get an estimate of the recommended minimum output capacitance, Equation 6 can be used. mF C OUT + 5 L mH (6) A capacitor with a value in the range of the calculated minimum should be used. This is required to maintain control loop stability. There are no additional requirements regarding minimum ESR. There is also no upper limit for the output capacitance value. Larger capacitors will cause lower output voltage ripple as well as lower output voltage drop during load transients. 20 Submit Documentation Feedback Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): TPS63010 TPS63011 TPS63012 TPS63010 TPS63011 TPS63012 www.ti.com SLVS653B – JUNE 2008 – REVISED MAY 2012 LAYOUT CONSIDERATIONS As for all switching power supplies, the layout is an important step in the design, especially at high peak currents and high switching frequencies. If the layout is not carefully done, the regulator could show stability problems as well as EMI problems. Therefore, use wide and short traces for the main current path and for the power ground tracks. The input capacitor, output capacitor, and the inductor should be placed as close as possible to the IC. Use a common ground node for power ground and a different one for control ground to minimize the effects of ground noise. Connect these ground nodes at any place close to one of the ground pins of the IC. EN PS VSEL The feedback divider should be placed as close as possible to the control ground pin of the IC. To lay out the control ground, it is recommended to use short traces, separated from the power ground traces. This avoids ground shift problems, which can occur due to superimposition of power ground current and control ground current. R2 GND GND GND CIN COUT VIN COUT R1 VOUT L Figure 32. PCB Layout Suggestion Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): TPS63010 TPS63011 TPS63012 Submit Documentation Feedback 21 TPS63010 TPS63011 TPS63012 SLVS653B – JUNE 2008 – REVISED MAY 2012 www.ti.com THERMAL INFORMATION Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added heat sinks and convection surfaces, and the presence of other heat-generating components affect the powerdissipation limits of a given component. Three basic approaches for enhancing thermal performance are listed below. 1. Improving the power dissipation capability of the PCB design 2. Improving the thermal coupling of the component to the PCB by soldering all pins to traces as wide as possible. 3. Introducing airflow in the system The maximum recommended junction temperature (TJ ) of the TPS6301x devices is 125°C. The thermal resistance of this 20-pin chipscale package (YFF) is RθJA = 84°C/W, if all pins are soldered. Specified regulator operation is assured to a maximum ambient temperature TA of 85°C. Therefore, the maximum power dissipation is about 476 mW, as calculated in Equation 7. More power can be dissipated if the maximum ambient temperature of the application is lower. T *T J(MAX) A P + + 125°C * 85°C + 476 mW D(MAX) R 84 °CńW qJA (7) PACKAGE INFORMATION Package Dimensions The package dimensions for this YFF package are shown in the table below. See the package drawing at the end of this data sheet for more details. Table 4. YFF Package Dimensions 22 Packaged Devices D E TPS63010YFF 2.126 ± 0.05 mm 1.922 ± 0.05 mm Submit Documentation Feedback Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): TPS63010 TPS63011 TPS63012 TPS63010 TPS63011 TPS63012 www.ti.com SLVS653B – JUNE 2008 – REVISED MAY 2012 REVISION HISTORY Changes from Original (June 2008) to Revision A Page • Changed Title From: High Efficient... To: Highly Efficient... .................................................................................................. 1 • Added Feature - Output Overvoltage Protection .................................................................................................................. 1 • Added Output overvoltage protection to the CONTROL STAGE ELECTRICAL CHARACTERISTICS. .............................. 3 • Added Overvoltage Protection section ............................................................................................................................... 18 • Changed Sentence in the PROGRAMMING THE OUTPUT VOLTAGE section - From: As an example, if an output voltage of 3.3 V is needed, a 1-MΩ resistor should be chosen for R1. To: As an example, if an output voltage of 3.3 V is needed, a 1-MΩ resistor should be chosen for R1 if R2 is 180-kΩ ............................................................................ 19 • Added Figure - PCB Layout Suggestion ............................................................................................................................. 21 Changes from Revision A (August 2009) to Revision B • Page Changed the YFF Package Dimensions table .................................................................................................................... 22 Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): TPS63010 TPS63011 TPS63012 Submit Documentation Feedback 23 D: Max = 2.176 mm, Min =2.076 mm E: Max = 1.972 mm, Min =1.872 mm PACKAGE OPTION ADDENDUM www.ti.com 9-May-2012 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) Samples (Requires Login) TPS63010YFFR ACTIVE DSBGA YFF 20 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM TPS63010YFFT ACTIVE DSBGA YFF 20 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM TPS63011YFFR ACTIVE DSBGA YFF 20 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM TPS63011YFFT ACTIVE DSBGA YFF 20 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM TPS63012YFFR ACTIVE DSBGA YFF 20 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM TPS63012YFFT ACTIVE DSBGA YFF 20 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 9-May-2012 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 9-Aug-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) TPS63010YFFR DSBGA YFF 20 3000 180.0 8.4 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 2.2 2.35 0.8 4.0 8.0 Q1 TPS63010YFFT DSBGA YFF 20 250 180.0 8.4 2.2 2.35 0.8 4.0 8.0 Q1 TPS63011YFFR DSBGA YFF 20 3000 180.0 8.4 2.2 2.35 0.8 4.0 8.0 Q1 TPS63011YFFT DSBGA YFF 20 250 180.0 8.4 2.2 2.35 0.8 4.0 8.0 Q1 TPS63012YFFR DSBGA YFF 20 3000 180.0 8.4 2.2 2.35 0.8 4.0 8.0 Q1 TPS63012YFFT DSBGA YFF 20 250 180.0 8.4 2.2 2.35 0.8 4.0 8.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 9-Aug-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS63010YFFR DSBGA YFF 20 3000 210.0 185.0 35.0 TPS63010YFFT DSBGA YFF 20 250 210.0 185.0 35.0 TPS63011YFFR DSBGA YFF 20 3000 210.0 185.0 35.0 TPS63011YFFT DSBGA YFF 20 250 210.0 185.0 35.0 TPS63012YFFR DSBGA YFF 20 3000 210.0 185.0 35.0 TPS63012YFFT DSBGA YFF 20 250 210.0 185.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. 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