TPS65148 www.ti.com ........................................................................................................................................................................................................ SLVS904 – MAY 2009 Compact TFT LCD Bias IC for Monitor with VCOM Buffer, Voltage Regulator for Gamma Buffer and Reset Function • • • • • • FEATURES 1 • • • • • • • • 2.5V to 6.0V Input Voltage Range Up to 18V Boost Converter With 4A Switch Current 630kHz/1.2MHz Selectable Switching Frequency Adjustable Soft-Start for the Boost Converter Gate Driver for External Input-to-Output Isolation Switch 0.5% Accuracy Voltage Regulator for Gamma Buffer Gate Voltage Shaping VCOM Buffer Reset Function (XAO Signal) LCD Discharge Function Overvoltage Protection Overcurrent Protection Thermal Shutdown 32-Pin 5*5mm QFN Package APPLICATIONS • • Monitor TV (5V Input Voltage) DESCRIPTION The TPS65148 offers a very compact power supply solution designed to supply the LCD bias voltages required by TFT (Thin Film Transistor) LCD panels running from a typical 5 V supply rail. The device integrates a high power step-up converter for VS (Source Driver voltage), a very accurate voltage rail using an integrated LDO to supply the Gamma Buffer (VREG_O) and a Vcom buffer driving the LCD backplane. In addition to that, a gate voltage shaping block is integrated. The VGH signal (Gate Driver High voltage) supplied by an external positive charge pump, is modulated into VGHM with high flexibility by using a logic input VFLK and an external discharge resistor connected to RE pin. Also, an external negative charge pump can be set using the boost converter of the TPS65148 to generate VGL (Gate Driver Low voltage). The integrated reset function together with the LCD discharge function available in the TPS65148 provide the signals enabling the discharge of the LCD TFT pixels when powering-off. The device includes safety features like overcurrent protection (OCP) and short-circuit protection (SCP) achieved by an external input-to-output isolation switch, as well as overvoltage protection (OVP) and thermal shutdown. Space between text and graphic VIN 5V Boost Converter (Over Voltage Protection) - VS 13.6 V/500 mA (High Voltage Stress) Gate Driver for Input-to-output Isolation Switch Gate Voltage Shaping & LCD Discharge Voltage Regulator for Gamma VCOM Buffer (unity gain) Reset Function GD VGHM 24 V/20mA VREG_O 12.5 V/30 mA VOPO ±130mA XAO 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2009, Texas Instruments Incorporated TPS65148 SLVS904 – MAY 2009 ........................................................................................................................................................................................................ www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION (1) (1) TA ORDERING PACKAGE PACKAGE MARKING –40°C to 85°C TPS65148RHB 32-pin QFN TPS65148 The RHB package is available taped an reeled. For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) VALUE UNIT Input voltage range VIN (2) –0.3 to 6.5 V Voltage range on pins EN, FB, SS, FREQ, COMP, GD, REG_FB, VDET, XAO, HVS, RHVS, VDPM, VFLK (2) –0.3 to 6.5 V Voltage on pins SW, OPI, OPO, SUP, REG_I, REG_O (2) –0.3 to 20 V Voltage on pins VGH, VGHM, RE (2) –0.3 to 36 V ESD rating HBM 2 kV ESD rating MM 200 V 500 V ESD rating CDM Continuous power dissipation See Dissipation Rating Table Storage temperature range (1) (2) –65 to 150 °C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to network ground terminal. DISSIPATION RATINGS (1) (2) (1) (2) PACKAGE RθJA TA ≤25°C POWER RATING TA = 70°C POWER RATING TA = 85°C POWER RATING QFN 30°C/W 3.3 W 1.8 W 1.3 W PD = (TJ – TA)/RθJA. RθJA. given for High-K PCB board. RECOMMENDED OPERATING CONDITIONS over operating free-air temperature range (unless otherwise noted) MIN VIN Input voltage range. VS, VSUP, VREG_I Boost converter output voltage range. SUP pin and REG_I pin input supply voltage range. VGH Gate voltage shaping input voltage range. TA Operating ambient temperature. TJ Operating junction temperature. –40 2 Submit Documentation Feedback TYP MAX UNIT 2.5 6.0 V 7 18 V 15 35 V –40 85 °C 125 °C Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :TPS65148 TPS65148 www.ti.com ........................................................................................................................................................................................................ SLVS904 – MAY 2009 ELECTRICAL CHARACTERISTICS VIN = 5 V, VREG_I = VS = VSUP = 13.6 V, VREG_O = 12.5 V, VOPI = 5 V, VGH = 23 V, TA = –40°C to 85°C, typical values are at TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SUPPLY VIN Input voltage range IQVIN Operating quiescent current into VIN Device not switching, VFB = 1.240 V + 5% 2.5 IQSUP Operating quiescent current into SUP Device not switching, VFB = 1.240 V + 5% IQVGH Operating quiescent current into VGH VGH = 24 V, VFLK = 'high' IQREG_I Operating quiescent current into REG_I REG_O = 'open', VREG_FB = 1.240 V + 5% ISDVIN Shutdown current into VIN ISDSUP 0.23 6.0 V 0.5 mA 3 6 mA 30 60 µA 0.05 3 µA VIN = 6.0 V, EN = GND 35 70 µA Shutdown current into SUP VIN = 6.0 V, EN = GND, VSUP = 18 V 3.5 7 µA ISDVGH Shutdown current into VGH VIN = 6.0 V, EN = GND, VGH = 35 V 30 60 µA ISDREG_I Shutdown current into REG_I VIN = 6.0 V, EN = GND, VREG_I = 18 V, VREG_O = 16.9 V 4 10 µA VUVLO Under-voltage lockout threshold TSD Thermal shutdown TSDHYS Thermal shutdown hysteresis VIN rising 2.1 2.3 V Hysterisis 0.1 Temperature rising 150 °C 14 °C LOGIC SIGNALS EN, FREQ, VFLK, HVS ILEAK Input leakage current EN = FREQ = VFLK = HVS = 6.0 V VIH Logic high input voltage VIN = 2.5 V to 6.0 V VIL Logic low input voltage VIN = 2.5 V to 6.0 V 0.1 2 µA V 0.4 V BOOST CONVERTER (VS) VS Output voltage boost converter VOVP Overvoltage protection VFB Feedback regulation voltage IFB Feedback input bias current gm Transconductiance error amplifier gain RDS(ON) N-channel MOSFET on-resistance ILEAK_SW SW leakage current ILIM N-Channel MOSFET current limit ISS Softstart current f Switching frequency VS rising 18 V 18.2 19 19.8 V 1.228 1.240 1.252 V 0.1 µA VFB = 1.240V µA/V 107 VIN = VGS = 5 V, ISW = 'current limit' 0.12 0.18 VIN = VGS = 3.3 V, ISW = 'current limit' 0.14 0.22 4.8 5.6 EN = GND, VSW = 18.5 V 30 4.0 VSS = 1.240 V Ω µA A µA 10 FREQ = 'high' 0.9 1.2 1.5 MHz FREQ = 'low' 470 630 790 kHZ Line regulation VIN = 2.5 V to 6.0 V, IOUT = 1 mA Load regulation IOUT = 0 A to 1.3 A 0.015 %/V 0.22 %/A LDO - VOLTAGE REGULATOR FOR GAMMA BUFFER (VREG_O) VREG_O VREG_FB LDO output voltage range Feedback regulation voltage 7 17.6 VREG_I = 10 V to 18V, REG_O = REG_FB, IREG_O = 1 mA, TA = -40°C to 85°C 1.228 1.240 1.252 VREG_I = 10 V to 18V, REG_O = REG_FB, IREG_O = 1 mA, TA = 25°C 1.234 1.240 1.246 V V IREG_FB Feedback input bias current VREG_FB = 1.240 V 0.1 µA ISC_REG Short circuit current limit VREG_I = 18 V, REG_O = REG_FB = GND 90 mA VDO Dropout voltage VREG_I = 18 V, IREG_O = 30 mA Line regulation VREG_I = 13.6 V to 18 V, IREG_O = 1 mA Load regulation IREG_O = 1 mA to 50 mA 400 mV 0.003 %/V 0.28 %/A GATE VOLTAGE SHAPING (VGHM) µA IDPM Capacitor charge current VDPM pin RDS(ON)M1 VGH to VGHM RDS(ON) (M1 PMOS) VFLK = 'high', IVGHM = 20 mA, VGH = 20 V 20 13 25 Ω RDS(ON)M2 VGHM to RE RDS(ON) (M2 PMOS) VFLK = 'low', IVGHM = 20 mA, VGHM = 7.5 V 13 25 Ω Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :TPS65148 3 TPS65148 SLVS904 – MAY 2009 ........................................................................................................................................................................................................ www.ti.com ELECTRICAL CHARACTERISTICS (continued) VIN = 5 V, VREG_I = VS = VSUP = 13.6 V, VREG_O = 12.5 V, VOPI = 5 V, VGH = 23 V, TA = –40°C to 85°C, typical values are at TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 6.0 V 1.240 1.264 V RESET FUNCTION (XAO) VIN_DET Operating voltage for VIN VDET Threshold voltage 1.6 VDET_HYS Threshold hysterisis IXAO(ON) Sink current capability (1) VXAO(ON) = 0.5 V VXAO(ON) Low voltage level IXAO(ON)= 1 mA ILEAK_XAO Leakage current VXAO = VIN = 3.3V Falling, VIN = 2.3 V 1.216 65 mV 1 mA 0.5 V 2 µA VCOM BUFFER (VCOM) VSUP VSUP supply range (2) VSUP = VS 7 18 V VOFFSET Input offset voltage VCM = VOPI = VSUP/2 = 6.8 V –15 15 mV IB Input bias current VCM = VOPI = VSUP/2 = 6.8 V -1 1 µA VCM Common mode input voltage range VOFFSET = 10 mV, IOPO = 10 mA 1 VS-1.5 CMRR Common mode rejection ratio VCM = VOPI = VSUP/2 = 6.8 V, 1 MHz VOL Output voltage swing low IOPO = 10 mA 0.10 VOH Output voltage swing high IOPO = 10 mA VS - 1 VS - 0.65 V 66 Source (VOPI = VSUP/2 = 6.8 V, OPO = GND) 90 130 110 160 dB 0.25 V V Isc Short circuit current Io Output current PSRR Power supply rejection ratio 40 dB SR Slew rate AV = 1, VOPI = 2 Vpp 60 V/µs BW –3db bandwidth AV = 1, VOPI = 60 mVpp 60 MHz EN = 'high' 10 µA 5 kΩ Sink (VOPI = VSUP/2 = 6.8 V, VCOM = VSUP = 13.6 V) Source (VOPI = VSUP/2 = 6.8, VOFFSET = 15 mV) 130 Sink (VOPI = VSUP/2 = 6.8, VOFFSET = 15 mV) 130 mA mA GATE DRIVER (GD) IGD Gate driver sink current RGD Gate driver internal pull up resistance HIGH VOLTAGE STRESS TEST (HVS) RHVS RHVS pull down resistance HVS = 'high', VIN = 2.5V to 6.0 V, IHVS = 100 µA ILEAK_RHVS RHVS leakage current HVS = 'low', VRHVS = 5 V (1) (2) 4 400 500 600 Ω 0.1 µA External pull-up resistor to be chosen so that the current flowing into XAO Pin (VXAO = 0 V) when active is below IXAO_MIN = 1mA. Maximum output voltage limited by the Overvoltage Protection and not the maximum power switch rating of the boost converter. Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :TPS65148 TPS65148 www.ti.com ........................................................................................................................................................................................................ SLVS904 – MAY 2009 RE VGHM VGH VDPM NC SS AGND COMP PIN ASSIGNMENT 32 31 30 29 28 27 26 25 REG_FB 1 24 FB REG_O 2 23 RHVS REG_I 3 22 NC SUP 4 21 PGND OPO 5 20 PGND OPI 6 19 SW OPGND 7 18 SW VFLK 8 17 GD 12 13 14 FREQ EN AGND 15 19 VIN 11 VIN 10 HVS XAO 9 VDET PowerPAD® Exposed Thermal Die TERMINAL FUNCTIONS PIN NAME NO. I/O DESCRIPTION REG_FB 1 I Voltage regulator feedback pin. REG_O 2 O Voltage regulator output pin. REG_I 3 I Voltage regulator input pin. SUP 4 I Input supply pin for the gate voltage shaping and operational amplifier blocks. Also overvoltage protection sense pin. SUP pin must be supplied by VS voltage. OPO 5 O VCOM Buffer output pin. OPI 6 I VCOM Buffer input pin. OPGND 7 VFLK 8 I Input pin for charge/discharge signal for VGHM. VFLK = 'low' discharges VGHM through RE pin. XAO 9 O Reset function output pin (open-drain). XAO signal is active low. VDET 10 I Reset function threshold pin. Connect a voltage divider to this pin to set the threshold voltage. HVS 11 I High Voltage Stress function logic input pin. Apply a high logic voltage to enable this function FREQ 12 I Boost converter frequency select pin. Oscillator is 630 kHz when FREQ is connected to GND and 1.2 MHz when FREQ is connected to VIN. EN 13 I Shutdown control input. Apply a logic high voltage to enable the device. AGND VCOM Buffer analog ground. 14, 26, exposed pad Analog ground. VIN 15, 16 I Input supply pin. GD 17 O Gate driver pin. Connect the gate of the boost converter's external input-to-output isolation switch to this pin. SW 18, 19 Switch pin of the boost converter. PGND 20, 21 Power ground. NC 22, 28 Not connected. Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :TPS65148 5 TPS65148 SLVS904 – MAY 2009 ........................................................................................................................................................................................................ www.ti.com TERMINAL FUNCTIONS (continued) PIN NAME I/O NO. DESCRIPTION RHVS 23 FB 24 I Voltage level set pin. Connect a resistor to this pin to set VS voltage when HVS = 'high'. COMP 25 I/O Boost converter compensation pin . SS 27 I/O Boost soft-start control pin. Connect a capacitor to this pin if a soft-start is needed. Open = no soft-start. VDPM 29 I/O Sets the delay to enable VGHM output. Pin for external capacitor. Floating if no delay needed. VGH 30 I Input pin for the positive charge pump voltage. VGHM 31 O Gate voltage shaping output pin. RE 32 Boost converter feedback pin. Slope adjustment pin for gate voltage shaping. Connect a resistor to this pin to set the discharging slope of VGHM when VFLK = 'low'. FUNCTIONAL BLOCK DIAGRAM VIN FREQ SUP EN SW GD SW VS FB Boost Converter (VS) RHVS VIN High Voltage Stress VIN HVS VS Gate Driver REG_I VIN VIN VREG_O XAO LDO (VREG_O) Reset Function (XAO) VDET REG_O REG_FB VGH VGH VS VGHM Gate Voltage Shaping (VGHM) OPI VCOM (VCOM) 6 RE VFLK Submit Documentation Feedback PGND PGND AGND AGND SS VDPM COMP OPO OPGND VCOM VGHM Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :TPS65148 TPS65148 www.ti.com ........................................................................................................................................................................................................ SLVS904 – MAY 2009 TYPICAL CHARACTERISTICS TABLE OF GRAPHS FIGURE Efficieny vs. Load Current VIN = 5 V, VS = 13.6 V f = 630 kHz/1.2 MHz Figure 1 Efficiency vs. Load Current VIN = 5 V, VS = 18 V f = 630 kHz/1.2 MHz Figure 2 PWM Switching Discontinuous Conduction Mode VIN = 5 V, VS = 13.6 V/ 2 mA f = 630 kHz Figure 3 PWM Switching Continuous Conduction Mode VIN = 5 V, VS = 13.6 V/ 500 mA f = 630 kHz Figure 4 Boost Frequency vs. Load Current VIN = 5 V, VS = 13.6 V f = 630 kHz/1.2 MHz Figure 5 Boost Frequency vs. Supply Voltage VS = 13.6 V/100 mA f = 630 kHz/1.2 MHz Figure 6 Load Transient Response Boost Converter High Frequency (1.2 MHz) VIN = 5 V, VS = 13.6 V IOUT = 50 mA ~ 400 mA, f = 1.2 MHz Figure 7 Load Transient Response Boost Converter Low Frequency (630 KHz) VIN = 5 V, VS = 13.6 V IOUT = 50 mA ~ 400 mA, f = 630 kHz Figure 8 Boost Converter Output Current Capability VIN = 5 V, VS = 9 V, 13.6 V, 15 V, 18 V f = 1.2 MHz, L = 4.7 µH Figure 9 Soft-start Boost Converter VIN = 5 V, VS = 13.6 V, IOUT = 600 mA Figure 10 Overvoltage Protection Boost Converter (OVP) VIN = 5 V, VS = 13.6 V Figure 11 Load Transient Response LDO VLVIN = 5 V, VS = 13.6 V VREG_O = 12.5 V, ILVOUT = 5 mA - 30 mA Figure 12 Gate Voltage Shaping VGH = 23 V Figure 13 XAO Signal and LCD Discharge Function Figure 14 Power On Sequencing Figure 15 Power Off Sequencing Figure 16 Short Circuit Protection ( < 114 ms) Figure 17 Short Circuit Protection ( > 114 ms) Figure 18 For all the following graphics, the inductors used for the measurements are CDRH127 (L = 4.7 µF) for f = 1.2 MHz, and CDRH127LD (L = 10 µF) for f = 630 kHz. EFFICIENCY vs LOAD CURRENT (Vs = 13.6 V) 100 EFFICIENCY vs Load Current (Vs = 18 V) f = 630 kHz L = 10 µ H 90 100 f = 1.2 MHz L = 4.7 µ H 80 70 Efficiency - [%] Efficiency - [%] f = 1.2 MHz L = 4.7 µ H 80 70 60 50 40 30 20 60 50 40 30 20 V IN = 5 V V IN = 5 V 10 0 f = 630 kHz L = 10 µ H 90 10 V S = 13.6 V 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0 V S = 18 V 0.0 0.2 0.4 0.6 0.8 1.0 IOUT - Load current - [A] IOUT - Load current - [A] Figure 1. Figure 2. Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :TPS65148 7 TPS65148 SLVS904 – MAY 2009 ........................................................................................................................................................................................................ www.ti.com BOOST CONVERTER PWM SWITCHING DISCONTINUOUS CONDUCTION MODE BOOST CONVERTER PWM SWITCHING CONTINUOUS CONDUCTION MODE V SW 10 V/div V SW 10 V/div V S_AC 50 mV/div V S_AC 50 mV/div VIN = 5 V VS = 13.6 V/2 mA f = 630 kHz IL IL 500 mA/div 1 A/div VIN = 5 V VS = 13.6 V/500 mA f = 630 kHz 1 µs/div 1 µs/div Figure 3. Figure 4. BOOST CONVERTER FREQUENCY vs LOAD CURRENT BOOST CONVERTER FREQUENCY vs SUPPLY VOLTAGE 1400 1600 FREQ = VIN FREQ = VIN 1400 1200 f - frequency - [kHz] f - frequency - [kHz] L = 4.7 µH 1000 FREQ = GND 800 L = 4.7 µH 1200 L = 10 µH 600 400 1000 FREQ = GND 800 L = 10 µH 600 400 VIN = 5 V 200 200 VS = 13.6 V VS = 13.6 V/100 mA 0 0 0.2 0.4 0.6 0.8 1 0 2.5 3.0 IOUT - Load current - [A] 4.0 4.5 5.0 5.5 6.0 VIN - Supply voltage - [V] Figure 5. Figure 6. LOAD TRANSIENT RESPONSE BOOST CONVERTER - HIGH FREQUENCY (1.2 MHz) LOAD TRANSIENT RESPONSE BOOST CONVERTER - LOW FREQUENCY (630 kHz) VIN = 5 V VIN = 5 V VS = 13.6 V VS = 13.6 V V S_AC V S_AC 200 mV/div 200 mV/div COUT = 40 µF COUT = 40 µF L = 4.7 µH L = 10 µH RCOMP = 47 kΩ RCOMP = 47 kΩ CCOMP = 3.3 nF CCOMP = 3.3 nF IOUT IOUT 200 mA/div 200 mA/div IOUT = 50 mA – 400 mA IOUT = 50 mA – 400 mA 200 µs/div 200 µs/div Figure 7. 8 3.5 Figure 8. Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :TPS65148 TPS65148 www.ti.com ........................................................................................................................................................................................................ SLVS904 – MAY 2009 BOOST CONVERTER OUTPUT CURRENT CAPABILITY BOOST CONVERTER SOFT-START V IN 3.0 5 V/div 2.5 EN VIN = 5 V IOUT - Output load - [A] 5 V/div VS = 13.6 V / 600 mA VS = 18 V 2.0 CSS = 100 nF GD VS = 9 V VS = 15 V 10 V/div 1.5 V S = 13.6 V VS 1.0 10 V/div VIN = 5 V 0.5 f = 1.2 MHz IL 1 A/div L = 4.7 µH 2 ms/div 0.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 VIN - Supply voltage - [V] GD Figure 9. Figure 10. OVERVOLTAGE PROTECTION BOOST CONVERTER (OVP) LOAD TRANSIENT RESPONSE VOLTAGE REGULATOR FOR GAMMA BUFFER V IN = 5 V FB shorted to GND for > 55ms V REG_O = 12.5 V COUT = 1 µF VREG_O_AC 5 V/div 50 mV/div VS 10 V/div VSW IREG_O 10 V/div 10 mA/div IREG_O = 5 mA – 30 mA 20 ms/div Figure 11. 200 µs/div Figure 12. XAO SIGNAL AND LCD DISCHARGE FUNCTION GATE VOLTAGE SHAPING V GHM = 23 V down to GND RE = 80 k Ω V IN 5 V/div VFLK VS 5 V/div 10 V/div VDET_threshold reached XAO 5 V/div VGHM VGH 10 V/div 10 V/div VGHM VGHM = VGH 10 V/div 400 µs/div 2 ms/div Figure 14. Figure 13. Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :TPS65148 9 TPS65148 SLVS904 – MAY 2009 ........................................................................................................................................................................................................ www.ti.com POWER ON SEQUENCING POWER OFF SEQUENCING V IN V IN 5 V/div 5 V/div GD GD 5 V/div 5 V/div VS Boost PG VS 10 V/div 10 V/div VCOM VCOM 10 V/div 10 V/div VREG_O VREG_O 10 V/div 10 V/div VGHM VGHM 20 V/div 20 V/div Delay set by CDPM 4 ms/div Figure 15. 4 ms/div Figure 16. SHORT CIRCUIT PROTECTION (< 114 ms) SHORT CIRCUIT PROTECTION (> 114 ms) VS VS 10 V/div 10 V/div GD GD 5 V/div 5 V/div 2 ms 55 ms 55 ms XAO XAO 5 V/div 5 V/div 40 ms/div Figure 18. 40 ms/div Figure 17. 10 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :TPS65148 TPS65148 www.ti.com ........................................................................................................................................................................................................ SLVS904 – MAY 2009 APPLICATION INFORMATION BOOST CONVERTER VIN VS EN VIN SW GD VIN SW SUP Gate Driver FREQ OVP (Short Circuit Protection) SUP FB SS Current limit and Soft Start Toff Generator Bias Vref = 1.24 V UVLO Thermal Shutdown HVS Ton PWM Generator COMP Gate Driver of Power Transistor FB GM Amplifier HVS RHVS Vref PGND PGND Figure 19. Boost converter block diagram The boost converter is designed for output voltages up to 18 V with a switch peak current limit of 4.0 A minimum. The device, which operates in a current mode scheme with quasi-constant frequency, is externally compensated for maximum flexibility and stability. The switching frequency is selectable between 630 kHz and 1.2 MHz and the minimum input voltage is 2.5 V. To limit the inrush current at start-up a soft-start pin is available. TPS65148 boost converter’s novel topology using adaptive off-time provides superior load and line transient responses and operates also over a wider range of applications than conventional converters. Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :TPS65148 11 TPS65148 SLVS904 – MAY 2009 ........................................................................................................................................................................................................ www.ti.com Boost Converter Design Procedure The first step in the design procedure is to verify whether the maximum possible output current of the boost converter supports the specific application requirements. A simple approach is to estimate the converter efficiency, by taking the efficiency numbers from the provided efficiency curves or to use a worst case assumption for the expected efficiency, e.g. 85%. 1. Duty Cycle: D= VIN ´h VS 2. Inductor ripple current: ΔIL = 3. Maximum output current: 4. Peak switch current: VIN_min ´ D f ´L ΔIL ö æ ´ (1 - D) IOUT_max = ç ILIM_min 2 ÷ø è Iswpeak = I ΔIL + OUT 2 1- D Iswpeak = converter switch current (must be < ILIM_min = 4.0 A) ƒ = Converter switching frequency (typically 1.2 MHz or 630 kHz) L = Selected inductor value (the Inductor Selection section) η = Estimated converter efficiency (please use the number from the efficiency plots or 85% as an estimation) ΔIL = Inductor peak-to-peak ripple current The peak switch current is the steady state current that the integrated switch, inductor and external Schottky diode have to be able to handle. The calculation must be done for the minimum input voltage where the peak switch current is highest. Inductor Selection The main parameter for the inductor selection is the saturation current of the inductor which should be higher than the peak switch current as calculated above with additional margin to cover for heavy load transients. An alternative, more conservative, is to choose the inductor with a saturation current at least as high as the maximum switch current limit of 5.6 A. Another important parameter is the inductor DC resistance. Usually the lower the DC resistance the higher the efficiency. It is important to note that the inductor DC resistance is not the only parameter determining the efficiency. Especially for a boost converter where the inductor is the energy storage element, the type and core material of the inductor influences the efficiency as well. At high switching frequencies of 1.2 MHz inductor core losses, proximity effects and skin effects become more important. Usually an inductor with a larger form factor gives higher efficiency. The efficiency difference between different inductors can vary between 2% to 10%. For the TPS65148, inductor values between 3.3 µH and 6.8 µH are a good choice with a switching frequency of 1.2 MHz. At 630 kHz we recommend inductors between 7 µH and 13 µH. Isat > Iswpeak imperatively. Possible inductors are shown in Table 1. Table 1. Inductor Selection L (µH) COMPONENT SUPPLIER COMPONENT CODE SIZE (LxWxH mm) DCR TYP (mΩ) Isat (A) 6.8 Epcos B82464-G4682-M 16 x 10.4 x 4.8 20 4.3 4.7 Coiltronics 4.7 Sumida UP2B-4R7-R 14 x 10.4 x 6 16.5 5.5 CDRH124NP-4R7-M 12.3 x 12.3 x 4.5 18 4.7 Sumida CDRH127 5.7 12.3 × 12.3 × 8 11.7 6.8 10 Coilcraft DS3316P 10 12.95 × 9.4 × 5.08 80 3.5 Sumida CDRH8D43 8.3 × 8.3 × 4.5 29 4 10 Sumida CDRH127 12.3 × 12.3 × 8 16 5.4 10 Sumida CDRH127LD 12.3 × 12.3 × 8 15 6.7 1.2 MHz 630 kHz 12 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :TPS65148 TPS65148 www.ti.com ........................................................................................................................................................................................................ SLVS904 – MAY 2009 Rectifier Diode Selection To achieve high efficiency a Schottky type should be used for the rectifier diode. The reverse voltage rating should be higher than the maximum output voltage of the converter. The averaged rectified forward current IF, the Schottky diode needs to be rated for, is equal to the output current IOUT: IF = IOUT (1) Usually a Schottky diode with 2 A maximum average rectified forward current rating is sufficient for most of the applications. Also, the Schottky rectifier has to be able to dissipate the power. The dissipated power is the average rectified forward current times the diode forward voltage VF. PD = IF × VF Typically the diode should be able to dissipate around 500mW depending on the load current and forward voltage. Table 2. Rectifier Diode Selection CURRENT RATING lF VR VF / IF COMPONENT SUPPLIER COMPONENT CODE PACKAGE TYPE 2A 20 V 0.44 V/2 A 2A 20 V 0.5 V/2 A Vishay SL22 SMA Vishay SS22 SMA Setting the Output Voltage The output voltage is set by an external resistor divider. Typically, a minimum current of 50 µA flowing through the feedback divider is enough to cover the noise fluctuation. The resistors are then calculated with 70 µA as: VS R2 = VFB » 18 kΩ 70 μA æ V ö R1 = R2 ´ ç S - 1÷ V è FB ø R1 VFB R2 (2) with VFB = 1.240 V Soft-Start (Boost Converter) To minimize the inrush current during start-up an external capacitor connected to the soft-start pin SS is used to slowly ramp up the internal current limit of the boost converter by charging it with a constant current of typically 10 µA. The inductor peak current limit is directly dependent on the SS voltage and the maximum load current is available after the soft-start is completed (VSS = 0.8 V) or VS has reached its Power Good value, 90% of its nominal value. The larger the capacitor, the slower the ramp of the current limit and the longer the soft-start time. A 100-nF capacitor is usually sufficient for most of the applications. When the EN pin is pulled low, the soft-start capacitor is discharged to ground. Frequency Select Pin (FREQ) The digital frequency select pin FREQ allows to set the switching frequency of the device to 630 kHz (FREQ = 'low') or 1.2 MHz (FREQ = 'high'). Higher switching frequency improves load transient response but reduces slightly the efficiency. The other benefits of higher switching frequency are a lower output voltage ripple. Usually, it is recommended to use 1.2 MHz switching frequency unless light load efficiency is a major concern. Compensation (COMP) The regulation loop can be compensated by adjusting the external components connected to the COMP pin. The COMP pin is the output of the internal transconductance error amplifier. The compensation capacitor will adjust the low frequency gain and the resistor value will adjust the high frequency gain. Lower output voltages require a higher gain and therefore a lower compensation capacitor value. A good start, that will work for the majority of the applications is RCOMP = 47 kΩ and CCOMP = 3.3 nF. Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :TPS65148 13 TPS65148 SLVS904 – MAY 2009 ........................................................................................................................................................................................................ www.ti.com Input Capacitor Selection For good input voltage filtering low ESR ceramic capacitors are recommended. TPS65148 has an analog input VIN. A 1-µF bypass is required as close as possible from VIN to GND. Two 10-µF (or one 22-µF) ceramic input capacitor is sufficient for most of the applications. For better input voltage filtering this value can be increased. Refer to Table 3 and typical applications for input capacitor recommendations. Output Capacitor Selection For best output voltage filtering a low ESR output capacitor is recommended. Four 10-µF (or two 22-µF) ceramic output capacitors work for most of the applications. Higher capacitor values can be used to improve the load transient response. Refer to Table 3 for the selection of the output capacitor. Table 3. Rectifier Input and Output Capacitor Selection CAPACITOR VOLTAGE RATING COMPONENT SUPPLIER COMPONENT CODE COMMENTS 10 µF/0805 10 V Taiyo Yuden LMK212 BJ 106KD CIN 1 µF/0603 10 V Taiyo Yuden EMK107 BJ 105KA VIN bypass 10 µF/1206 25 V Taiyo Yuden TMK316 BJ 106ML COUT To calculate the output voltage ripple, the following equations can be used: V - VIN IOUT DVC = S ´ DVC_ESR = DIL ´ RC_ESR VS ´ f C (3) ΔVC_ESR can be neglected in many cases since ceramic capacitors provide very low ESR. Undervoltage Lockout (UVLO) To avoid misoperation of the device at low input voltages an undervoltage lockout is included that disables the device, if the input voltage falls below 2.0 V. Gate Drive Pin (GD) The Gate Drive (GD) allows controlling an external isolation P-channel MOSFET switch. Using a 1-nF capacitor is recommned between the source and the gate of the FET to properly turn it on. GD pin is pulled low when the input voltage is above the undervoltage lockout threshold (UVLO) and when enable (EN) is 'high'. The gate drive has an internal pull up resistor to VIN of typically 5 kΩ. The external P-channel MOSFET must be chosen with VT < VIN_min in order to be properly turned on. Overvoltage Protection (OVP) The main boost converter has an integrated overvoltage protection to prevent the Power Switch from exceeding the absolute maximum switch voltage rating at pin SW in case the feedback (FB) pin is floating or shorted to GND. In such an event, the output voltage rises and is monitored with the OVP comparator over the SUP pin. As soon as the comparator trips at typically 19 V, the boost converter turns the N-Channel MOSFET off. The output voltage falls below the overvoltage threshold and the converter starts switching again. If the voltage on FB pin is below 90% of its typical value (1.240 V) for more than 55 ms, the device is latched down. The input voltage VIN needs to be cycled to restart the device. In order to detect the overvoltage, the SUP pin needs to be connected to output voltage of the boost converter VS. XAO output is independent from OVP. Short Circuit Protection (SCP) At start-up, as soon as the UVLO is reached and the EN signal is high, the GD pin is pulled 'low'. The feedback voltage of the boost converter VFB as well as the SUP pin voltage (VS) are sensed. After 2ms, if the voltage on SUP pin has not risen or the FB voltage is below 90% of its typical value (1.240 V), then the GD pin is pulled high for 55ms. After 3 tries, if the device is still in short circuit, it is latched down. The input voltage VIN needs to be cycled to restart the device. The SCP is also valid during normal operation. 14 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :TPS65148 TPS65148 www.ti.com ........................................................................................................................................................................................................ SLVS904 – MAY 2009 Over Current Protection (OCP) If the FB voltage is below 90% of its typical value (1.240 V) for more than 55 ms, the GD pin is pulled 'high' and the device latched down. The input voltage VIN needs to be cycled to restart the device. HIGH VOLTAGE STRESS (HVS) FOR THE BOOST CONVERTER The TPS65148 incorporates a High Voltage Stress test enabled by pulling the logic pin HVS 'high'. The output voltage of the boost converter VS is then set to a higher output voltage compared to the nominal programmed output voltage. If unregulated external charge pumps are connected via the boost converter, their outputs will increase as VS increases. This stressing voltage is flexible and set by the resistor connected to RHVS pin. With HVS = 'high' the RHVS pin is pulled to GND. The external resistor connected between FB and RHVS (as shown in Figure 19) is therefore put in parallel to the low-side resistor of the boost converter's feedback divider. The output voltage for the boost converter during HVS test is calculated as: VS VS_HVS = VFB ´ R1+ R2 || R12 R2 || R12 R12 = R1´ R2 æ VS_HVS ö - 1÷ ´ R2 - R1 ç V FB è ø R1 VFB R12 R2 (4) with VFB = 1.240 V If the VGH voltage needs to be set to a higher value by using the HVS test, VGH must be connected to VGH pin without regulation stage. VGH voltage will then be equal to VS_HVS times 2 or 3 (depending if a doubler or tripler mode is used for the external positive charge pump). The same circuit changes can be held on the negative charge pump as well if required. CAUTION: special caution must be taken in order to limit the voltage on VGH pin to 35V (maximum recommended voltage) VOLTAGE REGULATOR FOR GAMMA BUFFER TPS65148 includes a voltage regulator (Low Dropout Linear Regulator, LDO) to supply the Gamma Buffer with a very stable voltage. The LDO is designed to operate typically with a 4.7 µF ceramic output capacitor (any value between 1 µF and 15 µF works properly) and a ceramic bypass capacitor of minimum 1 µF on its input REG_I connected to ground. The output of the boost converter VS is usually connected to the input REG_I. The LDO has an internal softstart feature of 2 ms maximum to limit the inrush current. As for the boost converter, a minimum current of 50 µA flowing through the feedback divider is usually enough to cover the noise fluctuation. The resistors are then calculated with 70 µA as: VREG_O R11 = VREG_FB 70 μA » 18 kW æ VREG_O ö R10 = R11 ´ ç - 1÷ ç VREG_FB ÷ è ø R10 VREG_FB R11 (5) with VREG_FB = 1.240 V VCOM BUFFER The VCOM Buffer power supply pin is the SUP pin connected to the boost converter VS. To achieve good performance and minimize the output noise, a 1-µF ceramic bypass capacitor is required directly from the SUP pin to ground. The input positive pin OPI is either supply through a resistive divider from VS or with an external PMIC. The buffer is not designed to drive high capacitive loads; therefore it is recommended to connect a series resistor at the output to provide stable operation when driving high capacitive load. With a 3.3-Ω series resistor, a capacitive load of 10 nF can be driven, which is usually sufficient for typical LCD applications. Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :TPS65148 15 TPS65148 SLVS904 – MAY 2009 ........................................................................................................................................................................................................ www.ti.com EXTERNAL CHARGE PUMPS External Positive Charge Pump The external positive charge pump provides with the below configuration (figure Figure 20) an output voltage VGH of maximum 3 times the output voltage of the Boost converter VS. The first stage provides roughly 3*VS in that configuration, and the second stage is used as regulation whose output voltage is selectable. The operation of the charge pump driver can be understood best with Figure 20 which shows an extract of the positive charge pump driver circuit out of the typical application. The voltage on the collector of the bipolar transistor is slightly equal to 3*VS-4*VF. The next stage regulates the output voltage VGH. A Zener diode clamps the voltage at the desired output value and a bipolar transistor is used to provide better load regulation as well as to reduce the quiescent current. Finally the output voltage on VGH will be equal to VZ-Vbe. T2 BC850B 3. VS C22 470 nF D8 C23 470 nF BAT54S R15 4.3 kW C21 1 mF/ 50 V D9 BAT54S C19 470 nF D5 2. VS C20 470 nF BAT54S VIN 2.5 V to 6 V VGH ~ 32V / 20mA D7 BZX84C 33V D6 L VS 13.6V / 500mA Q1 D1 Figure 20. Positive Charge Pump Doubler Mode: if the VGH voltage can be reached using doubler mode, then the configuration is the same than the one shown inFigure 28. External Negative Charge Pump The external negative charge pump works also with two stages (charge pump and regulation). The charge pump provides a negative regulated output voltage. Figure 21 shows the operation details of the negative charge pump. With the first stage, the voltage on the collector of the bipolar transistor is equal to –VS+VF. The next stage regulates the output voltage VGL. A resistor and a Zener diode are used to clamp the voltage to the desired output value. The bipolar transistor is used to provide better load regulation as well as to reduce the quiescent current. The output voltage on VGL will be equal to -VZ–Vbe. 16 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :TPS65148 TPS65148 www.ti.com ........................................................................................................................................................................................................ SLVS904 – MAY 2009 VGL ~ -7 V/20 mA T1 BC857B -VS R14 5.6 kW C16 1 mF/ 16 V D3 BAT54S D4 C17 470 nF D2 BZX84C 7V5 C18 470 nF VIN 2.5 V to 6 V VS 13.6V / 500mA Q1 D1 Figure 21. Partially Regulated External Negative Components Selection Capacitors (Charge Pumps) For best output voltage filtering a low ESR output capacitor is recommended. Ceramic capacitors have a low ESR value but depending on the application tantalum capacitors can be used as well. For every capacitor, the reactance value has to be calculated as follows: 1 XC = 2 ´ p ´ f ´ C (6) This value should be as low as possible in order to reduce the voltage drop due to the current flowing through it. The rated voltage of the capacitor has to be able to withstand the voltage across it. Capacitors rated at 50 V are enough for most of the applications. Typically a 470-nF capacitance is sufficient for the flying capacitors whereas bigger values like 1 µF or more can be used for the output capacitors to reduce the output voltage ripple. CAPACITOR COMPONENT SUPPLIER COMPONENT CODE COMMENTS 100 nF/0603 Taiyo Yuden UMK107 BJ 104KA Flying Cap 470 nF/0805 Taiyo Yuden UMK212 BJ 474KG Output Cap 1 1 µF/1210 Taiyo Yuden UMK325 BJ 105KH Output Cap 2 Diodes (Charge Pumps) For high efficiency, one has to minimize the forward voltage drop of the diodes. Schottky diodes are recommended. The reverse voltage rating must withstand the maximum output voltage VS of the boost converter. Usually a Schottky diode with 200 mA average forward rectified current is suitable for most of the applications. CURRENT RATING IF VR VF / IF COMPONENT SUPPLIER COMPONENT CODE PACKAGE TYPE 200 mA 30 V 0.5V / 30mA International Rectifier BAT54S SOT 23 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :TPS65148 17 TPS65148 SLVS904 – MAY 2009 ........................................................................................................................................................................................................ www.ti.com GATE VOLTAGE SHAPING FUNCTION External Positive Charge Pump VS VIN SW SW SUP Power Transistor Boost Converter VGH M1 Gate Voltage Shaping (GVS) VFLK VGHM M2 RE VDPM PGND AGND Figure 22. Gate Voltage Shaping Block Diagram The Gate Voltage Shaping is controlled by the flicker input signal VFLK, except during start-up where it is kept at low state, whatever the VFLK signal is. The VGHM output is enabled once VDPM voltage is higher than Vref = 1.240 V. The capacitor connected to VDPM (C13 on Figure 27) pin sets the delay from the boost converter Power Good (90% of its nominal value). I ´ tDPM 20 m A ´ tDPM CVDPM = DPM = Vref 1.240 V (7) VFLK = 'high' → VGHM = VGH VFLK = 'low' → VGHM discharges through Re resistor The slope at which VGHM discharges is set by the external resistor connected to RE, the internal MOSFET RDS(ON) (typically 13Ω for M2 – see Figure 22) and by the external gate line capacitance connected to VGHM pin. Boost Power Good VFLK VFLK = “high” Unknown state Delay set by VDPM VFLK = “low” VGH Slope set by Re VGHM 0V Figure 23. Gate Voltage Shaping Timing 18 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :TPS65148 TPS65148 www.ti.com ........................................................................................................................................................................................................ SLVS904 – MAY 2009 If RE is connected with a resistor to ground (see Figure 23), when VFLK = 'low' VGHM will discharge from VGH down to 0V. Since 5*τ (τ = R*C) are needed to fully discharge C through R, we can define the time-constant of the gate voltage shaping block as follow: τ = (Re + RDS(ON)M2) × CVGHM Therefore, if the discharge of CVGHM should finish during VFLK = 'low': t discharge = 5 ´ t = t VFLK =' low ' RE = Þ t VFLK =' low ' 5 ´ CVGHM - RDS(ON)M2 (8) NOTE: CVGHM and RVGHM form the parasitic RC network of a pixel gate line of the panel. If they are not known, they can be ignored at the beginning and estimated from the discharge slope of VGHM signal. VS VS VGHM Re M2 RE Re’ Option 2 Option 3 Option 1 Re Re Figure 24. Discharge Path Options for VGHM Options 2 and 3 from Figure 24 work like option 1 explained above. When M2 is turned on, VGHM discharges with a slope set by Re from VGH level down to VS in option 2 configuration and down to the voltage set by the resistor divider in option 3 configuration. The discharging slope is set by Re resistor(s). NOTE: when options 2 or 3 are used, VGHM is not held to 0V at startup but to the voltage set on RE pin by the resistors Re and Re’. Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :TPS65148 19 TPS65148 SLVS904 – MAY 2009 ........................................................................................................................................................................................................ www.ti.com RESET FUNCTION The device has an integrated reset function with an open-drain output capable of sinking 1 mA. The reset function monitors the voltage applied to its sense input VDET. As soon as the voltage on VDET falls below the threshold voltage VDET_threshold of typically 1.240 V, the reset function asserts its reset signal by pulling XAO low. Typically, a minimum current of 50µA flowing through the feedback divider when VDET voltage trips the reference voltage of 1.240 V is required to cover the noise fluctuation. Therefore, to select R4, one has to set the input voltage limit (VIN_LIM) at which the reset function will pull XAO to low state. VIN_LIM must be higher than the UVLO threshold. The resistors are then calculated with 70 µA as: VIN R5 = æ VIN_LIM ö R4 = R5 ´ ç - 1÷ è VDET ø VDET » 18 kW 70 μA R4 VDET R5 (9) with VDET = 1.240 V The reset function is operational for VIN ≥ 1.6V: VDET VDET_threshold+ hys VDET_threshold Min. Operating voltage VIN = 1.6 V GND XAO Unknown state GND Figure 25. Voltage Detection and XAO Pin The reset function is configured as a standard open-drain and requires a pull-up resistor. The resistor RXAO (R3), which must be connected between the XAO pin and a positive voltage VX greater than 2V - 'high' logic level - e.g. VIN, can be chosen as follows: V V - 2V R XAO_min > X & R XAO_max < X 1 mA 2 mA (10) THERMAL SHUTDOWN A thermal shutdown is implemented to prevent damages because of excessive heat and power dissipation. Typically the thermal shutdown threshold for the junction temperature is 150 °C. When the thermal shutdown is triggered the device stops operating which until the junction temperature falls below typically 136 °C. Then the device starts switching again. The XAO signal is independent of the thermal shutdown. 20 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :TPS65148 TPS65148 www.ti.com ........................................................................................................................................................................................................ SLVS904 – MAY 2009 POWER SEQUENCING When EN is high and the input voltage VIN reaches the Under Voltage Lockout (UVLO), the device is enabled and the GD pin is pulled low. The boost converter starts switching and the VCOM buffer is enabled. As soon as VS of the boost converter reaches its Power Good, the voltage regulator for gamma is enabled and the delay enabling the gate voltage shaping block starts. Once this delay has passed, the VGHM pin output is enabled. 1. GD 2. Boost converter & VCOM Buffer 3. Voltage regulator for Gamma Buffer 4. VGHM (after proper delay) Device ENABLED Device DISABLED UVLO VDET_THRESHOLD UVLO VIN EN GD BOOST VCOM VGH (external) VGL (external) REG_O Vref = 1.240 V VDPM VFLK Unknown state Unknown state Delay set by VDPM VGHM Co Slope set by Re nn e VG cted H to Di = LC s Fu cha D nc rg tio e n Figure 26. Sequencing TPS65148 Power off sequencing and LCD discharge function When the input voltage VIN falls below a predefined threshold (set by VDET_THRESHOLD - see Figure 26 ), XAO is driven low and VGHM is driven to VGH. (Note that when VIN falls below the UVLO threshold, all IC functions are disabled except XAO and VGHM). Since VGHM is connected to VGH, it tracks the output of the positive charge pump as it decays. This feature, together with XAO can be used to discharge the panel by turning on all the pixel TFTs and discharging them into the gradually decaying VGHM voltage. VGHM is held low during power-up. Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :TPS65148 21 TPS65148 SLVS904 – MAY 2009 ........................................................................................................................................................................................................ www.ti.com APPLICATION INFORMATION L 4.7µH Q FDS4435 VIN 2.5V to 6.0V C3 1nF C1~2 2*10µF/ 10V C5~8 4*10µF/ 25V C4 10µF/ 10V P P FREQ R1 180kW FB Boost Converter (VS) R12 56kW RHVS VIN High Voltage Stress VIN R2 18kW HVS VS P Gate Driver REG_I VIN VIN P C9 1µF/ 25V SUP SW GD SW P EN C10 1µF/ 10V VS 13.6V / 500mA D1 SL22 R3 2.7kW R4 27kW P XAO REG_O LDO (VREG_O) Reset Function (XAO) VDET C15 1µF/ 25V REG_FB R5 18kW VREG_O 12.5V /15mA C14 4.7µF/ 25V R10 91kW R11 10kW P VGH VGH VS VGHM R6 30kW R7 18kW Gate Voltage Shaping (VGHM) OPI VCOM 5V / 100mA OPO VCOM (VCOM) VGHM ~ 23V / 20mA RE R9 80kW VFLK P C11 3.3nF PGND AGND AGND PGND R8 47kW SS COMP OPGND VDPM P P C12 100nF C13 100nF Figure 27. TPS65148 Typical Application 22 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :TPS65148 TPS65148 www.ti.com ........................................................................................................................................................................................................ SLVS904 – MAY 2009 VGH T2 ~ 23V / 20mA BC850B VGL ~ -7V / 20mA T1 BC857B C18 470nF D3 C19 470nF BAT54S P BAT54S C17 470nF R14 5.6kW C16 1µF/ 16V P P L 4.7µH Q FDS4435 C3 1nF VS 13.6V / 500mA D1 SL22 C5~8 4*10µF/ 25V C4 10µF/ 10V P P FREQ P C9 1µF/ 25V SUP SW SW P GD EN R1 180kW FB Boost Converter (VS) R12 56kW RHVS VIN High Voltage Stress VIN R2 18kW HVS P VS Gate Driver REG_I VIN VIN P D4 VIN 2.5V to 6.0V C10 1µF/ 10V C21 1µF/ 50V D7 BZX84C 24V D6 P D2 BZX84C 7V5 C1~2 2*10µF/ 10V R15 2kW C20 470nF D5 R3 2.7kW R4 27kW P XAO LDO (VREG_O) Reset Function (XAO) VDET REG_O REG_FB R5 18kW C15 1µF/ 25V VREG_O 12.5V /15mA C14 4.7µF/ 25V R10 91kW R11 10kW P VGH VGH VS VGHM OPI VGHM ~ 23V / 20mA RE R9 80kW VFLK P C11 3.3nF PGND COMP R8 47kW AGND VDPM AGND OPO VCOM (VCOM) SS VCOM 5V / 100mA OPGND R7 18kW Gate Voltage Shaping (VGHM) PGND R6 30kW P P C12 100nF C13 100nF Figure 28. TPS65148 Typical Application with Positive Charge Pump in Doubler Mode Configuration Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :TPS65148 23 PACKAGE OPTION ADDENDUM www.ti.com 2-Jun-2009 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TPS65148RHBR ACTIVE QFN RHB 32 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS65148RHBT ACTIVE QFN RHB 32 250 CU NIPDAU Level-2-260C-1 YEAR Green (RoHS & no Sb/Br) Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 8-Jun-2009 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel Diameter Width (mm) W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TPS65148RHBR QFN RHB 32 3000 330.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2 TPS65148RHBT QFN RHB 32 250 180.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 8-Jun-2009 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS65148RHBR QFN RHB 32 3000 346.0 346.0 29.0 TPS65148RHBT QFN RHB 32 250 190.5 212.7 31.8 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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