TPA2013D1 www.ti.com SLOS520 – AUGUST 2007 2.7-W CONSTANT OUTPUT POWER CLASS-D AUDIO AMPLIFIER WITH INTEGRATED BOOST CONVERTER FEATURES APPLICATIONS • • • • • 1 • • • • • • • • • • • High Efficiency Integrated Boost Converter (Over 90% Efficiency) 2.2-W into an 8-Ω Load from a 3.6-V Supply 2.7-W into an 4-Ω Load from a 3.6-V Supply Operates from 1.8 V to 5.5 V Efficient Class-D Prolongs Battery Life Independent Shutdown for Boost Converter and Class-D Amplifier Differential Inputs Reduce RF Common Noise Built-in INPUT Low Pass Filter Decreases RF and Out of Band Noise Sensitivity Synchronized Boost and Class-D Eliminates Beat Frequencies Thermal and Short-Circuit Protection Available in 2.275 mm x 2.275 mm 16-ball WCSP and 4 mm x 4 mm 20-Lead QFN Packages 3 Selectable Gain Settings of 2 V/V, 6 V/V, and 10 V/V Cell Phones PDA GPS Portable Electronics DESCRIPTION The TPA2013D1 is a high efficiency Class-D audio power amplifier with an integrated boost converter. It drives up to 2.7 W (10% THD+N) into a 4 Ω speaker. With 85% typical efficiency, the TPA2013D1 helps extend battery life when playing audio. The built-in boost converter generates the voltage rail for the Class-D amplifier. This provides a louder audio output than a stand-alone amplifier connected directly to the battery. It also maintains a consistent loudness, regardless of battery voltage. Additionally, the boost converter can be used to supply external devices. The TPA2013D1 has an integrated low pass filter to improve RF rejection and reduce out-of-band noise, increasing the signal to noise ratio (SNR). A built-in PLL synchronizes the boost converter and Class-D switching frequencies, thus eliminating beat frequencies and improving audio quality. All outputs are fully protected against shorts to ground, power supply, and output-to-output shorts. R1 50 kΩ R2 500 kΩ 22 mF 1 mF 2.2 to 6.2 mH To Battery 10 mF VDD SW VCCFB VCCOUT VCCIN CIN IN– Differential Input 1 mF VOUT+ IN+ CIN Gain (VCC/Float/GND) GPIO TPA2013D1 VOUT– GAIN ShutDown Boost SDb ShutDown ClassD SDd AGND PGND 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2007, Texas Instruments Incorporated TPA2013D1 www.ti.com SLOS520 – AUGUST 2007 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. DEVICE INFORMATION 20 19 18 YZH (WCSP) Package (Top View) VCCIN VCCOUT SW SW PGND RGP (QFN) Package (Top View) VCCIN VCCOUT SW PGND A1 A2 A3 A4 VOUT+ GAIN VCCFB VDD B1 B2 B3 B4 16 17 2 14 VOUT+ GAIN 3 13 VOUT+ VOUT– PGND SDd AGND AGND 4 12 VOUT– C1 C2 C3 C4 SDd 5 11 VOUT– PGND IN+ IN– SDb D1 D2 D3 D4 6 7 8 9 10 PGND VCCFB PGND VOUT+ IN+ 15 IN– 1 SDb VDD TPA2013D1YZH TPA2013D1RGP BOOST CONVERTER TERMINAL FUNCTIONS TERMINAL NAME I/O DESCRIPTION QFN WCSP IN+ 8 D2 I Positive audio input IN– 7 D3 I Negative audio input VOUT+ 13, 14, 15 B1 O Positive audio output VOUT– 11, 12 C1 O Negative audio output 6 D4 I Shutdown terminal for the Boost Converter SDd 5 C3 I Shutdown terminal for the Class D Amplifier SW 18, 19 A3 – Boost and rectifying switch input VCCOUT 17 A2 – Boost converter output - connect to VCCIN GAIN 3 B2 I Gain selection pin VCCIN 16 A1 – Class-D audio power amplifier voltage supply - connect to VCCOUT VCCFB 2 B3 I Voltage feedback VDD 1 B4 – Supply voltage SDb AGND 4 C4 – Analog ground - connect all GND pins together PGND 9, 10, 20 D1, C2, A4 – Power ground - connect all GND pins together Thermal Pad Die Pad N/A P Solder the thermal pad on the bottom of the QFN package to the GND plane of the PCB. It is required for mechanical stability and will enhance thermal performance. 2 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TPA2013D1 TPA2013D1 www.ti.com SLOS520 – AUGUST 2007 Functional Block Diagram SW BG Control VCCOUT AntiRinging VDD VCCOUT Vmax Control Gate Control PGND VCCFB Regulator SDb SDd Biases, Control, and References Vref Internal Oscillator AGND VCCIN GAIN IN– IN+ PWM and Level Shifter Res. Array VOUT+ H-Bridge VOUT– PGND AGND AGND PGND Table 1. BOOST CONVERTER MODE CONDITION CASE OUTPUT CURRENT MODE OF OPERATION VDD < VCC Low Continuous (fixed frequency) VDD < VCC High Continuous (fixed frequency) VDD ≥ VCC Low Discontinuous (variable frequency) VDD ≥ VCC High Discontinuous (variable frequency) Table 2. DEVICE CONFIGURATION SDb SDd Boost Converter Class D Amplifier low low OFF OFF Device is in shutdown mode Iq ≤ 1 μA low high OFF ON Boost converter is off. Class-D Audio Power Amplifier (APA) can be driven by an external pass transistor connected to the battery. high low ON OFF Class-D APA is off. Boost Converter is on and can be used to drive an external device. high high ON ON Boost converter and Class-D APA are on. Normal operation. Boost converter can be used to drive an external device in parallel to the Class-D APA within the limits of the boost converter output current. Comments Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TPA2013D1 3 TPA2013D1 www.ti.com SLOS520 – AUGUST 2007 ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) VDD Supply voltage VI Input voltage, Vi: SDb, SDd, IN+, IN–, VCCFB (1) Continuous total power dissipation VALUE UNIT –0.3 to 6 V –0.3 to VDD + 0.3 V See Dissipation Rating Table TA Operating free-air temperature range –40 to 85 °C TJ Operating junction temperature range –40 to 150 °C Tstg Storage temperature range –65 to 150 °C (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operations of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. DISSIPATION RATINGS (1) PACKAGE TA ≤ 25°C DERATING FACTOR (1) TA = 70°C TA = 85°C 16 ball WCSP 1.5 W 12.4 mW/°C 1W 0.8 W 20 pin QFN 2.5 W 20.1 mW/°C 1.6 W 1.3 W Derating factor measured with JEDEC High K board. AVAILABLE OPTIONS TA PACKAGED DEVICES (1) PART NUMBER SYMBOL –40°C TO 85°C 16-ball, 2.275 mm × 2.275 mm WCSP (± 0.05mm tolerance) TPA2013D1YZH BTH 20-pin, 4 mm × 4 mm QFN (1) (2) TPA2013D1RGP (2) BTI For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. The RGP package is only available taped and reeled. To order, add suffix R to the end of the part number for a reel of 3000 (e.g., TPA2013D1RGPR). RECOMMENDED OPERATING CONDITIONS MIN MAX 1.8 5.5 UNIT VDD Supply voltage VIH High-level input voltage SDb, SDd VIL Low-level input voltage SDb, SDd 0.35 V | IIH | High-level input current SDb = SDd = 5.8 V, VDD = 5.5 V, VCC = 5.5 V 1 μA | IIL| Low-level input current SDb = SDd = -0.3 V, VDD = 5.5 V, VCC = 5.5 V 20 μA TA Operating free-air temperature 85 °C 4 1.3 –40 Submit Documentation Feedback V V Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TPA2013D1 TPA2013D1 www.ti.com SLOS520 – AUGUST 2007 DC CHARACTERISTICS TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN Class-D audio power amplifier voltage supply range, VCCIN VCC ISD Shutdown quiescent current TYP 3 MAX 5.5 SDd = SDb = 0 V, VDD = 1.8 V, RL = 8 Ω 0.04 1.5 SDd = SDb = 0 V, VDD = 3.6 V, RL = 8 Ω 0.04 1.5 SDd = SDb = 0 V, VDD = 4.5 V, RL = 8 Ω 0.02 1.5 SDd = SDb = 0.35 V, VDD = 1.8 V, RL = 8 Ω 0.03 1.5 SDd = SDb = 0.35 V, VDD = 3.6 V, RL = 8 Ω 0.03 1.5 SDd = SDb = 0.35 V, VDD = 4.5 V, RL = 8 Ω 0.02 1.5 IDD Boost converter quiescent current SDd = 0 V, SDb = 1.3 V, VDD = 3.6 V, VCC = 5.5 V, No Load, No Filter 1.3 ICC Class D amplifier quiescent current VDD = 3.6, Vcc = 5.5 V, No Load, No Filter 4.3 6 VDD = 4.5, Vcc = 5.5 V, No Load, No Filter 3.6 6 SDd = SDb = 1.3V, VDD = 3.6, Vcc = 5.5 V, No Load, No Filter 16.5 23 IDD Boost converter and audio power amplifier quiescent current, Class D (1) SDd = SDb = 1.3V, VDD = 4.5, Vcc = 5.5 V, No Load, No Filter 11 18.5 f UVLO GAIN PORD (1) UNIT V μA mA mA mA Boost converter switching frequency 500 600 700 kHz Class D switching frequency 250 300 350 kHz 1.7 V 0 0.35 V 0.8 1 V Under voltage lockout Gain input low level Gain = 2 V/V (6dB) Gain input mid level Gain = 6 V/V (15.5 dB) (floating input) Gain input high level Gain = 10 V/V (20 dB) Class D Power on reset ON threshold 0.7 1.35 V 2.8 V IDD is calculated using IDD = (ICC× VCC)/(VDD×η), where ICC is the class D amplifier quiescent current; η = 40%, which is the boost converter efficiency when class D amplifier has no load. To achieve the minimal 40% η, it is recommended to use the suggested inductors in table 4 and to follow the layout guidelines. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TPA2013D1 5 TPA2013D1 www.ti.com SLOS520 – AUGUST 2007 BOOST CONVERTER DC CHARACTERISTICS TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VCC Output voltage range 3.0 VFB Feedback voltage 490 IOL Output current limit, Boost_max 1300 RON_PB PMOS switch resistance 220 mΩ RON_NB NMOS resistance 170 mΩ IL Line regulation No Load, 1.8 V < VDD < 5.2 V, VCC = 5.5 V Load regulation VDD = 3.6 V, 0 < IL < 500 mA, VCC = 5.5 V Start up current limit, Boost 5.5 V 500 510 mV 1500 1700 mA 3 mV/V 30 mV/A 0.4×IBoost mA CLASS D AMPLIFIER DC CHARACTERISTICS TA = 25°C (unless otherwise noted) PARAMETER CMR CMRR VOO TEST CONDITIONS Input common mode range Input common mode rejection Output offset voltage Class-D MIN RDS(on) RDS(on) AV Input Impedance 2.2 Vin = ±100 mV, VDD = 2.5 V, VCC = 3.6 V, RL = 8 Ω 0.5 2.8 Vin = ±100 mV, VDD = 3.6 V, VCC = 5.5 V, RL = 8 Ω 0.5 4.7 RL = 8 Ω, Vicm = 0.5 and Vicm = VCC – 0.8, differential inputs shorted –75 OUTN High-side FET On-state series resistance UNIT V dB VCC = 3.6 V, Av = 2 V/V, IN+ = IN– = Vref, RL = 8 Ω 1 6 VCC= 3.6 V, Av = 6 V/V, IN+ = IN– = Vref, RL = 8 Ω 1 6 VCC= 3.6 V, Av = 10 V/V, IN+ = IN– = Vref, RL = 8 Ω 1 6 VCC = 5.5 V, Av = 2 V/V, IN+ = IN– = Vref, RL = 8 Ω 1 6 mV 32 Gain = 6 V/V (15.5 dB) 15 Gain = 10 V/V (20 dB) 9.5 OUTP High-side FET On-state series resistance OUTP Low-side FET On-state series resistance MAX 0.5 Gain = 2 V/V (6 dB) Rin TYP Vin = ±100 mV, VDD = 1.8 V, VCC = 3 V, RL = 8 Ω kΩ 0.36 0.36 Ω IOUTx = –300 mA; VCC = 3.6 V 0.36 OUTN Low-side FET On-state series resistance 0.36 Low Gain GAIN ≤ 0.35 V 1.8 2 2.2 V/V Mid Gain GAIN = 0.8 V 5.7 6 6.3 V/V High Gain GAIN ≥ 1.35 V 9.5 10 10.5 V/V AC CHARACTERISTICS TA = 25°C, VDD = 3.6V, RL = 8 Ω, L = 4.7μH (unless otherwise noted) PARAMETER tSTART η Start up time Efficiency Thermal Shutdown 6 TEST CONDITIONS 1.8 V ≤ VDD ≤ 5.5 V, CIN ≤ 1 μF MIN TYP 7.5 THD+N = 1%, VCC = 5.5 V, VDD = 3.6 V, RL= 8 Ω, Pout = 1.7 W, Cboost= 47μF 85% THD+N = 1%, VCC = 5.5 V, VDD = 4.2 V, RL = 8 Ω, Pout = 1.7 W 87.5% Threshold Submit Documentation Feedback 150 MAX UNIT ms °C Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TPA2013D1 TPA2013D1 www.ti.com SLOS520 – AUGUST 2007 CLASS D AMPLIFIER AC CHARACTERISTICS TA = 25°C, VDD = 3.6V, RL = 8 Ω, L = 4.7μH (unless otherwise noted) PARAMETER KSVR Class-D THD+N Class-D Vn Class-D PO TEST CONDITIONS Output referred power supply rejection ratio Total harmonic distortion + noise MIN TYP VDD = 3.6 V, VCC = 5.5V, 200 mVPP ripple, f = 217 Hz –95 f = 1 kHz, Po = 1.7 W, VCC = 5.5 V 1% f = 1 kHz, Po = 1.2 W, VCC = 4.5 V 1% f = 1 kHz, Po = 2.2 W, VCC = 5.5 V 10% f = 1 kHz, Po = 1 W, VCC = 5.5 V 0.1% Output integrated noise floor Av = 6 dB (2V/V) 31 Output integrated noise floor A-weighted Av = 6 dB (2V/V) 23 THD+N = 10%, VCC = 5.5V, VDD = 3.6V , RL = 8 Ω 2.2 THD+N = 1%, VCC = 5.5V, VDD = 3.6V , RL = 8 Ω 1.7 THD+N = 1%, VCC = 4.5V, VDD = 3.6V , RL = 8 Ω 1.2 THD+N = 10%, VCC = 5.5V, VDD = 3.6V , RL = 4 Ω 2.7 THD+N = 1%, VCC = 5.5V, VDD = 3.6V , RL = 4 Ω 2.2 THD+N = 1%, VCC = 4.5V, VDD = 3.6V , RL = 4 Ω 1.9 Maximum output power MAX UNIT dB μVrms W TEST SET-UP FOR GRAPHS TPA2013D1 CI + Measurement Output – IN+ OUT+ Load CI IN VDD + OUT– 30 kHz Low-Pass Filter + Measurement Input – GND 1 mF VDD – (1) CI was shorted for any common-mode input voltage measurement. All other measurements were taken with a 1-μF CI (unless otherwise noted). (2) A 33-μH inductor was placed in series with the load resistor to emulate a small speaker for efficiency measurements. (3) The 30-kHz low-pass filter is required, even if the analyzer has an internal low-pass filter. An RC low-pass filter (100Ω, 47-nF) is used on each output for the data sheet graphs. (4) L = 4.7μH is used for the boost converter unless otherwise noted. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TPA2013D1 7 TPA2013D1 www.ti.com SLOS520 – AUGUST 2007 TYPICAL CHARACTERISTICS EFFICIENCY vs OUTPUT POWER 100 100 80 80 Efficiency − % Efficiency − % EFFICIENCY vs OUTPUT POWER 60 40 VDD = 3.6 V VDD = 2.5 V VDD = 4.2 V VDD = 1.8 V Gain = 2 V/V RL = 8 Ω + 33 µH VCC = 4.5 V 20 0 0.0 0.5 1.0 VDD = 2.5 V VDD = 1.8 V Gain = 2 V/V RL = 8 Ω + 33 µH VCC = 5.5 V 0.5 1.0 1.5 PO − Output Power − W G001 2.0 G002 Figure 1. Figure 2. POWER DISSIPATION vs OUTPUT POWER POWER DISSIPATION vs OUTPUT POWER 0.6 Gain = 2 V/V RL = 8 Ω + 33 µH VCC = 4.5 V PD − Power Dissipation − W PD − Power Dissipation − W 40 0 0.0 0.6 0.5 VDD = 3.6 V VDD = 4.2 V 20 1.5 PO − Output Power − W 60 VDD = 3.6 V 0.4 VDD = 2.5 V 0.3 VDD = 1.8 V 0.2 0.1 0.5 Gain = 2 V/V RL = 8 Ω + 33 µH VCC = 5.5 V VDD = 2.5 V 0.4 0.3 VDD = 3.6 V VDD = 1.8 V 0.2 0.1 VDD = 4.2 V VDD = 4.2 V 0.0 0.0 0.5 1.0 0.0 0.0 1.5 PO − Output Power − W G003 Figure 4. SUPPLY CURRENT vs OUTPUT POWER SUPPLY CURRENT vs OUTPUT POWER VDD = 3.6 V IDD − Supply Current − A IDD − Supply Current − A 2.0 G004 1.2 Gain = 2 V/V RL = 8 Ω + 33 µH VCC = 4.5 V VDD = 2.5 V VDD = 1.8 V 0.4 0.2 0.5 1.0 PO − Output Power − W 1.0 0.8 0.6 Gain = 2 V/V VDD = 3.6 V RL = 8 Ω + 33 µH VCC = 5.5 V VDD = 2.5 V VDD = 1.8 V 0.4 0.2 VDD = 4.2 V 1.5 0.0 0.0 G005 Figure 5. 8 1.5 Figure 3. 0.6 0.0 0.0 1.0 PO − Output Power − W 1.0 0.8 0.5 VDD = 4.2 V 0.5 1.0 PO − Output Power − W 1.5 2.0 G006 Figure 6. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TPA2013D1 TPA2013D1 www.ti.com SLOS520 – AUGUST 2007 TYPICAL CHARACTERISTICS (continued) OUTPUT POWER vs SUPPLY VOLTAGE OUTPUT POWER vs SUPPLY VOLTAGE 2.5 2.0 L = 6.2 µH L = 3.3 µH Gain = 2 V/V RL = 8 Ω + 33 µH THD = 1% VCC = 4.5 V PO − Output Power − W PO − Output Power − W 2.5 1.5 1.0 L = 4.7 µH L = 2.2 µH 0.5 0.0 1.8 2.2 2.6 3.0 3.4 3.8 4.2 VDD − Supply Voltage − V L = 6.2 µH 2.0 1.5 L = 3.3 µH 1.0 L = 4.7 µH Gain = 2 V/V RL = 8 Ω + 33 µH THD = 1% VCC = 5.5 V 0.5 0.0 1.8 4.6 2.2 2.6 3.0 3.4 3.8 4.2 4.6 5.0 VDD − Supply Voltage − V G007 Figure 7. Figure 8. OUTPUT POWER vs SUPPLY VOLTAGE OUTPUT POWER vs SUPPLY VOLTAGE 2.5 5.4 G008 2.5 2.0 L = 3.3 µH L = 6.2 µH PO − Output Power − W PO − Output Power − W L = 6.2 µH 1.5 1.0 L = 2.2 µH L = 4.7 µH Gain = 2 V/V RL = 8 Ω + 33 µH THD = 10% VCC = 4.5 V 0.5 0.0 1.8 2.2 2.6 3.0 3.4 3.8 4.2 VDD − Supply Voltage − V L = 3.3 µH 1.5 L = 4.7 µH 1.0 Gain = 2 V/V RL = 8 Ω + 33 µH THD = 10% VCC = 5.5 V 0.5 0.0 1.8 4.6 2.2 2.6 3.0 3.4 3.8 4.2 4.6 5.0 VDD − Supply Voltage − V G009 Figure 9. Figure 10. OUTPUT POWER vs LOAD OUTPUT POWER vs LOAD 3.0 5.4 G010 3.0 f = 1 kHz Gain = 2 V/V VCC = 4.5 V 2.0 1.5 THD = 10% 1.0 0.5 f = 1 kHz Gain = 2 V/V VCC = 5.5 V 2.5 PO − Output Power − W 2.5 PO − Output Power − W 2.0 2.0 1.5 THD = 10% 1.0 0.5 THD = 1% 0.0 THD = 1% 0.0 4 8 12 16 20 24 RL − Load Resistance − Ω 28 32 4 G011 Figure 11. 8 12 16 20 24 28 RL − Load Resistance − Ω 32 G012 Figure 12. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TPA2013D1 9 TPA2013D1 www.ti.com SLOS520 – AUGUST 2007 TYPICAL CHARACTERISTICS (continued) TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER 100 100 Gain = 2 V/V RL = 8 Ω + 33 µH VCC = 4.5 V 10 Gain = 2 V/V RL = 8 Ω + 33 µH VCC = 5.5 V 10 VDD = 1.8 V THD+N − % THD+N − % VDD = 1.8 V VDD = 2.5 V 1 VDD = 3.6 V 0.1 VDD = 2.5 V VDD = 3.6 V VDD = 4.2 V 1 0.1 VDD = 4.2 V 0.01 0.01 0.1 1 0.01 0.01 3 PO − Output Power − W 1 3 PO − Output Power − W G013 G014 Figure 13. Figure 14. TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY 100 10 Gain = 2 V/V RL = 4 Ω + 33 µH VCC = 5.5 V 10 VDD = 2.5 V VDD = 3.6 V 1 Gain = 2 V/V RL = 8 Ω + 33 µH VCC = 4.5 V VDD = 1.8 V 1 VDD = 1.8 V THD+N − % THD+N − % 0.1 VDD = 4.2 V 0.1 PO = 0.2 W 0.1 0.01 PO = 0.075 W PO = 0.025 W 0.01 0.01 0.001 0.1 1 5 PO − Output Power − W 20 10k f − Frequency − Hz G015 20k G016 Figure 16. TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY 10 Gain = 2 V/V RL = 8 Ω + 33 µH VCC = 4.5 V VDD = 3.6 V PO = 1 W 0.1 0.01 Gain = 2 V/V RL = 8 Ω + 33 µH VCC = 5.5 V VDD = 1.8 V 1 THD+N − % 1 PO = 0.025 W 0.1 0.01 PO = 0.05 W PO = 0.075 W PO = 0.2 W PO = 0.25 W 0.001 0.001 20 100 1k f − Frequency − Hz 10k 20k 20 G017 Figure 17. 10 1k Figure 15. 10 THD+N − % 100 100 1k f − Frequency − Hz 10k 20k G018 Figure 18. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TPA2013D1 TPA2013D1 www.ti.com SLOS520 – AUGUST 2007 TYPICAL CHARACTERISTICS (continued) TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY 10 10 Gain = 2 V/V RL = 8 Ω + 33 µH VCC = 5.5 V VDD = 3.6 V PO = 1 W 1 THD+N − % THD+N − % 1 0.1 0.01 Gain = 2 V/V PO = 250 mW RL = 4 Ω + 33 µH VCC = 4.5 V VDD = 3.6 V 0.1 VDD = 2.5 V 0.01 PO = 0.05 W PO = 0.25 W 0.001 100 1k 10k f − Frequency − Hz 20k 20 100 1k 10k f − Frequency − Hz G019 20k G020 Figure 19. Figure 20. TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY POWER SUPPLY REJECTION RATIO vs FREQUENCY 10 0 Gain = 2 V/V PO = 250 mW RL = 4 Ω + 33 µH VCC = 5.5 V 1 −20 VDD = 3.6 V PSRR − dB THD+N − % VDD = 4.2 V 0.001 20 VDD = 1.8 V VDD = 4.2 V 0.1 Gain = 2 V/V RL = 8 Ω + 33 µH VCC = 4.5 V −40 −60 VDD = 1.8 V VDD = 4.2 V VDD = 3.6 V −80 VDD = 2.5 V 0.01 −100 VDD = 1.8 V VDD = 2.5 V 0.001 20 100 1k 10k f − Frequency − Hz −120 20 20k 20k G022 Figure 22. POWER SUPPLY REJECTION RATIO vs FREQUENCY COMMON-MODE REJECTION RATIO vs FREQUENCY 0 Gain = 2 V/V RL = 8 Ω + 33 µH VCC = 5.5 V −20 −40 VDD = 1.8 V −60 VDD = 3.6 V VDD = 2.5 V −80 −100 Gain = 2 V/V RL = 8 Ω VCC = 4.5 V −40 VDD = 1.8 V VDD = 2.5 V −60 −80 VDD = 4.2 V −100 VDD = 3.6 V VDD = 4.2 V −120 20 10k f − Frequency − Hz G021 CMRR − dB PSRR − dB 1k Figure 21. 0 −20 100 100 1k f − Frequency − Hz 10k 20k −120 20 G023 Figure 23. 100 1k 10k f − Frequency − Hz 20k G024 Figure 24. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TPA2013D1 11 TPA2013D1 www.ti.com SLOS520 – AUGUST 2007 TYPICAL CHARACTERISTICS (continued) COMMON-MODE REJECTION RATIO vs FREQUENCY BOOST EFFICIENCY vs OUTPUT CURRENT 100 0 CMRR − dB −20 Gain = 2 V/V RL = 8 Ω VCC = 5.5 V 95 90 Boost Efficiency − % −10 −30 −40 −50 VDD = 3.6 V VDD = 1.8 V VDD = 2.5 V VDD = 4.2 V −60 85 VDD = 3.6 V 80 75 70 VDD = 1.8 V 65 −70 60 −80 55 −90 20 50 0.01 100 1k 10k 20k f − Frequency − Hz VCC = 4.5 V Figure 26. BOOST EFFICIENCY vs OUTPUT CURRENT BOOST EFFICIENCY vs SUPPLY VOLTAGE VCC = 4.5 V Boost Efficiency − % Boost Efficiency − % 90 85 80 VDD = 3.6 V 75 VDD = 4.2 V VDD = 2.5 V 70 VDD = 1.8 V 60 VCC = 5.5 V 80 70 60 VCC = 5.5 V 50 0.01 0.1 50 1.8 1 IO − Output Current − A ICC = 250 mA L = 4.7 µH 2.2 2.6 3.0 4.2 G028 Start-Up Time 6 1.4 L = 4.7 µH 5 VCC 4 1.0 0.8 V − Voltage − V IOM − Max. Continuous Output Current − A 3.8 Figure 28. MAXIMUM CONTINUOUS OUTPUT CURRENT vs SUPPLY VOLTAGE (BOOST) VCC = 4.5 V 0.6 VCC = 5.5 V 0.4 3 SDb, SDd 2 1 OUT 0 0.2 Start Time 7.5 ms −1 −2 2.2 2.6 3.0 3.4 VDD − Supply Voltage (Boost) − V 3.8 4.2 0 2 G029 Figure 29. 12 3.4 VDD − Supply Voltage − V G027 Figure 27. 0.0 1.8 G026 100 90 1.2 1 IO − Output Current − A G025 95 55 0.1 Figure 25. 100 65 VDD = 4.2 V VDD = 2.5 V 4 6 8 10 12 t − Time − ms 14 16 18 20 G030 Figure 30. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TPA2013D1 TPA2013D1 www.ti.com SLOS520 – AUGUST 2007 APPLICATION INFORMATION FULLY DIFFERENTIAL AMPLIFIER The TPA2013D1 is a fully differential amplifier with differential inputs and outputs. The fully differential amplifier consists of a differential amplifier with common-mode feedback. The differential amplifier ensures that the amplifier outputs a differential voltage on the output that is equal to the differential input times the gain. The common-mode feedback ensures that the common-mode voltage at the output is biased around VCC/2 regardless of the common-mode voltage at the input. The fully differential TPA2013D1 can still be used with a single-ended input; however, the TPA2013D1 should be used with differential inputs when in a noisy environment, like a wireless handset, to ensure maximum noise rejection. Advantages of Fully Differential Amplifiers • Input-coupling capacitors not required: – The fully differential amplifier allows the inputs to be biased at voltage other than mid-supply. The inputs of the TPA2013D1 can be biased anywhere within the common mode input voltage range listed in the Recommended Operating Conditions table. If the inputs are biased outside of that range, input-coupling capacitors are required. • Midsupply bypass capacitor, C(BYPASS), not required: – The fully differential amplifier does not require a bypass capacitor. Any shift in the midsupply affects both positive and negative channels equally and cancels at the differential output. • Better RF-immunity: – GSM handsets save power by turning on and shutting off the RF transmitter at a rate of 217 Hz. The transmitted signal is picked-up on input and output traces. The fully differential amplifier cancels the signal better than the typical audio amplifier. BOOST CONVERTER The TPA2013D1 consists of a boost converter and a Class-D amplifier. The boost converter takes a low supply voltage, VDD, and increases it to a higher output voltage, VCC. VCC is the power supply for the Class-D amplifier. The two main passive components necessary for the boost converter are the boost inductor and the boost capacitor. The boost inductor stores current, and the boost capacitor stores charge. As the Class-D amplifier depletes the charge in the boost capacitor, the boost inductor charges it back up with the stored current. The cycle of charge/discharge occurs at a frequency of fboost. The TPA2013D1 allows a range of VCC voltages, including setting VCC lower than VDD. Boost Terms The following is a list of terms and definitions used in the boost equations found later in this document. C Minimum boost capacitance required for a given ripple voltage on VCC. L Boost inductor fboost Switching frequency of the boost converter. ICC Current pulled by the Class-D amplifier from the boost converter. IL Average current through the boost inductor. R1 and R2 Resistors used to set the boost voltage. VCC Boost voltage. Generated by the boost converter. Voltage supply for the Class-D amplifier. VDD Supply voltage to the IC. ΔIL Ripple current through the inductor. ΔV Ripple voltage on VCC due to capacitance. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TPA2013D1 13 TPA2013D1 www.ti.com SLOS520 – AUGUST 2007 SETTING THE BOOST VOLTAGE Use Equation 1 to determine the value of R1 for a given VCC. The maximum recommended value for VCC is 5.5 V. The typical value of the VCCFB pin is 500 mV. The current through the resistor divider should be about 100 times greater than the current into the VCCFB pin, typically 0.01 μA. Based on those two values, the recommended value of R2 is 500 kΩ. VCC must be greater than 3 V and less than or equal to 5.5 V. æ 0.5 ´ (R1 + R2) ö VCC = ç ÷ R1 è ø (1) INDUCTOR SELECTION SURFACE MOUNT INDUCTORS Working inductance decreases as inductor current increases. If the drop in working inductance is severe enough, it may cause the boost converter to become unstable, or cause the TPA2013D1 to reach its current limit at a lower output power than expected. Inductor vendors specify currents at which inductor values decrease by a specific percentage. This can vary by 10% to 35%. Inductance is also affected by dc current and temperature. TPA2013D1 INDUCTOR EQUATIONS Inductor current rating is determined by the requirements of the load. The inductance is determined by two factors: the minimum value required for stability and the maximum ripple current permitted in the application. Use Equation 2 to determine the required current rating. Equation 2 shows the approximate relationship between the average inductor current, IL, to the load current, load voltage, and input voltage (ICC, VCC, and VDD, respectively). Insert ICC, VCC, and VDD into Equation 2 to solve for IL. The inductor must maintain at least 90% of its initial inductance value at this current. æ ö VCC IL = ICC ´ ç ÷ è VDD ´ 0.8 ø (2) The minimum working inductance is 2.2 μH. A lower value may cause instability. Ripple current, ΔIL, is peak-to-peak variation in inductor current. Smaller ripple current reduces core losses in the inductor as well as the potential for EMI. Use Equation 3 to determine the value of the inductor, L. Equation 3 shows the relationship between inductance L, VDD, VCC, the switching frequency, fboost, and ΔIL. Insert the maximum acceptable ripple current into Equation 3 to solve for L. ´ (VCC - VDD ) V L = DD DIL ´ fboost ´ VCC (3) ΔIL is inversely proportional to L. Minimize ΔIL as much as is necessary for a specific application. Increase the inductance to reduce the ripple current. Note that making the inductance too large will prevent the boost converter from responding to fast load changes properly. Typical inductor values for the TPA2013D1 are 4.7 μH to 6.8 μH. Select an inductor with a small dc resistance, DCR. DCR reduces the output power due to the voltage drop across the inductor. 14 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TPA2013D1 TPA2013D1 www.ti.com SLOS520 – AUGUST 2007 CAPACITOR SELECTION SURFACE MOUNT CAPACITORS Temperature and applied dc voltage influence the actual capacitance of high-K materials. Table 3 shows the relationship between the different types of high-K materials and their associated tolerances, temperature coefficients, and temperature ranges. Notice that a capacitor made with X5R material can lose up to 15% of its capacitance within its working temperature range. High-K material is very sensitive to applied dc voltage. X5R capacitors can have losses ranging from 15 to 45% of their initial capacitance with only half of their dc rated voltage applied. For example, if 5 Vdc is applied to a 10 V, 1 μF X5R capacitor, the measured capacitance at that point may show 0.85 μF, 0.55 μF, or somewhere in between. Y5V capacitors have losses that can reach or exceed 50% to 75% of their rated value. In an application, the working capacitance of components made with high-K materials is generally much lower than nominal capacitance. A worst case result with a typical X5R material might be –10% tolerance, –15% temperature effect, and –45% dc voltage effect at 50% of the rated voltage. This particular case would result in a working capacitance of 42% (0.9 × 0.85 × 0.55) of the nominal value. Select high-K ceramic capacitors according to the following rules: 1. Use capacitors made of materials with temperature coefficients of X5R, X7R, or better. 2. Use capacitors with dc voltage ratings of at least twice the application voltage. Use minimum 10 V capacitors for the TPA2013D1. 3. Choose a capacitance value at least twice the nominal value calculated for the application. Multiply the nominal value by a factor of 2 for safety. If a 10 μF capacitor is required, use 20 μF. The preceding rules and recommendations apply to capacitors used in connection with the TPA2013D1. The TPA2013D1 cannot meet its performance specifications if the rules and recommendations are not followed. Table 3. Typical tolerance and temperature coefficient of capacitance by material Material COG/NPO X7R X5R Typical Tolerance ±5% ±10% 80/–20% Temperature Coefficient ±30ppm ±15% 22/–82% Temperature Range, °C –55/125°C –55/125°C -30/85°C Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TPA2013D1 15 TPA2013D1 www.ti.com SLOS520 – AUGUST 2007 TPA2013D1 CAPACITOR EQUATIONS The value of the boost capacitor is determined by the minimum value of working capacitance required for stability and the maximum voltage ripple allowed on VCC in the application. The minimum value of working capacitance is 10 μF. Do not use any component with a working capacitance less than 10 μF. For X5R or X7R ceramic capacitors, Equation 4 shows the relationship between the boost capacitance, C, to load current, load voltage, ripple voltage, input voltage, and switching frequency (ICC, VCC, ΔV, VDD, fboost respectively). Insert the maximum allowed ripple voltage into Equation 4 to solve for C. A factor of 2 is included to implement the rules and specifications listed earlier. C=2 ´ ICC ´ (VCC - VDD ) DV ´ fboost ´ VCC (4) For aluminum or tantalum capacitors, Equation 5 shows the relationship between he boost capacitance, C, to load current, load voltage, ripple voltage, input voltage, and switching frequency (ICC, VCC, ΔV, VDD, fboost respectively). Insert the maximum allowed ripple voltage into Equation 5 to solve for C. Solve this equation assuming ESR is zero. C= ICC ´ (VCC - VDD ) DV ´ fboost ´ VCC (5) Capacitance of aluminum and tantalum capacitors is normally not sensitive to applied voltage so there is no factor of 2 included in Equation 5. However, the ESR in aluminum and tantalum capacitors can be significant. Choose an aluminum or tantalum capacitor with ESR around 30 mΩ. For best perfornamce using of tantalum capacitor, use at least a 10 V rating. Note that tantalum capacitors must generally be used at voltages of half their ratings or less. 16 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TPA2013D1 TPA2013D1 www.ti.com SLOS520 – AUGUST 2007 RECOMMENDED INDUCTOR AND CAPACITOR VALUES BY APPLICATION Use Table 4 as a guide for determining the proper inductor and capacitor values. Table 4. Recommended Values Class-D Output Power (W) (1) Class-D Load (Ω) Minimum VDD (V) Required VCC (V) Max IL (A) L (μH) Inductor Vendor Part Numbers Max ΔV (mVpp) C (2) (μF) 3.3 1 8 3 4.3 0.70 Toko DE2812C Coilcraft DO3314 Murata LQH3NPN3R3NG0 10 Kemet C1206C106K8PACTU Murata GRM32ER61A106KA01B Taiyo Yuden LMK316BJ106ML-T 30 4.7 1.6 8 3 5.5 1.13 2 4 3 4.6 1.53 2.3 4 1.8 5.5 2 Murata LQH32PN4R7NN0 Toko DE4514C Coilcraft LPS4018-472 22 30 Murata GRM32ER71A226KE20L Taiyo Yuden LMK316BJ226ML-T 3.3 Murata LQH55PN3R3NR0 Toko DE4514C 33 30 TDK C4532X5R1A336M 6.2 (1) (2) Sumida CDRH5D28NP-6R2NC Capacitor Vendor Part Numbers 47 30 Murata GRM32ER61A476KE20L Taiyo Yuden LMK325BJ476MM-T All power levels are calculated at 1% THD unless otherwise noted All values listed are for ceramic capacitors. The correction factor of 2 is included in the values. CLASS-D REQUIREMENTS DECOUPLING CAPACITORS The TPA2013D1 is a high-performance Class-D audio amplifier that requires adequate power supply decoupling to ensure the efficiency is high and total harmonic distortion (THD) is low. Place a low equivalent-series-resistance (ESR) ceramic capacitor, typically 1 μF as close as possible to the device VDD lead. This choice of capacitor and placement helps with higher frequency transients, spikes, or digital hash on the line. Additionally, placing this decoupling capacitor close to the TPA2013D1 is important for the efficiency of the Class-D amplifier, because any resistance or inductance in the trace between the device and the capacitor can cause a loss in efficiency. Place a capacitor of 10 μF or greater between the power supply and the boost inductor. The capacitor filters out high frequency noise. More importantly, it acts as a charge reservoir, providing energy more quickly than the board supply, thus helping to prevent any droop. INPUT CAPACITORS The TPA2013D1 does not require input coupling capacitors if the design uses a differential source that is biased within the common mode input range. Use input coupling capacitors if the input signal is not biased within the recommended common-mode input range, if high pass filtering is needed, or if using a single-ended source. The input capacitors and input resistors form a high-pass filter with the corner frequency, fc, determined in Equation 6. 1 fc = (2 ´ p ´ RICI ) (6) The value of the input capacitor is important to consider as it directly affects the bass (low frequency) performance of the circuit. Speakers in wireless phones cannot usually respond well to low frequencies, so the corner frequency can be set to block low frequencies in this application. Not using input capacitors can increase output offset. Use Equation 7 to find the required the input coupling capacitance. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TPA2013D1 17 TPA2013D1 www.ti.com SLOS520 – AUGUST 2007 CI = 1 (2 ´ p ´ fc ´ RI ) (7) Any mismatch in capacitance between the two inputs inputs will cause a mismatch in the corner frequencies. Choose capacitors with a tolerance of ±10% or better. FILTER FREE OPERATION AND FERRITE BEAD FILTERS A ferrite bead filter can often be used if the design is failing radiated emissions without an LC filter and the frequency sensitive circuit is greater than 1 MHz. This filter functions well for circuits that just have to pass FCC and CE because FCC and CE only test radiated emissions greater than 30 MHz. When choosing a ferrite bead, choose one with high impedance at high frequencies, and very low impedance at low frequencies. In addition, select a ferrite bead with adequate current rating to prevent distortion of the output signal. Use an LC output filter if there are low frequency (< 1 MHz) EMI sensitive circuits and/or there are long leads from amplifier to speaker. Figure 31 shows a typical ferrite bead output filters. Ferrite Chip Bead OUTP 1 nF Ferrite Chip Bead OUTN 1 nF Figure 31. Typical Ferrite Chip Bead Filter Suggested Chip Ferrite Bead Load Vendor Part Number Size 8Ω Murata BLM18EG121SN1 0603 4Ω TDK MPZ2012S101A 0805 OPERATION WITH DACs AND CODECs When using switching amplifiers with CODECs and DACs, sometimes there is an increase in the output noise floor from the audio amplifier. This occurs when mixing of the output frequencies of the CODEC/DAC with the switching frequencies of the audio amplifier input stage. The noise increase can be solved by placing a low-pass filter between the CODEC/DAC and audio amplifier. This filters off the high frequencies that cause the problem and allow proper performance. The TPA2013D1 has a two pole low pass filter at the inputs. The cutoff frequency of the filter is set to approximately 100kHz. The integrated low pass filter of the TPA2013D1 eliminates the need for additional external filtering components. A properly designed additional low pass filter may be added without altering the performance of the device. STEREO OPERATION APPLICATION Use the boost converter of the TPA2013D1 to supply the power for another audio amplifier when stereo operation is required. Ensure the gains of the amplifiers match each other. This prevents one channel from sounding louder than the other. Use Equation 1 through Equation 5 to determine R1, R2, boost inductor, and the boost capacitor values. Figure 32 is an example schematic. The TPA2032D1 is a good choice for this application; the gain is internally set to 2 V/V, the power supply is compatible with VCCOUT of the TPA2013D1, and the output power of the TPA2032D1 is on par with the TPA2013D1. 18 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TPA2013D1 TPA2013D1 www.ti.com SLOS520 – AUGUST 2007 R1 62.5 kΩ R2 500 kΩ 1 mF 47 mF 4.7 mH To Battery 22 mF VDD SW VCCFB VCCOUT VCCIN CIN Left Channel Input IN– 1 mF VOUT+ IN+ TPA2013D1 CIN VOUT– GAIN GPIO ShutDown Boost CI SDb ShutDown ClassD SDd VDD IN– AGND PGND Right Channel Input 1 mF VO+ TPA2032D1 VO– IN+ CI GND SHUTDOWN Figure 32. TPA2013D1 in Stereo With the TPA2032D1 LED DRIVER FOR DIGITAL STILL CAMERAS Use the boost converter of the TPA2013D1 as a power supply for the flash LED of a digital still camera. Use a microprocessor or other device or synchronize the flash to shutter sound that typically comes from the speaker of a digital still camera. Figure 33 shows a typical circuit for this application. LEDs, switches, and other components will vary by application. R1 50 kΩ R2 500 kΩ 1 mF 100 mF 6.2 mH LXCL-PWF3 To Battery CKG57NX5R1C107M 22 mF VDD SW VCCFB VCCOUT VCCIN 1W CIN IN– Differential Input 1 mF VOUT+ IN+ CIN Gain GPIO TPA2013D1 VOUT– GAIN ShutDown Boost SDb ShutDown ClassD SDd NDS355N GPIO AGND PGND Figure 33. LED Driver Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TPA2013D1 19 TPA2013D1 www.ti.com SLOS520 – AUGUST 2007 BYPASSING THE BOOST CONVERTER Bypass the boost converter to drive the Class-D amplifier directly from the battery. Place a Shottky diode between the SW pin and the VCCIN pin. Select a diode that has an average forward current rating of at least 1A, reverse breakdown voltage of 10 V or greater, and a forward voltage as small as possible. See Figure 34 for an example of a circuit designed to bypass the boost converter. Do not configure the circuit to bypass the boost converter if VDD is higher than VCC when the boost converter is enabled (SDb ≥ 1.3 V); VDD must be lower than VCC for proper operation. VDD may be set to any voltage within the recommended operating range when the boost converter is disabled (SDb ≤ 0.3V). Place a logic high on SDb to place the TPA2013D1 in boost mode. Place a logic low on SDb to place the TPA2013D1 in bypass mode. Toshiba CRS 06 Schottky Diode R1 50 kΩ R2 500 kΩ Toko 1098AS-4R7M To Battery 22 mF 1 mF 4.7 mH 22 mF VDD SW VCCFB VCCOUT VCCIN CIN IN– Left Channel Input 1 mF VOUT+ IN+ CIN TPA2013D1 VOUT– GAIN GND = Bypass VDD = Boost Mode SDb GPIO SDd AGND PGND Figure 34. Bypass Circuit EFFICIENCY AND THERMAL INFORMATION The maximum ambient temperature depends on the heat-sinking ability of the PCB system. The derating factors for the YZH and RGP packages are shown in the dissipation rating table. Apply the same principles to both packages. Using the YZH package, and converting this to θJA: 1 1 qJA = = = 80.64°C/W Derating Factor 0.0124 (8) Given θJA of 80.64°C/W, the maximum allowable junction temperature of 150°C, and the maximum internal dissipation of 0.317 W (VDD = 3.6 V, PO = 1.7 W), the maximum ambient temperature is calculated with the following equation: 20 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TPA2013D1 TPA2013D1 www.ti.com SLOS520 – AUGUST 2007 TA Max = TJMax - qJA PDmax = 150 - 80.64 (0.317) = 124°C (9) Equation 9 shows that the calculated maximum ambient temperature is 124°C at maximum power dissipation under the above conditions. The TPA2013D1 is designed with thermal protection that turns the device off when the junction temperature surpasses 150°C to prevent damage to the IC. Also, using speakers more resistive than 4-Ω dramatically increases the thermal performance by reducing the output current and increasing the efficiency of the amplifier. BOARD LAYOUT In making the pad size for the WCSP balls, use nonsolder mask defined (NSMD) land. With this method, the solder mask opening is made larger than the desired land area, and the opening size is defined by the copper pad width. Figure 35 and Table 5 show the appropriate diameters for a WCSP layout. Copper Trace Width Solder Pad Width Solder Mask Opening Solder Mask Thickness Copper Trace Thickness Figure 35. Land Pattern Dimensions Table 5. Land Pattern Dimensions SOLDER PAD DEFINITIONS COPPER PAD SOLDER MASK OPENING COPPER THICKNESS STENCIL OPENING STENCIL THICKNESS Nonsolder mask defined (NSMD) 275 μm (+0.0, –25 μm) 375 μm (+0.0, –25 μm) 1 oz max (32 μm) 275 μm x 275 μm Sq. (rounded corners) 125 μm thick NOTES: 1. Circuit traces from NSMD defined PWB lands should be 75 μm to 100 μm wide in the exposed area inside the solder mask opening. Wider trace widths reduce device stand off and impact reliability. 2. Recommend solder paste is Type 3 or Type 4. 3. Best reliability results are achieved when the PWB laminate glass transition temperature is above the operating the range of the intended application. 4. For a PWB using a Ni/Au surface finish, the gold thickness should be less 0.5 mm to avoid a reduction in thermal fatigue performance. 5. Solder mask thickness should be less than 20 μm on top of the copper circuit pattern. 6. Best solder stencil performance is achieved using laser cut stencils with electro polishing. Use of chemically etched stencils results in inferior solder paste volume control. 7. Trace routing away from WCSP device should be balanced in X and Y directions to avoid unintentional component movement due to solder wetting forces. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TPA2013D1 21 TPA2013D1 www.ti.com SLOS520 – AUGUST 2007 Trace Width Recommended trace width at the solder balls is 75 μm to 100 μm to prevent solder wicking onto wider PCB traces. For high current pins (SW, PGND, VOUT+, VOUT–, VCCIN, and VCCOUT) of the TPA2013D1, use 100 μm trace widths at the solder balls and at least 500 μm PCB traces to ensure proper performance and output power for the device. For low current pins (IN–, IN+, SDd, SDb, GAIN, VCCFB, VDD) of the TPA2013D1, use 75 μm to 100 μm trace widths at the solder balls. Run IN- and IN+ traces side-by-side to maximize common-mode noise cancellation. 22 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TPA2013D1 PACKAGE OPTION ADDENDUM www.ti.com 11-Oct-2007 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TPA2013D1RGPR ACTIVE QFN RGP 20 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR TPA2013D1YZHR ACTIVE DSBGA YZH 16 3000 Green (RoHS & no Sb/Br) Call TI Level-1-260C-UNLIM Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 1-Nov-2007 TAPE AND REEL BOX INFORMATION Device Package Pins Site Reel Diameter (mm) Reel Width (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TPA2013D1RGPR RGP 20 SITE 41 330 12 4.3 4.3 1.5 8 12 Q2 TPA2013D1YZHR YZH 16 SITE 3 178 8 2.35 2.35 0.81 4 8 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 1-Nov-2007 Device Package Pins Site Length (mm) Width (mm) Height (mm) TPA2013D1RGPR RGP 20 SITE 41 346.0 346.0 29.0 TPA2013D1YZHR YZH 16 SITE 3 217.0 193.0 35.0 Pack Materials-Page 2 X: Max = 2330 µm, Min = 2230 µm Y: Max = 2330 µm, Min = 2230 µm IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional restrictions. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in such safety-critical applications. TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use. TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated products in automotive applications, TI will not be responsible for any failure to meet such requirements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products Applications Amplifiers amplifier.ti.com Audio www.ti.com/audio Data Converters dataconverter.ti.com Automotive www.ti.com/automotive DSP dsp.ti.com Broadband www.ti.com/broadband Interface interface.ti.com Digital Control www.ti.com/digitalcontrol Logic logic.ti.com Military www.ti.com/military Power Mgmt power.ti.com Optical Networking www.ti.com/opticalnetwork Microcontrollers microcontroller.ti.com Security www.ti.com/security RFID www.ti-rfid.com Telephony www.ti.com/telephony Low Power Wireless www.ti.com/lpw Video & Imaging www.ti.com/video Wireless www.ti.com/wireless Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2007, Texas Instruments Incorporated