TPS795xx www.ti.com SLVS350G – OCTOBER 2002 – REVISED JULY 2006 ULTRALOW-NOISE, HIGH-PSRR, FAST, RF, 500-mA LOW-DROPOUT LINEAR REGULATORS FEATURES • • • • • • • 500-mA Low-Dropout Regulator With Enable Available in Fixed and Adjustable (1.2-V to 5.5-V) Versions High PSRR (50 dB at 10 kHz) Ultralow Noise (33 µVRMS, TPS79530) Fast Start-Up Time (50 µs) Stable With a 1-µF Ceramic Capacitor Excellent Load/Line Transient Response Very Low Dropout Voltage (110 mV at Full Load, TPS79530) 6-Pin SOT223 and 3 × 3 SON Packages The TPS795xx family of low-dropout (LDO), low-power linear voltage regulators features high power-supply rejection ratio (PSRR), ultralow noise, fast start-up, and excellent line and load transient responses in small outline, SOT223-6 and 3 x 3 SON packages. Each device in the family is stable with a small 1-µF ceramic capacitor on the output. The family uses an advanced, proprietary BiCMOS fabrication process to yield extremely low dropout voltages (for example, 110 mV at 500 mA). Each device achieves fast start-up times (approximately 50 µs with a 0.001-µF bypass capacitor) while consuming very low quiescent current (265 µA, typical). Moreover, when the device is placed in standby mode, the supply current is reduced to less than 1 µA. The TPS79530 exhibits approximately 33 µVRMS of output voltage noise at 3.0 V output with a 0.1-µF bypass capacitor. Applications with analog components that are noise-sensitive, such as portable RF electronics, benefit from the high-PSRR and low-noise features, as well as from the fast response time. APPLICATIONS • • • • • RF: VCOs, Receivers, ADCs Audio Bluetooth®, Wireless LAN Cellular and Cordless Telephones Handheld Organizers, PDAs DRB PACKAGE 3mm x 3mm SON (TOP VIEW) IN 2 DCQ PACKAGE OUT 3 OUT 4 SOT223-6 (TOP VIEW) EN IN GND OUT NR/FB 1 2 3 4 5 8 EN 7 NC 6 GND 5 NR/FB 6 GND TPS79530 OUTPUT SPECTRAL NOISE DENSITY vs FREQUENCY 80 0.5 VIN = 4 V COUT = 10 mF CNR = 0.01 mF 70 Ripple Rejection − dB IN 1 TPS79530 RIPPLE REJECTION vs FREQUENCY Output Spectral Noise Density − mV/ÖHz • • DESCRIPTION IOUT = 1 mA 60 50 40 IOUT = 500 mA 30 20 10 0 1 10 100 1 k 10 k 100 k 1 M Frequency (Hz) 10 M VIN = 5.5 V COUT = 2.2 mF CNR = 0.1 mF 0.4 0.3 IOUT = 1 mA 0.2 IOUT = 0.5 A 0.1 0 100 1k 10 k Frequency (Hz) 100 k Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Bluetooth is a registered trademark of Bluetooth SIG, Inc. All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2002–2006, Texas Instruments Incorporated TPS795xx www.ti.com SLVS350G – OCTOBER 2002 – REVISED JULY 2006 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION (1) VOUT (2) PRODUCT TPS795xxyyyz (1) (2) XX is nominal output voltage (for example, 28 = 2.8 V, 285 = 2.85 V, 01 = Adjustable). YYY is package designator. Z is package quantity. For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. Output voltages from 1.3 V to 5.0 V in 100 mV increments are available; minimum order quantities may apply. Contact factory for details and availability. ABSOLUTE MAXIMUM RATINGS over operating temperature (unless otherwise noted) (1) VALUE VIN range – 0.3 V to 6 V VEN range –0.3 V to VIN + 0.3 V VOUT range 6V Peak output current Internally limited ESD rating, HBM 2 kV ESD rating, CDM 500 V Continuous total power dissipation See Dissipation Rating Table Junction temperature range, TJ –40°C to +150°C Storage temperature range, Tstg –65°C to +150°C (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. DISSIPATION RATING TABLE (1) (2) 2 PACKAGE BOARD RθJC RθJA SOT223 Low K (1) 15°C/W 53°C/W 3 x 3 SON High-K (2) 1.2°C/W 40°C/W The JEDEC low-K (1s) board design used to derive this data was a 3-inch × 3-inch (7.5 cm × 7.5cm), two-layer board with 2-ounce copper traces on top of the board. The JEDEC high-K (2s2p) board design used to derive this data was a 3-inch × 3-inch (7,5-cm × 7,5-cm), multilayer board with 1-ounce internal power and ground planes and 2-ounce copper traces on top and bottom of the board. Submit Documentation Feedback TPS795xx www.ti.com SLVS350G – OCTOBER 2002 – REVISED JULY 2006 ELECTRICAL CHARACTERISTICS Over recommended operating temperature range (TJ = –40°C to +125°C), VEN = VIN, VIN = VOUT(nom) + 1 V (1), IOUT = 1 mA, COUT = 10 µF, CNR = 0.01 µF, unless otherwise noted. Typical values are at +25°C. PARAMETER TEST CONDITIONS Input voltage, VIN (1) 1.200 Continuous output current, IOUT Output voltage range Accuracy TPS79501 1.225 0.98(VOUT) 0 µA ≤ IOUT ≤ 500 mA, VOUT + 1 V ≤ VIN ≤ 5.5 V (1) –2.0 Fixed VOUT VOUT + 1 V ≤ VIN ≤ 5.5 V Load regulation (∆VOUT%/∆IOUT) 0 µA ≤ IOUT ≤ 500 mA, 1.250 500 1.225 TPS79501 (2) 0 µA ≤ IOUT ≤ 500 mA, VOUT + 1 V ≤ VIN ≤ 5.5 V (1) MAX 5.5 0 Output voltage line regulation (∆VOUT%/∆VIN) (1) Dropout voltage (3) VIN = VOUT(nom) - 0.1 V TYP 2.7 Internal reference, VFB (TPS79501) Output voltage MIN 5.5 – VDO VOUT 0.05 V V mA V 1.02(VOUT) V +2.0 % 0.12 %/V 3 mV TPS79530 IOUT = 500 mA 110 170 TPS79533 IOUT = 500 mA 105 160 mV Output current limit VOUT = 0 V 2.8 4.2 A Ground pin current 0 µA ≤ IOUT ≤ 500 mA 265 385 µA Shutdown current (4) VEN = 0 V, 2.7 V ≤ VIN ≤ 5.5 V 0.07 1 µA FB pin current VFB = 1.225 V 1 µA Power-supply ripple rejection TPS79530 2.4 UNIT f = 100 Hz, IOUT = 10 mA 59 f = 100 Hz, IOUT = 500 mA 58 f = 10 kHz, IOUT = 500 mA 50 f = 100 kHz, IOUT = 500 mA Output noise voltage (TPS79530) Time, start-up (TPS79530) BW = 100 Hz to 100 kHz, IOUT = 500 mA RL = 6 Ω, COUT = 1 µF 39 CNR = 0.001 µF 46 CNR = 0.0047 µF 41 CNR = 0.01 µF 35 CNR = 0.1 µF 33 CNR = 0.001 µF 50 CNR = 0.0047 µF µs 110 High-level enable input voltage 2.7 V ≤ VIN ≤ 5.5 V Low-level enable input voltage 2.7 V ≤ VIN ≤ 5.5 V EN pin current VEN = 0 V 1 UVLO threshold VCC rising 2.25 UVLO hysteresis µVRMS 75 CNR = 0.01 µF (1) (2) (3) (4) dB 1.7 VIN V 1 µA 2.65 100 V 0.7 V mV Minimum VIN is 2.7 V or VOUT + VDO, whichever is greater. Tolerance of external resistors not included in this specification. Dropout is not measured for the TPS79501 and TPS79525 since minimum VIN = 2.7 V. For adjustable version, this applies only after VIN is applied; then VEN transitions high to low. Submit Documentation Feedback 3 TPS795xx www.ti.com SLVS350G – OCTOBER 2002 – REVISED JULY 2006 FUNCTIONAL BLOCK DIAGRAM—ADJUSTABLE VERSION IN OUT 300Ω Current Sense UVLO Overshoot Detect GND ILIM SHUTDOWN R1 EN FB UVLO Thermal Shutdown R2 Quickstart Bandgap Reference 1.225 V VIN External to the Device VREF 250 kΩ FUNCTIONAL BLOCK DIAGRAM—FIXED VERSION IN OUT 300Ω Current Sense UVLO Overshoot Detect GND ILIM SHUTDOWN R1 EN UVLO Thermal Shutdown R2 R2 = 40 kΩ Quickstart VIN Bandgap Reference 1.225 V VREF NR 250 kΩ Table 1. Terminal Functions SOT223 (DCQ) PIN NO. 3x3 SON (DRB) PIN NO. 2 1, 2 3, 6 6 Regulator ground EN 1 8 Driving the enable pin (EN) high turns on the regulator. Driving this pin low puts the regulator into shutdown mode. EN can be connected to IN if not used. NR 5 5 Noise-reduction pin for fixed versions only. Connecting an external capacitor to this pin bypasses noise generated by the internal bandgap, which improves power-supply rejection and reduces output noise. (Not available on adjustable versions.) FB 5 5 Feedback input voltage for the adjustable device. (Not available on fixed voltage versions.) OUT 4 3, 4 NC – 7 NAME IN GND 4 DESCRIPTION Unregulated input to the device Regulator output. Not connected Submit Documentation Feedback TPS795xx www.ti.com SLVS350G – OCTOBER 2002 – REVISED JULY 2006 TYPICAL CHARACTERISTICS TPS79530 OUTPUT VOLTAGE vs OUTPUT CURRENT TPS79530 OUTPUT VOLTAGE vs JUNCTION TEMPERATURE TPS79530 GROUND CURRENT vs JUNCTION TEMPERATURE 3.005 3.02 276 VIN = 4 V COUT = 10 µF 3 3.01 272 IOUT = 1 mA 2.995 VIN = 4 V COUT = 10 µF 274 IOUT = 1 mA 3 IGND (µA) VOUT (V) VOUT (V) 270 2.99 IOUT = 0.5 A 2.985 2.98 2.99 0 0.1 0.2 0.3 IOUT (mA) 0.4 2.97 0.5 260 −40 −25 −10 5 20 35 50 65 80 95 110 125 TJ (°C) Figure 3. TPS79530 OUTPUT SPECTRAL NOISE DENSITY vs FREQUENCY TPS79530 OUTPUT SPECTRAL NOISE DENSITY vs FREQUENCY TPS79530 OUTPUT SPECTRAL NOISE DENSITY vs FREQUENCY 2.5 0.4 IOUT = 1 mA 0.2 IOUT = 0.5 A 1k 10 k Frequency (Hz) VIN = 5.5 V COUT = 10 µF CNR = 0.1 µF 0.5 0.4 IOUT = 1 mA 0.3 0.2 IOUT = 0.5 A 0.1 0 100 100 k Output Spectral Noise Density − µV//Hz 0.6 0.1 20 35 50 65 80 95 110 125 Figure 2. Output Spectral Noise Density − µV//Hz 1k 10 k 2 CNR = 0.001 µF VIN = 5.5 V IOUT = 500 mA COUT= 10 µF CNR = 0.0047 µF 1.5 CNR = 0.01 µF 1 CNR = 0.1 µF 0.5 0 100 100 k 1k 10 k Frequency (Hz) Frequency (Hz) Figure 4. Figure 5. Figure 6. TPS79530 ROOT MEAN SQUARED OUTPUT NOISE vs CNR TPS79530 DROPOUT VOLTAGE vs JUNCTION TEMPERATURE TPS79530 RIPPLE REJECTION vs FREQUENCY 50 150 40 VIN = 2.9 V COUT = 10 µF IOUT = 500 mA VDO (mV) 20 VIN = 4 V COUT = 10 µF CNR = 0.1 µF 70 125 30 100 k 80 175 IOUT = 500 mA COUT= 10 µF Ripple Rejection − dB Output Spectral Noise Density − µV//Hz −40 −25 −10 5 Figure 1. VIN = 5.5 V COUT = 2.2 µF CNR = 0.1 µF 0 100 RMS − Root Mean Squared Output Noise − µVRMS 262 TJ (°C) 0.5 0.3 IOUT = 0.5 A 266 264 2.975 2.98 268 100 75 50 IOUT = 1 mA 60 50 40 IOUT = 500 mA 30 20 10 25 10 BW = 100 Hz to 100 kHz 0 0.001 0.01 0.0047 CNR (µF) Figure 7. 0.1 0 −40 −25 −10 5 20 35 50 65 80 95 110 125 TJ (°C) Figure 8. Submit Documentation Feedback 0 1 10 100 1 k 10 k 100 k 1 M Frequency (Hz) 10 M Figure 9. 5 TPS795xx www.ti.com SLVS350G – OCTOBER 2002 – REVISED JULY 2006 TYPICAL CHARACTERISTICS (continued) TPS79530 RIPPLE REJECTION vs FREQUENCY TPS79530 RIPPLE REJECTION vs FREQUENCY Ripple Rejection − dB IOUT = 1 mA 60 50 40 IOUT = 500 mA 30 VIN = 4 V COUT = 2.2 µF CNR = 0.01 µF 70 IOUT = 1 mA 50 40 30 IOUT = 500 mA IOUT = 500 mA 10 10 0 0 100 1 k 10 k 100 k 1 M Frequency (Hz) 1 10 M 10 100 1 k 10 k 100 k 1 M Frequency (Hz) 0 10 M 1 1 k 10 k 100 k 1 M 10 M Frequency (Hz) Figure 12. TPS79530 START-UP TIME TPS79518 LINE TRANSIENT RESPONSE TPS79530 LINE TRANSIENT RESPONSE CNR = 0.01 µF Enable 1.75 20 30 10 20 VOUT (mV) CNR = 0.0047 µF 2 0 −10 10 0 −10 1.50 −20 1.25 1 COUT = 10 µF, CNR = 0.01 µF, IOUT = 0.5 A, dv/dt = 1 V/µs 0.25 0 0 100 200 300 400 −20 VIN (V) VIN = 4 V COUT = 10 µF IOUT = 0.5 A 0.50 VIN (V) 4 0.75 3 COUT = 10 µF, CNR = 0.01 µF, IOUT = 0.5 A, dv/dt = 1 V/µs 5 4 3 2 500 600 0 50 100 150 200 0 50 t (µs) t (µs) 100 t (µs) 150 Figure 13. Figure 14. Figure 15. TPS79530 LOAD TRANSIENT RESPONSE TPS79525 POWER UP/POWER DOWN TPS79530 DROPOUT VOLTAGE vs OUTPUT CURRENT 60 4.5 40 4 20 3.5 160 −20 −40 COUT = 10 µF, CNR = 0.01 µF, VL = 3.8 V, dv/dt = 0.5 A/µs 140 VIN TJ = 25°C 2 1.5 100 80 60 VOUT 1 0.5 40 0 0 20 −0.5 −0.5 0.5 200 400 600 t (µs) Figure 16. 800 1000 TJ = 125°C 120 2.5 VDO (mV) VOUT (V) 0 200 180 VOUT = 2.5 V, RL = 10 Ω 3 0 100 Figure 11. 2.25 −60 10 Figure 10. CNR = 0.001 µF 2.50 DVOUT (mV) 30 10 3 IOUT (A) 40 20 2.75 6 50 20 10 IOUT = 1 mA 60 20 1 VIN = 4 V COUT = 2.2 µF CNR = 0.1 µF 70 60 VOUT (mV) Ripple Rejection − dB 70 VIN (V) 80 80 VIN = 4 V COUT = 10 µF CNR = 0.01 µF Ripple Rejection − dB 80 TPS79530 RIPPLE REJECTION vs FREQUENCY 0 400 800 1200 1600 2000 TJ = −40°C 0 Time (µs) 200 300 IOUT (mA) Figure 17. Figure 18. Submit Documentation Feedback 0 100 400 500 TPS795xx www.ti.com SLVS350G – OCTOBER 2002 – REVISED JULY 2006 TYPICAL CHARACTERISTICS (continued) TPS79530 TYPICAL REGIONS OF STABILITY EQUIVALENT SERIES RESISTANCE (ESR) vs OUTPUT CURRENT TPS79501 DROPOUT VOLTAGE vs INPUT VOLTAGE 100 200 100 COUT = 1 µF COUT = 10 µF, CNR = 0.01 µF, IOUT = 50 mA 150 COUT = 2.2 µF Region of Instability 10 50 1 Region of Stability 0.1 TJ = −40°C 2.5 3 3.5 4 VIN (V) 4.5 0 5 100 200 300 IOUT (mA) Figure 19. 1 Region of Stability 0.1 0.01 0 400 Region of Instability 10 ESR (W) ESR (W) TJ = 25°C 500 0.01 1 10 100 1000 IOUT (mA) Figure 20. Figure 21. TPS79530 TYPICAL REGIONS OF STABILITY EQUIVALENT SERIES RESISTANCE (ESR) vs OUTPUT CURRENT 100 COUT = 10 µF 10 ESR (W) VDO (mV) TJ = 125°C 100 TPS79530 TYPICAL REGIONS OF STABILITY EQUIVALENT SERIES RESISTANCE (ESR) vs OUTPUT CURRENT Region of Instability 1 Region of Stability 0.1 0.01 0 100 200 300 400 500 IOUT (A) Figure 22. Submit Documentation Feedback 7 TPS795xx www.ti.com SLVS350G – OCTOBER 2002 – REVISED JULY 2006 APPLICATION INFORMATION The TPS795xx family of low-dropout (LDO) regulators has been optimized for use in noise-sensitive equipment. The device features extremely low dropout voltages, high PSRR, ultralow output noise, low quiescent current (265 µA typically), and an enable input to reduce supply currents to less than 1 µA when the regulator is turned off. A typical application circuit is shown in Figure 23. VIN IN VOUT OUT TPS795xx 1m F EN GND 1m F NR 0.01mF Figure 23. Typical Application Circuit EXTERNAL CAPACITOR REQUIREMENTS Although not required, it is good analog design practice to place a 0.1µF — 2.2µF capacitor near the input of the regulator to counteract reactive input sources. A higher-value input capacitor may be necessary if large, fast-rise-time load transients are anticipated and the device is located several inches from the power source. Like most low-dropout regulators, the TPS795xx requires an output capacitor connected between OUT and GND to stabilize the internal control loop. The minimum recommended capacitor is 1 µF. Any 1 µF or larger ceramic capacitor is suitable. The internal voltage reference is a key source of noise in an LDO regulator. The TPS795xx has an NR pin which is connected to the voltage reference through a 250-kΩ internal resistor. The 250-kΩ internal resistor, in conjunction with an external bypass capacitor connected to the NR pin, creates a low-pass filter to reduce the voltage reference noise and, therefore, the noise at the regulator output. In order for the regulator to operate properly, the current flow out of the NR pin must be at a minimum, 8 because any leakage current creates an IR drop across the internal resistor, thus creating an output error. Therefore, the bypass capacitor must have minimal leakage current. The bypass capacitor should be no more than 0.1-µF in order to ensure that it is fully charged during the quickstart time provided by the internal switch shown in the Functional Block Diagram. For example, the TPS79530 exhibits only 33 µVRMS of output voltage noise using a 0.1-µF ceramic bypass capacitor and a 10-µF ceramic output capacitor. Note that the output starts up slower as the bypass capacitance increases because of the RC time constant at the bypass pin that is created by the internal 250-kΩ resistor and external capacitor. BOARD LAYOUT RECOMMENDATION TO IMPROVE PSRR AND NOISE PERFORMANCE To improve ac measurements such as PSRR, output noise, and transient response, it is recommended that the board be designed with separate ground planes for VIN and VOUT, with each ground plane connected only at the ground pin of the device. In addition, the ground connection for the bypass capacitor should connect directly to the ground pin of the device. REGULATOR MOUNTING The tab of the SOT223-6 package is electrically connected to ground. For best thermal performance, the tab of the surface-mount version should be soldered directly to a circuit-board copper area. Increasing the copper area improves heat dissipation. Solder pad footprint recommendations for the devices are presented in Application Report SBFA015, Solder Pad Recommendations for Surface-Mount Devices, available from the TI web site (www.ti.com). Submit Documentation Feedback TPS795xx www.ti.com SLVS350G – OCTOBER 2002 – REVISED JULY 2006 PROGRAMMING THE TPS79501 ADJUSTABLE LDO REGULATOR The approximate value of this capacitor can be calculated as Equation 3: (3 10 *7) (R 1 ) R 2) C1 + (R 1 R 2) (3) The output voltage of the TPS79501 adjustable regulator is programmed using an external resistor divider as shown in Figure 24. The output voltage is calculated using Equation 1: V OUT + VREF ǒ1 ) RR Ǔ The suggested value of this capacitor for several resistor ratios is shown in the table within Figure 24. If this capacitor is not used (such as in a unity-gain configuration), then the minimum recommended output capacitor is 2.2 µF instead of 1 µF. 1 2 (1) where: • VREF = 1.2246 V typ (the internal reference voltage) REGULATOR PROTECTION The TPS795xx PMOS-pass transistor has a built-in back diode that conducts reverse current when the input voltage drops below the output voltage (for example, during power down). Current is conducted from the output to the input and is not internally limited. If extended reverse voltage operation is anticipated, external limiting might be appropriate. Resistors R1 and R2 should be chosen for approximately 40-µA divider current. Lower value resistors can be used for improved noise performance, but the device wastes more power. Higher values should be avoided, as leakage current at FB increases the output voltage error. The TPS795xx features internal current limiting and thermal protection. During normal operation, the TPS795xx limits output current to approximately 2.8 A. When current limiting engages, the output voltage scales back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure, care should be taken not to exceed the power dissipation ratings of the package. If the temperature of the device exceeds approximately 165°C, thermal-protection circuitry shuts it down. Once the device has cooled down to below approximately 140°C, regulator operation resumes. The recommended design procedure is to choose R2 = 30.1 kΩ to set the divider current at 40 µA, C1 = 15 pF for stability, and then calculate R1 using Equation 2: VOUT R1 + *1 R2 VREF ǒ Ǔ (2) In order to improve the stability of the adjustable version, it is suggested that a small compensation capacitor be placed between OUT and FB. VIN IN 1m F EN OUT TPS79501 GND OUTPUT VOLTAGE PROGRAMMING GUIDE VOUT R1 FB C1 1m F OUTPUT VOLTAGE R1 1.8 V 3.6 V R2 R2 C1 14.0 kW 30.1 kW 33 pF 57.9 kW 30.1 kW 15 pF Figure 24. TPS79501 Adjustable LDO Regulator Programming Submit Documentation Feedback 9 TPS795xx www.ti.com SLVS350G – OCTOBER 2002 – REVISED JULY 2006 THERMAL INFORMATION The amount of heat that an LDO linear regulator generates is directly proportional to the amount of power it dissipates during operation. All integrated circuits have a maximum allowable junction temperature (TJmax) above which normal operation is not assured. A system designer must design the operating environment so that the operating junction temperature (TJ) does not exceed the maximum junction temperature (TJmax). The two main environmental variables that a designer can use to improve thermal performance are air flow and external heatsinks. The purpose of this information is to aid the designer in determining the proper operating environment for a linear regulator that is operating at a specific power level. In general, the maximum expected power (PDmax) consumed by a linear regulator is computed as shown in Equation 4: P D max + ǒVIN(avg) * VOUT(avg)Ǔ I OUT(avg) ) V I(avg) IQ (4) where: • VIN(avg) is the average input voltage • VOUT(avg) is the average output voltage • IOUT(avg) is the average output current • IQ is the quiescent current For most TI LDO regulators, the quiescent current is insignificant compared to the average output current; therefore, the term VIN(avg) x IQ can be neglected. The operating junction temperature is computed by adding the ambient temperature (TA) and the increase in temperature due to the regulator's power dissipation. The temperature rise is computed by multiplying the maximum expected power dissipation by the sum of the thermal resistances between the junction and the case (RΘJC), the case to heatsink (RΘCS), and the heatsink to ambient (RΘSA). Thermal resistances are measures of how effectively an object dissipates heat. Typically, the larger the device, the more surface area available for power dissipation and the lower the object's thermal resistance. Figure 25 illustrates these thermal resistances for a SOT223 package mounted in a JEDEC low-K board. 10 A TJ RθJC CIRCUIT BOARD COPPER AREA C B B TC RθCS A C RθSA SOT223 Package TA Figure 25. Thermal Resistances Equation 5 summarizes the computation: ǒRθJC ) RθCS ) RθSAǓ T J + T A ) PD max (5) The RΘJC is specific to each regulator as determined by its package, lead frame, and die size provided in the regulator's data sheet. The RΘSA is a function of the type and size of heatsink. For example, black body radiator type heatsinks can have RΘCS values ranging from 5°C/W for very large heatsinks to 50°C/W for very small heatsinks. The RΘCS is a function of how the package is attached to the heatsink. For example, if a thermal compound is used to attach a heatsink to a SOT223 package, RΘCS of 1°C/W is reasonable. Even if no external black body radiator type heatsink is attached to the package, the board on which the regulator is mounted provides some heatsinking through the pin solder connections. Some packages, like the DDPAK and SOT223 packages, use a copper plane underneath the package or the circuit board ground plane for additional heatsinking to improve their thermal performance. Computer-aided thermal modeling can be used to compute very accurate approximations of an integrated circuit's thermal performance in different operating environments (for example, different types of circuit boards, different types and sizes of heatsinks, different air flows, etc.). Using these models, the three thermal resistances can be combined into one thermal resistance between junction and ambient (RΘJA). This RΘJA is valid only for the specific operating environment used in the computer model. Submit Documentation Feedback TPS795xx www.ti.com SLVS350G – OCTOBER 2002 – REVISED JULY 2006 Equation 5 simplifies into Equation 6: T J + T A ) PD max RθJA (6) Rearranging Equation 6 gives Equation 7: T * TA R θJA + J PD max (7) Using Equation 6 and the computer model generated curves shown in Figure 26, a designer can quickly compute the required heatsink thermal resistance/board area for a given ambient temperature, power dissipation, and operating environment. To illustrate, the TPS79525 in a SOT223 package was chosen. For this example, the average input voltage is 3.3 V, the output voltage is 2.5 V, the average output current is 1 A, the ambient temperature 55°C, no air flow is present, and the operating environment is the same as documented below. Neglecting the quiescent current, the maximum average power is Equation 8: P D max + (3.3 * 2.5)V 1A + 800mW (8) Substituting TJmax for TJ into Equation 4 gives Equation 9: R θJA max + (125 * 55)°Cń800mW + 87.5°CńW (9) From Figure 26, RθJA vs PCB Copper Area, the ground plane needs to be 0.55 in2 for the part to dissipate 800 mW. The operating environment used to construct Figure 26 consisted of a board with 1 oz. copper planes. The package is soldered to a 1 oz. copper pad on the top of the board. The pad is tied through thermal vias to the 1 oz. ground plane. No Air Flow 160 140 120 100 80 From the data in Figure 26 and rearranging equation 6, the maximum power dissipation for a different ground plane area and a specific ambient temperature can be computed, as shown in Figure 27. 60 40 20 0 0.1 1 PCB Copper Area (in2) 10 Figure 26. SOT223 Thermal Resistance vs PCB Copper Area SOT223 POWER DISSIPATION The SOT223 package provides an effective means of managing power dissipation in surface-mount applications. The SOT223 package dimensions are provided in the Mechanical Data section at the end of the data sheet. The addition of a copper plane directly underneath the SOT223 package enhances the thermal performance of the package. PD − Maximum Power Dissipation (W) RθJA − Thermal Resistance (°C/W) 180 6 TA = 25°C 5 4 4 in2 PCB Area 3 0.5 in2 PCB Area 2 1 0 0 25 50 75 100 125 150 TA − Ambient Temperature (°C) Figure 27. SOT223 Maximum Power Dissipation vs Ambient Temperature Submit Documentation Feedback 11 PACKAGE OPTION ADDENDUM www.ti.com 8-Oct-2007 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TPS79501DCQ ACTIVE SOT-223 DCQ 6 78 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS79501DCQG4 ACTIVE SOT-223 DCQ 6 78 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS79501DCQR ACTIVE SOT-223 DCQ 6 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS79501DCQRG4 ACTIVE SOT-223 DCQ 6 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS79501DRBR ACTIVE SON DRB 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS79501DRBRG4 ACTIVE SON DRB 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS79501DRBT ACTIVE SON DRB 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS79501DRBTG4 ACTIVE SON DRB 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS79516DCQ ACTIVE SOT-223 DCQ 6 78 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS79516DCQG4 ACTIVE SOT-223 DCQ 6 78 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS79516DCQR ACTIVE SOT-223 DCQ 6 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS79516DCQRG4 ACTIVE SOT-223 DCQ 6 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS79518DCQ ACTIVE SOT-223 DCQ 6 78 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS79518DCQG4 ACTIVE SOT-223 DCQ 6 78 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS79518DCQR ACTIVE SOT-223 DCQ 6 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS79518DCQRG4 ACTIVE SOT-223 DCQ 6 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS79525DCQ ACTIVE SOT-223 DCQ 6 78 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS79525DCQG4 ACTIVE SOT-223 DCQ 6 78 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS79525DCQR ACTIVE SOT-223 DCQ 6 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS79525DCQRG4 ACTIVE SOT-223 DCQ 6 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS79530DCQ ACTIVE SOT-223 DCQ 6 78 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS79530DCQG4 ACTIVE SOT-223 DCQ 6 78 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS79530DCQR ACTIVE SOT-223 DCQ 6 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS79530DCQRG4 ACTIVE SOT-223 DCQ 6 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS79533DCQ ACTIVE SOT-223 DCQ 6 CU NIPDAU Level-2-260C-1 YEAR 78 Addendum-Page 1 Green (RoHS & no Sb/Br) Lead/Ball Finish MSL Peak Temp (3) PACKAGE OPTION ADDENDUM www.ti.com 8-Oct-2007 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TPS79533DCQG4 ACTIVE SOT-223 DCQ 6 TPS79533DCQR ACTIVE SOT-223 DCQ TPS79533DCQRG4 ACTIVE SOT-223 DCQ 78 Lead/Ball Finish MSL Peak Temp (3) Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR 6 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR 6 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 17-Apr-2009 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel Diameter Width (mm) W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) TPS79501DCQR SOT-223 DCQ 6 2500 330.0 TPS79501DRBR SON DRB 8 3000 TPS79501DRBT SON DRB 8 250 TPS79516DCQR SOT-223 DCQ 6 TPS79518DCQR SOT-223 DCQ TPS79525DCQR SOT-223 TPS79530DCQR SOT-223 TPS79533DCQR SOT-223 12.4 6.8 7.3 1.88 8.0 12.0 Q3 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 2500 330.0 12.4 6.8 7.3 1.88 8.0 12.0 Q3 6 2500 330.0 12.4 6.8 7.3 1.88 8.0 12.0 Q3 DCQ 6 2500 330.0 12.4 6.8 7.3 1.88 8.0 12.0 Q3 DCQ 6 2500 330.0 12.4 6.8 7.3 1.88 8.0 12.0 Q3 DCQ 6 2500 330.0 12.4 6.8 7.3 1.88 8.0 12.0 Q3 Pack Materials-Page 1 W Pin1 (mm) Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 17-Apr-2009 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS79501DCQR SOT-223 DCQ 6 2500 358.0 335.0 35.0 TPS79501DRBR SON DRB 8 3000 346.0 346.0 29.0 TPS79501DRBT SON DRB 8 250 190.5 212.7 31.8 TPS79516DCQR SOT-223 DCQ 6 2500 358.0 335.0 35.0 TPS79518DCQR SOT-223 DCQ 6 2500 358.0 335.0 35.0 TPS79525DCQR SOT-223 DCQ 6 2500 358.0 335.0 35.0 TPS79530DCQR SOT-223 DCQ 6 2500 358.0 335.0 35.0 TPS79533DCQR SOT-223 DCQ 6 2500 358.0 335.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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