INTEGRATED CIRCUITS DATA SHEET TSA5523M 1.4 GHz I2C-bus controlled multimedia synthesizer Product specification File under Integrated Circuits, IC02 1996 Dec 17 Philips Semiconductors Product specification 1.4 GHz I2C-bus controlled multimedia synthesizer TSA5523M FEATURES • Complete 1.4 GHz single-chip system • Adaptive DC/DC converter driver output • On-board tuning amplifier output • Varicap drive disable • Four NPN open-collector output ports (10 mA) An output is provided to control a Philips mixer/oscillator IC controlled by bits P7, P5 and P4. Depending on the reference divider ratio (512, 640 or 1024), the phase comparator operates at 3.90625, 6.25 or 7.8125 kHz with a 4 MHz crystal. • Four bus-controlled bidirectional ports (NPN open-collector outputs) • In-lock detector • 5-step Analog-to-Digital Converter (ADC) The lock detector bit FL is set to logic 1 when the loop is locked and is read on the SDA line (status byte) during a read operation. The ADC is available for digital AFC control. The ADC code is read during a read operation on the I2C-bus. The ADC input is combined with the port P6. In the test mode, this port is also used as a test output for fref and fdiv/2 (see Table 4). In addition, the circuit includes a DC/DC converter driver connected to the IDC pin to control the amplitude of an external oscillator followed by a voltage rectifier. • Mixer/Oscillator (M/O) band-switch output • 15-bit programmable divider • Programmable reference divider ratio (512, 640 or 1024) • Programmable charge-pump current (50 or 250 µA) • I2C-bus format – Address plus four data bytes transmission (write mode) – Address plus one status byte transmission (read mode) The voltage rectifier is used to generate the correct tuning supply voltage to maintain a constant current into the tuning amplifier. The DC/DC converter driver can be disabled by setting the IDC pin to VCC1 in this event the tuning supply voltage is delivered by a fixed 33 V supply. – Four independent addresses • Low power, low radiation. Five serial bytes (including address byte) are required to address the device, select the VCO frequency, program the ports, set the charge-pump current and set the reference divider ratio. The device has four independent I2C-bus addresses which can be selected by applying a specific voltage on the AS input (see Table 3). GENERAL DESCRIPTION The device is a single chip PLL frequency synthesizer designed for TV and VCR tuning systems. The circuit consists of a divide-by-eight prescaler with its own preamplifier, a 15-bit programmable divider, a crystal oscillator and its programmable reference divider, a phase/frequency detector combined with a charge-pump which drives the tuning amplifier, including 33 V output. Three NPN open-collector outputs are provided for band switching together with five open-collector NPN outputs. Four of these ports can also be used as input ports (one ADC and three general purpose I/O ports). APPLICATIONS • Multimedia TV tuners and front-ends • VCR tuners. ORDERING INFORMATION PACKAGE TYPE NUMBER NAME TSA5523M/C1 SSOP20 1996 Dec 17 DESCRIPTION plastic shrink small outline package; 20 leads; body width 4.4 mm 2 VERSION SOT266-1 Philips Semiconductors Product specification 1.4 GHz I2C-bus controlled multimedia synthesizer TSA5523M QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VCC1 supply voltage 4.5 − 5.5 V ICC1 supply current − 22 30 mA fRF RF frequency range 64 − 1400 MHz ViRF RF input voltage level 80 to 150 MHz −25 − +3 dBm 150 MHz to 1 GHz −28 − +3 dBm 1 to 1.4 GHz −26 − +3 dBm fXTAL crystal oscillator frequency − 4 − MHz INPN NPN open-collector output current − 10 15 mA Tamb operating ambient temperature −20 − +85 °C Tstg IC storage temperature −40 − +150 °C 1996 Dec 17 3 1996 Dec 17 4 AS SDA 2 3 4 1 18 19 ADC RSA 14 13 12 11 15 5 8-BIT PORTS REGISTER 15-BIT FREQUENCY REGISTER 6 7 TSA5523M 15-BIT PROGRAMMABLE DIVIDER Fig.1 Block diagram. GATE fref fdiv BAND SWITCH T2, T1, T0 7-BIT CONTROL REGISTER RSA, RSB LOCK IN-LOCK DETECTOR T2, T1, T0 DIGITAL PHASE COMPARATOR CP CHARGE BUMP OS LOGIC AMP DC/DC DRIVER MGG747 17 16 20 9 10 8 BS GND VCC1 Vtune CP IDC 1.4 GHz I2C-bus controlled multimedia synthesizer P3 P2 P1 P0 P6 P4 P5 P7 RSB DIVIDER 512/640/1024 COMPARATORS I2C-BUS TRANSCEIVER POWER-ON RESET XTAL OSCOLLATOR PRESCALER DIVIDE-BY-8 handbook, full pagewidth SCL XTAL RF2 RF1 Philips Semiconductors Product specification TSA5523M BLOCK DIAGRAM Philips Semiconductors Product specification 1.4 GHz I2C-bus controlled multimedia synthesizer TSA5523M PINNING SYMBOL PIN DESCRIPTION XTAL 1 crystal oscillator input AS 2 address selection input SDA 3 serial data input/output SCL 4 serial clock input P4 5 Port 4 NPN open-collector band-switch output P5 6 Port 5 NPN open-collector band-switch output P7 7 Port 7 NPN open-collector band-switch output IDC 8 DC/DC converter control I/O terminal Vtune 9 tuning voltage output CP 10 NPN open-collector I/O port P0 11 Port 0 NPN open-collector I/O port P1 12 Port 1 NPN open-collector I/O port P2 13 Port 2 NPN open-collector I/O port P3 14 Port 3 NPN open-collector output P6 15 Port 6 NPN open-collector output/ADC input GND 16 ground BS 17 band-switch output to mixer/oscillator driver RF2 18 RF signal input 2 RF1 19 RF signal input 1 VCC1 20 supply voltage (+5 V) 1996 Dec 17 handbook, halfpage 20 VCC1 XTAL 1 AS 2 19 RF1 SDA 3 18 RF2 SCL 4 17 BS 16 GND P4 5 TSA5523M P5 6 15 P6 P7 7 14 P3 IDC 8 13 P2 Vtune 9 12 P1 CP 10 11 P0 MGG746 Fig.2 Pin configuration. 5 Philips Semiconductors Product specification 1.4 GHz I2C-bus controlled multimedia synthesizer TSA5523M The first bit of the first data byte transmitted indicates whether frequency data (first bit = 0) or control and ports data (first bit = 1) will follow. Until an I2C-bus STOP condition is sent by the controller, additional data bytes can be entered without the need to re-address the device. The frequency register is loaded after the 8th clock pulse of the second Divider Byte (DB2), the control register is loaded after the 8th clock pulse of the control byte and the ports register is loaded after the 8th clock pulse of the Ports Byte (PB). FUNCTIONAL DESCRIPTION I2C-bus. The device is controlled via the two-wire For programming, there is one module address (7 bits) and the R/W bit for selecting the read or the write mode. Write mode: R/W = 0 (see Table 1) After the address transmission (first byte), data bytes can be sent to the device. Four data bytes are needed to fully program the device. The bus transceiver has an auto-increment facility which permits the programming of the device within one single transmission (address + 4 data bytes). I2C-bus address selection The module address contains programmable address bits (MA1 and MA0) which offer the possibility of having several synthesizers (up to 4) in one system by applying a specific voltage to the AS input. The relationship between MA1 and MA0 and the input voltage on the AS input is given in Table 2. The device can also be partially programmed providing that the first data byte following the address is Divider Byte 1 (DB1) or Control Byte (CB). The meaning of the bits in the data bytes is given in Table 1. I2C-bus data format Table 1 DATA BYTES MSB LSB ACK Address Byte (ADR) 1 1 0 0 0 MA1 MA0 0 A(1) Divider Byte 1 (DB1) 0 N14 N13 N12 N11 N10 N9 N8 A(1) Divider Byte 2 (DB2) N7 N6 N5 N4 N3 N2 N1 N0 A(1) 1 CP T2 T1 T0 RSA RSB OS A(1) P7 P6 P5 P4 P3 P2 P1 P0 A(1) Control Byte (CB) Ports Byte (PB) Note 1. A = Acknowledge. Table 2 Explanation to Table 1 SYMBOL DESCRIPTION MA1 and MA0 programmable address bits (see Table 3) N14 to N0 programmable divider bits N = N14 × 214 + 213 + ... + N1 × 2 + N0 CP charge-pump current CP = 0 50 µA CP = 1 250 µA T2, T1 and T0 test bits; normal operation; T2 = 0, T1 = 0, T0 = 1 (see Table 4) RSA and RSB reference divider ratio select bits (see Table 5) OS tuning amplifier control bit OS = 0 normal operation; tuning voltage is ON OS = 1 tuning voltage is OFF (high impedance), IDC output voltage is LOW P7 to P0 NPN open-collector control bits Pn = 0 output n is OFF Pn = 1 output n is ON 1996 Dec 17 6 Philips Semiconductors Product specification 1.4 GHz I2C-bus controlled multimedia synthesizer Table 3 TSA5523M Address selection INPUT VOLTAGE APPLIED TO PIN AS MA1 MA0 0 V to 0.1VCC1 0 0 open-circuit or 0.2VCC1 to 0.3VCC1 0 1 0.4VCC1 to 0.6VCC1 1 0 0.9VCC1 to VCC1 1 1 Table 4 Test bits Read mode: R/W = 1 (see Table 7) T2 T1 T0 0 0 1 normal mode 0 1 X charge-pump is OFF 1 1 0 charge-pump is sinking current 1 1 1 charge-pump is sourcing current 1 0 0 fref is available on P6 output 1 0 1 fdiv/2 is available on P6 output Table 5 End of transmission will occur if no master acknowledge occurs. The device will then release the data line to allow the processor to generate a STOP condition. When Ports P0 to P2 are used as inputs, the corresponding bits must be logic 0 (high-impedance state). The Power-On Reset flag (POR) is set to logic 1 at power-on. It is reset when an end-of-data is detected by the device (end of a read sequence). Control of the loop is made possible with the in-lock flag FL (FL = 1) which indicates when the loop is locked. The bits I2, I1 and I0 represent the status of the I/O Ports P2, P1 and P0 respectively. Ratio select bits RSA RSB REFERENCE DIVIDER X 0 640 0 1 1024 1 1 512 Table 6 Data can be read out of the device by setting the R/W bit to logic 1. After the slave address has been recognized, the device generates an acknowledge pulse and the first data byte (status byte) is transferred on the SDA line (MSB first). Data is valid on the SDA line during a HIGH level of the SCL clock signal. A second data byte can be read out of the device if the processor generates an acknowledge on the SDA line (master acknowledge). DEVICE OPERATION Band-switch output levels P7 P5 P4 OUTPUT VOLTAGE ON PIN BS 1 1 0 0.25 V PHILIPS M/O IC’s BAND band A 1 0 1 0.4VCC1 band B 0 1 1 0.8VCC1 band C 1 1 1 VCC1 band C VCC1 band C all other codes 1996 Dec 17 A logic 0 indicates a LOW level and a logic 1 indicates a HIGH level (see threshold level in the “Characteristics”). A built-in ADC is available on pin P6. This converter can be used to feed AFC information to the controller from the IF section of the television. The relationship between bits A2, A1 and A0 is given in Table 9. At power-on, the device is reset as follows: all ports are set to the high-impedance state, except P4, P5 and P7 which are set to logic 1. The tuning amplifier is in the high-impedance state (OS = 1). The POR level is fixed to 3 × VBE (2.1 V typ.). If VCC1 goes below the POR level the circuit is reset. 7 Philips Semiconductors Product specification 1.4 GHz I2C-bus controlled multimedia synthesizer Table 7 TSA5523M Read data format BYTE MSB (1) Address Byte (ADB) Status Byte (SB) LSB ACK 1 1 0 0 0 MA1 MA0 1 A(2) POR FL I2 I1 I0 A2 A1 A0 − Notes 1. MSB is transmitted first. 2. A: Acknowledge. Table 8 Explanation to Table 7 SYMBOL DESCRIPTION POR power-on reset flag (POR = 1 at power-on) FL in-lock flag (FL = 1 when the loop is phase-locked) I2, I1 and I0 digital levels for I/O ports P2, P1 and P0 respectively A2, A1 and A0 digital outputs of the 5-level ADC Table 9 Analog-to-digital converter levels; note 1 VOLTAGE APPLIED ON PORT P6 A2 A1 A0 0.6VCC1 to VCC1 1 0 0 0.45VCC1 to 0.6VCC1 0 1 1 0.3VCC1 to 0.45VCC1 0 1 0 0.15VCC1 to 0.3VCC1 0 0 1 0 to 0.15VCC1 0 0 0 Note 1. Accuracy is 0.03VCC1. 1996 Dec 17 8 Philips Semiconductors Product specification 1.4 GHz I2C-bus controlled multimedia synthesizer TSA5523M LIMITING VALUES In according with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT ViRF prescaler input voltage −0.3 VCC1 V VCC1 supply voltage (+5 V) −0.3 +6 V VoIDC IDC output voltage −0.3 VCC1 V VoNPN NPN open-collector output voltage −0.3 +16 V IoNPN NPN open-collector output current −1 +15 mA VoCP charge-pump output voltage −0.3 VCC1 V Vo(tune) tuning voltage output −0.3 +40 V see Fig.3 VoBS band-switch output voltage −0.3 VCC1 V ViSCL serial clock input voltage −0.3 +6 V Vi/oSDA serial data input/output voltage −0.3 +6 V IoSDA data output current −1 +5 mA ViAS address selection input voltage −0.3 VCC1 V ViXTAL crystal input voltage −0.3 VCC1 V Tstg IC storage temperature −40 +150 °C Tj(max) maximum junction temperature − +150 °C tsc short-circuit time every pin to VCC1 or GND − 10 s MGG751 3 handbook, halfpage Imax (mA) 2 1 0 0 20 40 60 80 Vtune (V) Fig.3 Rating power on Vtune output pin. 1996 Dec 17 9 Philips Semiconductors Product specification 1.4 GHz I2C-bus controlled multimedia synthesizer TSA5523M HANDLING Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling bipolar devices. Every pin withstands the ESD test in accordance with “MIL-STD-883C category B” (2000 V). Every pin withstands the EDS test in accordance with Philips Semiconductors Machine Model 0 Ω, 200 pF (200 V). THERMAL CHARACTERISTICS SYMBOL Rth j-a PARAMETER VALUE UNIT 120 K/W MAX. UNIT thermal resistance from junction to ambient in free air CHARACTERISTICS VCC1 = 4.5 to 5.5 V; Tamb = −20 to +85 °C; see note 1; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. General 4.5 − VCC1 supply voltage ICC1 supply current VCC1 = 5 V − 22 30 mA VPORth power-on reset threshold voltage Tamb = 25 °C slope is −6 mV/°C 1.5 2.0 − V Tamb operating ambient temperature −20 − +85 °C fiRF RF input frequency 64 − 1400 MHz N divider ratio 256 − 32767 − 15-bit frequency word 5.5 V XTAL oscillator fXTAL frequency range RXTAL = 25 to 200 Ω 3.2 4.0 4.48 MHz ZXTAL input impedance f = 4 MHz 600 1200 − Ω DLXTAL(p-p) drive level on pin XTAL (peak-to-peak value) series capacitor = 18 pF; crystal Philips 4333 1430 4881 − 110 − mV input level VCC1 = 4.5 to 5.5 V; Tamb = −20 to +85 °C; see Fig.4 Prescaler VRFin ZiRF 1996 Dec 17 input impedance f = 80 to 150 MHz −25 − +3 dBm f = 150 to 1000 MHz −28 − +3 dBm f = 1000 to 1400 MHz −26 − +3 dBm − − − see Fig.5 10 Philips Semiconductors Product specification 1.4 GHz I2C-bus controlled multimedia synthesizer SYMBOL PARAMETER TSA5523M CONDITIONS MIN. TYP. MAX. UNIT NPN open-collector outputs P7 to P0; note 2 ILI VcesatN leakage current VCC1 = 5.5 V; Vo = 13.5 V − − 10 µA leakage current P4, P5, P7 VCC1 = 5.5 V; Vo = 1.5 V − − 1 µA output saturation voltage on Ports P4, P5 and P7 Isink = 100 µA − − 0.2 V Isink = 10 mA − 0.2 0.4 V Isink = 2 mA − 0.2 0.3 V allowed capacitive loading on VPn = 5.5 V output pins − − 10 nF output saturation voltage CPn Input ports P2, P1 and P0; note 3 VIL LOW level input voltage − − 1.5 V VIH HIGH level input voltage 3 − − V IIL LOW level input current Vi = 0 V −10 − − µA IIH HIGH level input current VCC1 = 5.5 V; Vo = 13.5 V − − 10 µA AS input (Address Selection) IIH HIGH level input current VIH = VCC1 − − 50 µA IIL LOW level input current VIL = 0 V −50 − − µA SCL and SDA inputs VIL LOW level input voltage − − 1.5 V VIH HIGH level input voltage 3.0 − 5.5 V IIH HIGH level input current VIH = 5.5 V; VCC1 = 0 V − − 10 µA VIH = 5.5 V; VCC1 = 5.5 V − − 10 µA IIL LOW level input current VIL = 0 V; VCC1 = 5.5 V −10 − − µA fCLK clock frequency − 100 400 kHz SDA output (I2C-bus mode) ILI leakage current VSDA = 5.5 V − − 10 µA VoSDA output voltage Isink = 3 mA − − 0.4 V BS output (mixer/oscillator IC band selection) VoBSA output voltage for band A IL = 20 µA − 0.25 0.5 V VoBSB output voltage for band B IL = 20 µA 0.36VCC1 0.4VCC1 0.43VCC1 V VoBSC output voltage for band C IL = 20 µA 0.7VCC1 0.8VCC1 0.9VCC1 V IL = 50 µA 3.1 − − V VCC1 − 0.5 − VCC1 V IDC output VIDCoff voltage to switch-off DC/DC converter driver IoIDC IDC output current Rext = 100 kΩ −10 − +100 µA Gt transfer gain I9 = 100 µA − 1000 − µA/V 1996 Dec 17 11 Philips Semiconductors Product specification 1.4 GHz I2C-bus controlled multimedia synthesizer SYMBOL PARAMETER TSA5523M CONDITIONS MIN. TYP. MAX. UNIT Charge-pump output CP IIH HIGH level input current (absolute value) CP = 1 − 250 − µA IIL LOW level input current (absolute value) CP = 0 − 50 − µA VoCP output voltage in-lock; Tamb = 25 °C − 1.95 − V ILIos off-state leakage current T2 = 0; T1 = 1 −5 +1 +15 nA Tuning voltage output; Vtune I9(off) leakage current when switched-off OS = 1; Vtune = 33 V − − 10 µA Vo9 output voltage when the loop is closed OS = 0; T2 = 0; T1 = 0; T0 = 1; RL = 27 kΩ; Vtune = 33 V 0.3 − 32.7 V Ibias tuning amplifier bias current DC/DC converter loop is active 70 100 130 µA Vripple(p-p) acceptable ripple voltage on VCC1 (peak-to-peak value) fripple = 20 Hz to 500 kHz; note 4 − − 30 mV Notes 1. When a port is active, the collector voltage must not exceed 6 V. 2. All other ports are switched ON with 10 mA during test. 3. When a port is used as input port, the corresponding bit must be programmed to the high-impedance state. 4. FM deviation is 2 kHz (max). MGG752 12 Ptot handbook, halfpage (dBm) 0 −12 −24 −36 −48 0 0.5 1.0 f (GHz) 1.5 Fig.4 Prescaler typical input sensitivity curve (pin 2). 1996 Dec 17 12 Philips Semiconductors Product specification 1.4 GHz I2C-bus controlled multimedia synthesizer TSA5523M 1 handbook, full pagewidth 0.5 2 0.2 5 10 +j 0 0.2 0.5 1 2 5 ∞ 10 −j 100 MHz 10 500 MHz 0.2 5 1 GHz 1.3 GHz 2 0.5 MGG753 1 Fig.5 Prescaler Smith chart (S11) of typical input impedance (ZL = 50 Ω; pin 2). APPLICATION INFORMATION Crystal oscillator Tuning amplifier The crystal oscillator uses a 4.0 MHz crystal in series with an 18 pF capacitor. The crystal operates in the series resonance mode. The connection to VCC1 is preferred, but it can also be connected to GND. The tuning amplifier is able to drive the varicap voltage without an external transistor. The Vtune output must be connected to an external load of 27 kΩ connected to the tuning voltage supply. Figures 6 and 7 illustrate a possible loop filter. The component values depend on the oscillator characteristics and the selected reference frequency. 1996 Dec 17 13 Philips Semiconductors Product specification 1.4 GHz I2C-bus controlled multimedia synthesizer handbook, full pagewidth TSA5523M 27 kΩ Vtune 10 nF 2.2 nF P0 P0 P1 P1 P2 P2 P3 P3 P6 P6 GND BS BS 1 nF RF 1 nF RF RF2 RF1 VCC1 +5 V 11 10 12 9 13 8 14 7 15 6 TSA5523M 16 5 17 4 18 3 19 2 20 1 100 nF CP 22 kΩ Vtune 10 nF 27 kΩ 33 nF IDC BAV99 P7 UHF P5 220 pF VHFH P4 4.7 nF VHFL SCL SCL SDA 1 mH 2 nF SDA AS AS 1 mH 56 Ω XTAL 33 nF 200 kΩ 10 nF BC847 10 nF 18 pF MGG749 4 MHz Fig.6 Typical application with DC/DC converter. handbook, full pagewidth 27 kΩ Vtune 10 nF 2.2 nF P0 P0 P1 P1 P2 P2 P3 P3 P6 P6 GND BS BS RF RF 1 nF RF2 1 nF RF1 VCC1 +5 V 11 10 12 9 13 8 14 7 15 6 TSA5523M 16 5 17 4 18 3 19 2 20 1 CP 100 nF 27 kΩ Vtune IDC +5 V P7 UHF P5 VHFH P4 VHFL SCL SCL SDA SDA AS AS XTAL 10 nF 18 pF 4 MHz MGG750 Fig.7 Standard application. 1996 Dec 17 14 +33 V +5 V Philips Semiconductors Product specification 1.4 GHz I2C-bus controlled multimedia synthesizer handbook, full pagewidth TSA5523M VCC1 20 3 kΩ XTAL 1 VCC1 VCC1 AS VCC1 2 to prescaler 1 kΩ 19 RF1 Vref VCC1 AS 18 VCC SDA 1 kΩ 3 VCC1 VCC1 TSA5523M VCC SCL P4 4 5 P5 17 BS 1 kΩ VCC1 16 VCC1 6 RF2 VCC1 15 VCC1 GND P6 ×4 VCC1 P7 7 VCC1 14 P3 VCC1 VCC1 IDC VCC1 13 P2 8 VCC1 Vtune 9 VCC1 VCC1 12 P1 CONTROL VCC1 VCC1 VCC1 DOWN 11 P0 10 CP UP MGG748 Fig.8 Input/output pin schematic. 1996 Dec 17 15 Philips Semiconductors Product specification 1.4 GHz I2C-bus controlled multimedia synthesizer TSA5523M PACKAGE OUTLINE SSOP20: plastic shrink small outline package; 20 leads; body width 4.4 mm D SOT266-1 E A X c y HE v M A Z 11 20 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 10 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 1.5 0.15 0 1.4 1.2 0.25 0.32 0.20 0.20 0.13 6.6 6.4 4.5 4.3 0.65 6.6 6.2 1.0 0.75 0.45 0.65 0.45 0.2 0.13 0.1 0.48 0.18 10 0o Note 1. Plastic or metal protrusions of 0.20 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 90-04-05 95-02-25 SOT266-1 1996 Dec 17 EUROPEAN PROJECTION 16 o Philips Semiconductors Product specification 1.4 GHz I2C-bus controlled multimedia synthesizer If wave soldering cannot be avoided, the following conditions must be observed: SOLDERING Introduction • A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. • The longitudinal axis of the package footprint must be parallel to the solder flow and must incorporate solder thieves at the downstream end. Even with these conditions, only consider wave soldering SSOP packages that have a body width of 4.4 mm, that is SSOP16 (SOT369-1) or SSOP20 (SOT266-1). This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “IC Package Databook” (order code 9398 652 90011). During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Reflow soldering Reflow soldering techniques are suitable for all SSOP packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 °C within 6 seconds. Typical dwell time is 4 seconds at 250 °C. Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Repairing soldered joints Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 °C. Wave soldering Wave soldering is not recommended for SSOP packages. This is because of the likelihood of solder bridging due to closely-spaced leads and the possibility of incomplete solder penetration in multi-lead devices. 1996 Dec 17 TSA5523M 17 Philips Semiconductors Product specification 1.4 GHz I2C-bus controlled multimedia synthesizer TSA5523M DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. PURCHASE OF PHILIPS I2C COMPONENTS Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011. 1996 Dec 17 18 Philips Semiconductors Product specification 1.4 GHz I2C-bus controlled multimedia synthesizer NOTES 1996 Dec 17 19 TSA5523M Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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No. 5, 80640 GÜLTEPE/ISTANBUL, Tel. +90 212 279 2770, Fax. +90 212 282 6707 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 625 344, Fax.+381 11 635 777 For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 Internet: http://www.semiconductors.philips.com © Philips Electronics N.V. 1996 SCA52 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 537021/1200/01/pp20 Date of release: 1996 Dec 17 Document order number: 9397 750 01313