INTEGRATED CIRCUITS DATA SHEET TDA6402; TDA6402A; TDA6403; TDA6403A 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners Product specification Supersedes data of 1998 Jul 28 File under Integrated Circuits, IC02 2000 Jan 24 Philips Semiconductors Product specification 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners TDA6402; TDA6402A; TDA6403; TDA6403A FEATURES • Single-chip 5 V mixer/oscillator and synthesizer for cable TV and VCR tuners • Synthesizer function compatible with existing TSA5526 • Universal bus protocol (I2C-bus or 3-wire bus) – Bus protocol for 18 or 19-bit transmission (3-wire bus) APPLICATIONS – Extra protocol for 27-bit transmission (test modes and features for 3-wire bus) • Cable tuners for TV and VCR (switched concept for VHF) – Address + 4 data bytes transmission (I2C-bus ‘write’ mode) • Recommended RF bands for the USA: 55.25 to 133.25 MHz, 139.25 to 361.25 MHz and 367.25 to 801.25 MHz. – Address + 1 status byte (I2C-bus ‘read’ mode) – 4 independent I2C-bus addresses. • 1 PNP buffer for UHF band selection (25 mA) GENERAL DESCRIPTION • 3 PNP buffers for general purpose, e.g. 2 VHF sub-bands, FM sound trap (25 mA) The TDA6402, TDA6402A, TDA6403 and TDA6403A are programmable 2-band mixers/oscillators and synthesizers intended for VHF/UHF cable tuners (see Fig.1). • 33 V tuning voltage output • In-lock detector • 5-step A/D converter (3 bits in I2C-bus The devices include two double balanced mixers and two oscillators for the VHF and UHF band respectively, an IF amplifier and a PLL synthesizer. The VHF band can be split-up into two sub-bands using a proper oscillator application and a switchable inductor. Two pins are available between the mixer output and the IF amplifier input to enable IF filtering for improved signal handling. Four PNP ports are provided. Band selection is provided by using pin PUHF. When PUHF is ‘ON’, the UHF mixer-oscillator is active and the VHF band is switched off. When PUHF is ‘OFF’, the VHF mixer-oscillator is active and the UHF band is ‘OFF’. PVHFL and PVHFH are used to select the VHF sub-bands. FMST is a general purpose port, that can be used to switch an FM sound trap. When it is used, the sum of the collector currents has to be limited to 30 mA. mode) • 15-bit programmable divider • Programmable reference divider ratio (512, 640 or 1024) • Programmable charge pump current (60 or 280 µA) • Programmable automatic charge pump current switch • Varicap drive disable • Mixer/oscillator function compatible with existing TDA5732 • Balanced mixer with a common emitter input for VHF (single input) • Balanced mixer with a common base input for UHF (balanced input) The synthesizer consists of a divide-by-eight prescaler, a 15-bit programmable divider, a crystal oscillator and its programmable reference divider and a phase/frequency detector combined with a charge pump which drives the tuning amplifier, including 33 V output (V33) at pin VT. • 2-pin common emitter oscillator for VHF • 4-pin common emitter oscillator for UHF • IF preamplifier with asymmetrical 75 Ω output impedance to drive a low-ohmic impedance (75 Ω) • Low power Depending on the reference divider ratio (512, 640 or 1024), the phase comparator operates at 7.8125 kHz, 6.25 kHz or 3.90625 kHz with a 4 MHz crystal. • Low radiation • Small size • The TDA6402A and TDA6403A differ from the TDA6402 and TDA6403 by the UHF port protocol in the I2C-bus mode (see Tables 3 and 4). 2000 Jan 24 2 Philips Semiconductors Product specification 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners The device can be controlled according to the I2C-bus format or 3-wire bus format depending on the voltage applied to pin SW (see Table 2). In the 3-wire bus mode (SW = HIGH), pin LOCK/ADC is the LOCK output. The LOCK output is LOW when the PLL loop is locked. In the I2C-bus mode (SW = LOW), the lock detector bit FL is set to logic 1 when the loop is locked and is read on the SDA line (Status Byte; SB) during a READ operation in I2C-bus mode only. The Analog-to-Digital Converter (ADC) input is available on pin LOCK/ADC for digital AFC control in the I2C-bus mode only. The ADC code is read during a READ operation on the I2C-bus (see Table 11). In test mode, pin LOCK/ADC is used as a TEST output for fREF and 1⁄2fDIV, in both I2C-bus mode and 3-wire bus mode (see Table 7). I2C-bus mode (SW = GND) Five serial bytes (including address byte) are required to address the device, select the VCO frequency, program the four ports, set the charge pump current and set the reference divider ratio. The device has four independent I2C-bus addresses which can be selected by applying a specific voltage on input CE (see Table 6). 3-wire bus mode (SW = OPEN or VCC) Data is transmitted to the devices during a HIGH-level on input CE (enable line). The device is compatible with 18-bit and 19-bit data formats, as shown in Figs 4 and 5. The first four bits are used to program the PNP ports and the remaining bits control the programmable divider. A 27-bit data format may also be used to set the charge pump current, the reference divider ratio and for test purposes (see Fig.6). When the automatic charge pump current switch mode is activated and when the loop is phase-locked, the charge pump current value is automatically switched to LOW. This action is taken to improve the carrier-to-noise ratio. The status of this feature can be read in the ACPS flag during a READ operation on the I2C-bus (see Table 9). Table 1 TDA6402; TDA6402A; TDA6403; TDA6403A It is not allowed to address the devices with words whose length is different from 18, 19 or 27 bits. Data word length for 3-wire bus TYPE NUMBER DATA WORD REFERENCE DIVIDER(1) FREQUENCY STEP TDA6402; TDA6402A; TDA6403; TDA6403A 18-bit 512 62.50 kHz TDA6402; TDA6402A; TDA6403; TDA6403A 19-bit 1024 31.25 kHz TDA6402; TDA6402A; TDA6403; TDA6403A 27-bit programmable programmable Note 1. The selection of the reference divider is given by an automatic identification of the data word length. When the 27-bit format is used, the reference divider is controlled by RSA and RSB bits (see Table 8). More details are given in Chapter “PLL functional description”, Section “3-wire bus mode (SW = OPEN or VCC)”. 2000 Jan 24 3 Philips Semiconductors Product specification 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners TDA6402; TDA6402A; TDA6403; TDA6403A QUICK REFERENCE DATA Measured over full voltage and temperature ranges; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VCC supply voltage operating 4.5 5 5.5 V ICC supply current all PNP ports are ‘OFF’ − 71 − mA fXTAL crystal oscillator input frequency 3.2 4.0 4.48 MHz Io(PNP) PNP port output current note 1 − − 30 mA Ptot total power dissipation note 2 − − 490 mW Tstg IC storage temperature −40 − +150 °C Tamb ambient temperature fRF RF frequency GV voltage gain NF noise figure Vo output voltage causing 1% cross modulation in channel −20 − +85 °C VHF band 55.25 − 361.25 MHz UHF band 367.25 − 801.25 MHz VHF band − 19 − dB UHF band − 29 − dB VHF band − 8.5 − dB UHF band − 9 − dB VHF band − 108 − dBµV UHF band − 108 − dBµV Notes 1. One buffer ‘ON’, Io = 25 mA; two buffers ‘ON’, maximum sum of Io = 30 mA. 2 2. The power dissipation is calculated as follows: P tot 1 V33 --2 = V CC × ( I CC – I o ) + V CE(sat PNP) × I o + ----------------------22 kΩ ORDERING INFORMATION PACKAGE TYPE NUMBER NAME DESCRIPTION VERSION TDA6402M; TDA6402AM SSOP28 plastic shrink small outline package; 28 leads; body width 5.3 mm SOT341-1 TDA6403M; TDA6403AM SSOP28 plastic shrink small outline package; 28 leads; body width 5.3 mm SOT341-1 2000 Jan 24 4 Philips Semiconductors Product specification 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners TDA6402; TDA6402A; TDA6403; TDA6403A BLOCK DIAGRAM VCC IFFIL1 IFFIL2 handbook, full pagewidth 5 (24) 6 (23) 19 (10) (5) 24 VHFIN 3 (26) BS RFGND VHF OSCILLATOR VHF MIXER RF INPUT VHF (6) 23 TDA6402 TDA6402A TDA6403 TDA6403A 4 (25) (7) 22 BS BS IF PREAMPLIFIER (9) 20 (1) 28 UHFIN1 UHFIN2 1 (28) (2) 27 RF INPUT UHF 2 (27) UHF MIXER BS UHF OSCILLATOR (4) 25 BS BS (3) 26 (13) 16 XTAL 18 (11) XTAL OSCILLATOR 4 MHz PRESCALER DIVIDE BY 512, 640, 1024 RSA (12) 17 PHASE COMPARATOR RSB 15-BIT PROGRAMMABLE DIVIDER PRESCALER DIVIDE BY 8 fREF CHARGE PUMP VHFOSCOC VHFOSCIB OSCGND IFOUT UHFOSCIB2 UHFOSCOC2 UHFOSCOC1 UHFOSCIB1 CP VT OPAMP fDIV OS T0, T1, T2 CP IN LOCK DETECTOR POWER-DOWN DETECTOR FL CL DA SW 14 (15) 13 (16) 11 (18) 15-BIT FREQUENCY REGISTER SCL SDA CP I2C / 3-WIRE BUS TRANSCEIVER SW CE/AS FL CE/AS CONTROL REGISTER FL T2 fREF 1/2fDIV T0 RSA RSB OS PORT REGISTER 12 (17) UHF 3-BIT A/D CONVERTER T1 VHFH VHFL FMST GATE BS (8) 21 T0, T1, T2 15 (14) 9 (20) 8 (21) 7 (22) 10 (19) MGE692 PVHFH LOCK/ADC PUHF The pin numbers in parenthesis represent the TDA6403 and TDA6403A. Fig.1 Block diagram. 2000 Jan 24 5 FMST PVHFL GND Philips Semiconductors Product specification 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners TDA6402; TDA6402A; TDA6403; TDA6403A PINNING PIN SYMBOL UHFIN1 TDA6402; TDA6402A TDA6403; TDA6403A 1 28 DESCRIPTION UHF RF input 1 UHFIN2 2 27 UHF RF input 2 VHFIN 3 26 VHF RF input RFGND 4 25 RF ground IFFIL1 5 24 IF filter output 1 IFFIL2 6 23 IF filter output 2 PVHFL 7 22 PNP port output, general purpose (e.g. VHF low sub-band) PVHFH 8 21 PNP port output, general purpose (e.g. VHF high sub-band) PUHF 9 20 PNP port output, UHF band FMST 10 19 PNP port output, general purpose (e.g. FM sound trap) SW 11 18 bus mode selection input (I2C-bus/3-wire bus) CE/AS 12 17 Chip Enable/Address Selection input DA 13 16 serial data input/output CL 14 15 serial clock input LOCK/ADC 15 14 lock detector output (3-wire bus)/ADC input (I2C-bus) CP 16 13 charge pump output VT 17 12 tuning voltage output XTAL 18 11 crystal oscillator input VCC 19 10 supply voltage IFOUT 20 9 IF output GND 21 8 digital ground VHFOSCIB 22 7 VHF oscillator input base OSCGND 23 6 oscillator ground VHFOSCOC 24 5 VHF oscillator output collector UHFOSCIB1 25 4 UHF oscillator input base 1 UHFOSCOC1 26 3 UHF oscillator output collector 1 UHFOSCOC2 27 2 UHF oscillator output collector 2 UHFOSCIB2 28 1 UHF oscillator input base 2 2000 Jan 24 6 Philips Semiconductors Product specification 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners handbook, halfpage TDA6402; TDA6402A; TDA6403; TDA6403A handbook, halfpage UHFIN1 1 28 UHFOSCIB2 UHFOSCIB2 1 28 UHFIN1 UHFIN2 2 27 UHFOSCOC2 UHFOSCOC2 2 27 UHFIN2 VHFIN 3 26 UHFOSCOC1 UHFOSCOC1 3 26 VHFIN RFGND 4 25 UHFOSCIB1 UHFOSCIB1 4 25 RFGND IFFIL1 5 24 VHFOSCOC VHFOSCOC 5 24 IFFIL1 IFFIL2 6 23 OSCGND OSCGND 6 23 IFFIL2 PVHFL 7 VHFOSCIB 7 PVHFH 8 GND 8 PUHF 9 IFOUT 9 20 PUHF 19 VCC VCC 10 19 FMST 18 XTAL XTAL 11 VHFOSCIB TDA6402 22 TDA6402A 21 GND 20 IFOUT FMST 10 SW 11 17 VT VT 12 17 CE/AS DA 13 16 CP CP 13 16 DA CL 14 15 LOCK/ADC LOCK/ADC 14 15 CL MGE691 Pin configuration for TDA6402 and TDA6402A. Fig.3 PLL FUNCTIONAL DESCRIPTION Pin configuration for TDA6403 and TDA6403A. and clock inputs respectively. A LOW-level on SW input enables the I2C-bus; the CE/AS, DA and CL inputs are used as address selection (AS), SDA and SCL input respectively (see Table 2). The device is controlled via the I2C-bus or the 3-wire bus, depending on the voltage applied on the SW input. A HIGH-level on the SW input enables the 3-wire bus; CE/AS, DA and CL inputs are used as enable (CE), data Table 2 18 SW CE/AS 12 MGE690 Fig.2 22 PVHFL TDA6403 TDA6403A 21 PVHFH Bus mode selection PIN SYMBOL 3-WIRE BUS MODE I2C-BUS MODE TDA6402; TDA6402A TDA6403; TDA6403A SW 11 18 HIGH-level or OPEN LOW-level or GND CE/AS 12 17 enable input address selection input DA 13 16 data input serial data input CL 14 15 clock input serial clock input LOCK/ADC 15 14 LOCK/TEST output ADC input/TEST output 2000 Jan 24 7 Philips Semiconductors Product specification 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners controller, additional data bytes can be entered without the need to re-address the device. The frequency register is loaded after the 8th clock pulse of the second divider byte (DB2), the control register is loaded after the 8th clock pulse of the control byte (CB) and the band-switch register is loaded after the 8th clock pulse of the band switch byte (BB). I2C-bus mode (SW = GND) WRITE MODE; R/W = 0 (see Tables 3 and 4) Data bytes can be sent to the device after the address transmission (first byte). Four data bytes are needed to fully program the device. The bus transceiver has an auto-increment facility which permits the programming of the device within one single transmission (address + 4 data bytes). I2C-BUS ADDRESS SELECTION The device can also be partially programmed providing that the first data byte following the address is divider byte 1 (DB1) or control byte (CB). The bits in the data bytes are defined in Tables 3 and 4. The first bit of the first data byte transmitted indicates whether frequency data (first bit = 0) or control and band-switch data (first bit = 1) will follow. Until an I2C-bus STOP command is sent by the Table 3 TDA6402; TDA6402A; TDA6403; TDA6403A The module address contains programmable address bits (MA1 and MA0) which offer the possibility of having several synthesizers (up to 4) in one system by applying a specific voltage on the CE input. The relationship between MA1 and MA0 and the input voltage applied to the CE input is given in Table 6. I2C-bus data format, ‘write’ mode for the TDA6402 and TDA6403 BITS NAME BYTE ACK MSB LSB Address byte ADB 1 1 0 0 0 MA1 MA0 R/W = 0 A Divider byte 1 DB1 0 N14 N13 N12 N11 N10 N9 N8 A Divider byte 2 DB2 N7 N6 N5 N4 N3 N2 N1 N0 A Control byte CB 1 CP T2 T1 T0 RSA RSB OS A Band-switch byte BB X X X X FMST PUHF PVHFH PVHFL A Table 4 I2C-bus data format, ‘write’ mode for the TDA6402A and TDA6403A BITS NAME BYTE ACK MSB LSB Address byte ADB 1 1 0 0 0 MA1 MA0 R/W = 0 A Divider byte 1 DB1 0 N14 N13 N12 N11 N10 N9 N8 A Divider byte 2 DB2 N7 N6 N5 N4 N3 N2 N1 N0 A Control byte CB 1 CP T2 T1 T0 RSA RSB OS A Band-switch byte BB X X X X PUHF FMST PVHFH PVHFL A 2000 Jan 24 8 Philips Semiconductors Product specification 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners Table 5 TDA6402; TDA6402A; TDA6403; TDA6403A Description of symbols used in Tables 3 and 4 SYMBOL DESCRIPTION A acknowledge MA1, MA0 programmable address bits (see Table 6) N14 to N0 programmable divider bits; N = N14 × 214 + N13 × 213 + ... + N1 × 21 + N0 CP charge pump current: CP = 0 = 60 µA CP = 1 = 280 µA (default) T2, T1,T0 test bits (see Table 7) RSA, RSB reference divider ratio select bits (see Table 8) OS tuning amplifier control bit: OS = 0; normal operation; tuning voltage is ‘ON’ (default) OS = 1; tuning voltage is ‘OFF’ (high-impedance) PVHFL, PVHFH, PUHF, FMST PNP ports control bits: bit = 0; buffer n is ‘OFF’ (default) bit = 1; buffer n is ‘ON’ X don’t care Address selection (I2C-bus mode) Table 6 MA1 MA0 0 0 0 V to 0.1 × VCC 0 1 open or 0.2 × VCC to 0.3 × VCC 1 0 0.4 × VCC to 0.6 × VCC 1 1 0.9 × VCC to 1.0 × VCC Table 7 VOLTAGE APPLIED ON CE INPUT (SW = GND) Test modes T2 T1 T0 TEST MODES 0 0 0 automatic charge pump switched off 0 0 1 automatic charge pump switched on (note 1) 0 1 X charge pump is ‘OFF’ 1 1 0 charge pump is sinking current 1 1 1 charge pump is sourcing current 1 0 0 1 0 1 fREF is available on pin LOCK/ADC (note 2) 1⁄ f 2 DIV is available on pin LOCK/ADC (note 2) Notes 1. This is the default mode at power-on reset. 2. The ADC input cannot be used when these test modes are active; see Section “Read mode; R/W = 1 (see Table 9)” for more information. 2000 Jan 24 9 Philips Semiconductors Product specification 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners Table 8 TDA6402; TDA6402A; TDA6403; TDA6403A Reference divider ratio select bits RSA RSB REFERENCE DIVIDER RATIO FREQUENCY STEP (kHz) X(1) 0 640 6.25 0 1 1024 3.90625 1 1 512 7.8125 Note 1. X = don’t care. READ MODE; R/W = 1 (see Table 9) READ sequence). Control of the loop is made possible with the in-lock flag FL which indicates when the loop is locked (FL = 1). Data can be read from the device by setting the R/W bit to logic 1. After the slave address has been recognized, the device generates an acknowledge pulse and the first data byte (status byte) is transferred on the SDA line (MSB first). Data is valid on the SDA line during a HIGH-level of the SCL clock signal. A second data byte can be read from the device if the microcontroller generates an acknowledge on the SDA line (master acknowledge). End of transmission will occur if no master acknowledge occurs. The device will then release the data line to allow the microcontroller to generate a STOP condition. The POR flag is set to logic 1 at power-on. The flag is reset when an end-of-data is detected by the device (end of a Table 9 The automatic charge pump switch flag (ACPS) is LOW when the automatic charge pump switch mode is ‘ON’ and the loop is locked. In other conditions, ACPS = 1. When ACPS = 0, the charge pump current is forced to the LOW value. A built-in ADC is available on LOCK/ADC pin (I2C-bus mode only). This converter can be used to apply AFC information to the microcontroller from the IF section of the television. The relationship between the bits A2, A1 and A0 is given in Table 11. Read data format BITS NAME Address byte Status byte BYTE ACK MSB(1) LSB ADB 1 1 0 0 0 MA1 MA0 R/W = 1 A SB POR FL ACPS 1 1 A2 A1 A0 − Note 1. MSB is transmitted first. Table 10 Description of symbols used in Table 9 SYMBOL DESCRIPTION A acknowledge POR power-on reset flag (POR = 1 at power-on) FL in-lock flag (FL = 1 when the loop is locked) ACPS automatic charge pump switch flag: ACPS = 0; active ACPS = 1; not active A2, A1, A0 2000 Jan 24 digital outputs of the 5-level ADC 10 Philips Semiconductors Product specification 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners TDA6402; TDA6402A; TDA6403; TDA6403A Table 11 A to D converter levels (note 1) A2 A1 A0 VOLTAGE APPLIED ON ADC INPUT 1 0 0 0.60 × VCC to 1.00 × VCC 0 1 1 0.45 × VCC to 0.60 × VCC 0 1 0 0.30 × VCC to 0.45 × VCC 0 0 1 0.15 × VCC to 0.30 × VCC 0 0 0 0 to 0.15 × VCC Note 1. Accuracy is ±0.03 × VCC. POWER-ON RESET Table 12 Default bits at power-on reset BITS NAME BYTE MSB LSB Address byte ADB 1 1 0 0 0 MA1 MA0 X Divider byte 1 DB1 0 X X X X X X X Divider byte 2 DB2 X X X X X X X X Control byte CB 1 1 0 0 1 X 1 1 Band switch byte BB X X X X 0 0 0 0 The power-on detection threshold voltage VPOR is set to VCC = 2 V at room temperature. Below this threshold, the device is reset to the power-on state. bits are loaded into the frequency register at the HIGH-to-LOW transition of the chip enable line when an 18-bit or 19-bit data word is transmitted (see Figs 4 and 5). At power-on state, the charge pump current is set to 280 µA, the tuning voltage output is disabled, the test bits T2, T1 and T0 are set to ‘001’ (automatic charge pump switch ‘ON’) and RSB is set to logic 1. When a 27-bit data word is transmitted, the frequency bits are loaded into the frequency register on the 20th rising edge of the clock pulse and the control bits at the HIGH-to-LOW transition of the chip enable line (see Fig.6). In this mode, the reference divider is given by the RSA and RSB bits (see Table 8). The test bits T2, T1 and T0, the charge pump bit CP, the ratio select bit RSB and the OS bit can only be selected or changed with a 27-bit transmission. They remain programmed if an 18-bit or 19-bit transmission occurs. Only RSA is controlled by the transmission length when the 18-bit or 19-bit format is used. When an 18-bit data word is transmitted, the most significant bit of the divider N14 is internally set to logic 0 and the RSA bit is set to logic 1. When a 19-bit data word is transmitted, the RSA bit is set to logic 0. PUHF is ‘OFF’, which means that the UHF oscillator and the UHF mixer are switched off. Consequently, the VHF oscillator and the VHF mixer are switched on. PVHFL and PVHFH are ‘OFF’, which means that the VHF tank circuit is working in the VHF I sub-band. The tuning amplifier is switched off until the first transmission. In that case, the tank circuit in VHF I is supplied with the maximum tuning voltage. The oscillator is therefore working at the end of the VHF I sub-band. 3-wire bus mode (SW = OPEN or VCC) A data word of less than 18 bits will not affect the frequency register of the device. The definition of the bits is unchanged compared to I2C-bus mode. During a HIGH-level on the CE input (enable line), the data is clocked into the data register at the HIGH-to-LOW transition of the clock. The first four bits control the PNP ports and are loaded into the internal band switch register on the 5th rising edge of the clock pulse. The frequency 2000 Jan 24 It is not allowed to address the devices with words whose length is different from 18, 19 or 27 bits. 11 Philips Semiconductors Product specification 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners POWER-ON RESET PVHFH are ‘OFF’, which means that the VHF tank circuit is working in the VHF I sub-band. The tuning amplifier is switched off until the first transmission. In that case, the tank circuit in VHF I is supplied with the maximum tuning voltage. The oscillator is therefore working at the end of the VHF I sub-band. The power-on detection threshold voltage VPOR is set to VCC = 2 V at room temperature. Below this threshold, the device is reset to the power-on state. At power-on state, the charge pump current is set to 280 µA, the tuning voltage output is disabled, the test bits T2, T1 and T0 are set to ‘001’ (automatic charge pump switch ‘ON’) and RSB is set to logic 1. If the first sequence transmitted to the device has 18 or 19 bits, the reference divider ratio is set to 512 or 1024, depending on the sequence length. If the sequence has 27 bits, the reference divider ratio is fixed by RSA and RSB bits (see Table 8). PUHF is ‘OFF’, which means that the UHF oscillator and the UHF mixer are switched off. Consequently, the VHF oscillator and the VHF mixer are switched on. PVHFL and INVALID handbook, full pagewidth BAND SWITCH DATA DATA FMST PUHF TDA6402; TDA6402A; TDA6403; TDA6403A FREQUENCY DATA INVALID DATA PVHFL PVHFH N13 N12 N11 N10 N9 N8 N7 N6 N5 N4 N3 N2 N1 N0 DA 1 4 5 18 CL CE LOAD BAND SWITCH REGISTER LOAD FREQUENCY REGISTER MGE693 Fig.4 Normal mode; 18-bit data format (RSA = 1). 2000 Jan 24 12 Philips Semiconductors Product specification 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners handbook, full INVALID pagewidth BAND SWITCH DATA DATA FMST PUHF TDA6402; TDA6402A; TDA6403; TDA6403A FREQUENCY DATA INVALID DATA PVHFL PVHFH N14 N13 N12 N11 N10 N9 N8 N7 N6 N5 N4 N3 N2 N1 N0 DA 1 4 5 19 CL CE LOAD BAND SWITCH REGISTER LOAD FREQUENCY REGISTER MGE694 Fig.5 Normal mode; 19-bit data format (RSA = 0). INVALID handbook, full pagewidth BAND SWITCH DATA DATA FMST PUHF FREQUENCY DATA INVALID DATA TEST AND FEATURES DATA PVHFL PVHFH N14 N13 N12 N2 N1 N0 X 19 20 CP T2 T1 T0 RSA RSB OS DA 1 4 5 27 CL CE LOAD BAND SWITCH REGISTER LOAD FREQUENCY REGISTER LOAD CONTROL REGISTER MGE695 Fig.6 Test and features mode; 27-bit data format. 2000 Jan 24 13 Philips Semiconductors Product specification 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners TDA6402; TDA6402A; TDA6403; TDA6403A INVALID DATA handbook, full pagewidth DA INVALID DATA MSB LSB CL tHIGH tSU;DA tHD;DA CE tSU;ENCL tHD;ENDA MGE696 Fig.7 Timing diagram for 3-wire bus; DA, CL and CE. handbook, halfpage tEN CE CL tHD;ENCL MGE697 Fig.8 Timing diagram for 3-wire bus; CE and CL. 2000 Jan 24 14 Philips Semiconductors Product specification 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners TDA6402; TDA6402A; TDA6403; TDA6403A LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134) (note 1). PIN SYMBOL VCC TDA6402; TDA6402A TDA6403; TDA6403A 19 10 PARAMETER MIN. −0.3 DC supply voltage MAX. +6 UNIT V operating supply voltage 4.5 5.5 V OVS pulse is 1 second width and 1 A max. − 8 V PNP port output voltage −0.3 +6 V VBSn 7 to 10 19 to 22 IBSn 7 to 10 19 to 22 PNP port output current −1 +30 mA VCP 16 13 charge pump output voltage −0.3 +6 V VSW 11 18 bus mode selection input voltage −0.3 +6 V VVT 17 12 tuning voltage output −0.3 +35 V VLOCK/ADC 15 14 LOCK/ADC input/output voltage −0.3 +6 V VCL 14 15 serial clock input voltage −0.3 +6 V VDA 13 16 serial data input/output voltage −0.3 +6 V IDA 13 16 data output current (I2C-bus mode) −1 +10 mA VCE 12 17 chip enable/address selection input voltage −0.3 +6 V crystal input voltage −0.3 +6 V output current of each pin to ground − −10 mA VXTAL 18 11 1 to 6, 19 to 28 1 to 10, 23 to 28 tsc(max) − − maximum short-circuit time (all pins to VCC and all pins to GND, OSCGND and RFGND) − 10 s IO Tstg − − IC storage temperature −40 +150 °C Tamb − − ambient temperature −20 +85 °C Tj − − junction temperature − 150 °C Note 1. Maximum ratings can not be exceeded, not even momentarily without causing irreversible IC damage. Maximum ratings can not be accumulated. THERMAL CHARACTERISTICS SYMBOL Rth( j-a) 2000 Jan 24 PARAMETER CONDITIONS thermal resistance from junction to ambient in free air 15 TYP. UNIT 90 K/W Philips Semiconductors Product specification 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners TDA6402; TDA6402A; TDA6403; TDA6403A CHARACTERISTICS Tamb = 25 °C SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply VCC supply voltage ICC supply current at VCC = 5 V 4.5 5.0 5.5 V all PNP ports are ‘OFF’ − 71 78 mA one PNP port is ‘ON’; sourcing 25 mA − 103 113 mA one PNP port is ‘ON’; sourcing 25 mA and a second one is ‘ON’; sourcing 5 mA − 111 122 mA 1.5 2.0 − V PLL part (VCC = 4.5 to 5.5 V; Tamb = −20 to +85 °C; unless otherwise specified) FUNCTIONAL RANGE VPOR power-on reset supply voltage below this supply voltage power-on reset becomes active N divider ratio 15-bit frequency word 256 − 32767 14-bit frequency word 256 − 16383 fXTAL crystal oscillator RXTAL = 25 to 300 Ω 3.2 4.0 4.48 MHz ZXTAL input impedance (absolute value) fXTAL = 4 MHz 600 1200 − Ω PNP PORTS IBSn(off) leakage current VCC = 5.5 V; VPn = 0 V −10 − − µA VBSn(sat) output saturation voltage one buffer output is ‘ON’, sourcing 25 mA; VPn(sat) = VCC − VPn − 0.25 0.4 V − − 100 µA LOCK OUTPUT IN 3-WIRE BUS MODE (PNP COLLECTOR OUT) IUNLOCK output current when the PLL is VCC = 5.5 V; VOUT = 5.5 V out-of-lock VUNLOCK output saturation voltage when the PLL is out-of-lock ISOURCE = 200 µA; VUNLOCK = VCC − VOUT − 0.4 0.8 V VLOCK output voltage the PLL is locked − 0.01 0.40 V see Table 11 0 − VCC V ADC INPUT IN I2C-BUS MODE VADC ADC input voltage IADCH HIGH-level input current VADC = VCC − − 10 µA IADCL LOW-level input current VADC = 0 V −10 − − µA SW INPUT (BUS MODE SELECTION) VSWL LOW-level input voltage 0 − 1.5 V VSWH HIGH-level input voltage 3 − VCC V ISWH HIGH-level input current VSW = VCC − − 10 µA ISWL LOW-level input current VSW = 0 V −100 − − µA 2000 Jan 24 16 Philips Semiconductors Product specification 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners SYMBOL PARAMETER TDA6402; TDA6402A; TDA6403; TDA6403A CONDITIONS MIN. TYP. MAX. UNIT CE/AS INPUT (CHIP ENABLE/ADDRESS SELECTION) VCE/ASL LOW-level input voltage 0 − 1.5 V VCE/ASH HIGH-level input voltage 3 − 5.5 V ICE/ASH HIGH-level input current VCE/AS = 5.5 V − − 10 µA ICE/ASL LOW-level input current VCE/AS = 0 V −10 − − µA CL AND DA INPUTS VCL/DAL LOW-level input voltage 0 − 1.5 V VCL/DAH HIGH-level input voltage 3 − 5.5 V ICL/DAH HIGH-level input current VBUS = 5.5 V; VCC = 0 V − − 10 µA VBUS = 5.5 V; VCC = 5.5 V − − 10 µA ICL/DAL LOW-level input current VBUS = 1.5 V; VCC = 0 V − − 10 µA VBUS = 0 V; VCC = 5.5 V −10 − − µA DA OUTPUT (I2C-BUS MODE) IDAH leakage current VDA = 5.5 V − − 10 µA VDA output voltage IDA = 3 mA (sink current) − − 0.4 V − 100 150 kHz CLOCK FREQUENCY fclk clock frequency CHARGE PUMP OUTPUT CP ICPH HIGH-level input current (absolute value) CP = 1 − 280 − µA ICPL LOW-level input current (absolute value) CP = 0 − 60 − µA VCP output voltage PLL is locked; Tamb = 25 °C − 1.95 − V ICPleak off-state leakage current T2 = 0; T1 = 1 −15 −0.5 +15 nA − − 10 µA TUNING VOLTAGE OUTPUT VT IVTOFF leakage current when switched off OS = 1; tuning supply = 33 V VVT output voltage when the loop is closed OS = 0; T2 = 0; T1 = 0; T0 = 1; 0.2 RLOAD = 22 kΩ; tuning supply = 33 V − 32.7 V 3-WIRE BUS TIMING tHIGH clock HIGH time see Fig.7 2 − − µs tSU;DA data set-up time see Fig.7 2 − − µs tHD;DA data hold time see Fig.7 2 − − µs tSU;ENCL enable to clock set-up time see Fig.7 10 − − µs tHD;ENDA enable to data hold time see Fig.7 2 − − µs tEN enable time between two transmissions see Fig.8 10 − − µs tHD;ENCL enable to clock active edge hold time see Fig.8 6 − − µs 2000 Jan 24 17 Philips Semiconductors Product specification 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners SYMBOL PARAMETER TDA6402; TDA6402A; TDA6403; TDA6403A CONDITIONS MIN. TYP. MAX. UNIT Mixer/oscillator part (VCC = 5 V) (measured in circuit of Fig.19; unless otherwise specified) VHF MIXER (INCLUDING IF AMPLIFIER) fRF RF frequency note 1 55.25 − 361.25 MHz Gv voltage gain fRF = 57.5 MHz; see Fig.12 16.5 19 21.5 NF noise figure Vo output voltage causing 1% cross modulation in channel dB fRF = 357.5 MHz; see Fig.12 16.5 19 21.5 dB fRF = 50 MHz; see Figs 13 and 14 − 8.5 9.5 dB fRF = 150 MHz; see Figs 13 and 14 − 8.5 10.5 dB fRF = 300 MHz; see Fig.14 − 9.5 12.5 dB fRF = 55.25 MHz; see Fig.15 105 108 − dBµV fRF = 361.25 MHz; see Fig.15 105 108 − dBµV Vi input voltage causing pulling in fRF = 361.25 MHz; note 2 channel (750 Hz) − 83 − dBµV gos optimum source conductance for noise figure fRF = 50 MHz − 0.7 − mS fRF = 150 MHz − 0.9 − mS fRF = 300 MHz − 1.5 − mS fRF = 55.25 MHz; see Fig.9 − 0.25 − mS fRF = 361.25 MHz; see Fig.9 − 0.5 − mS fRF = 57.5 to 357.5 MHz; see Fig.9 − 1.3 − pF 407 MHz gi Ci input conductance input capacitance VHF OSCILLATOR; see Fig.19 fOSC oscillator frequency note 3 101 − ∆fOSC(V) oscillator frequency shift ∆VCC = 5%; note 4 − 20 120 kHz ∆VCC = 10%; note 4 − 110 − kHz ∆T = 25 °C; with compensation; note 5 − 1600 2700 kHz ∆fOSC(T) oscillator frequency drift ∆fOSC(t) oscillator frequency drift 5 s to 15 min after switch on; note 6 − 600 1100 kHz ΦOSC phase noise, carrier to noise sideband ±100 kHz frequency offset; worst case in the frequency range − 100 − dBc/Hz RSC ripple susceptibility of VCC (peak-to-peak value) VCC = 5 V; worst case in the frequency range; ripple frequency 500 kHz; note 7 15 20 − mV note 1 367.25 − 801.25 MHz UHF MIXER (INCLUDING IF AMPLIFIER) fRF RF frequency Gv voltage gain NF Vo Vi 2000 Jan 24 noise figure (not corrected for image) output voltage causing 1% cross modulation in channel fRF = 369.5 MHz; see Fig.16 26 29 32 dB fRF = 803.5 MHz; see Fig.16 26 29 32 dB fRF = 369.5 MHz; see Fig.17 − 9 11 dB fRF = 803.5 MHz; see Fig.17 − 10 12 dB fRF = 367.25 MHz; see Fig.18 105 108 − dBµV fRF = 801.25 MHz; see Fig.18 105 108 − dBµV − 82 − dBµV input voltage causing pulling in fRF = 801.25 MHz; note 2 channel (750 Hz) 18 Philips Semiconductors Product specification 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners SYMBOL Zi PARAMETER input impedance (RS + jωLS) TDA6402; TDA6402A; TDA6403; TDA6403A CONDITIONS RS at fRF = 367.25 MHz; see Fig.10 MIN. − TYP. 30 MAX. − UNIT Ω RS at fRF = 801.25 MHz; see Fig.10 − 38 − Ω LS at fRF = 367.25 MHz; see Fig.10 − 9 − nH LS at fRF = 801.25 MHz; see Fig.10 − 6 − nH UHF OSCILLATOR fOSC oscillator frequency note 3 413 − 847 MHz ∆fOSC(V) oscillator frequency shift ∆VCC = 5%; note 4 − 10 80 kHz ∆VCC = 10%; note 4 − 300 − kHz ∆fOSC(T) oscillator frequency drift ∆T = 25 °C; with compensation; note 5 − 2000 2700 kHz ∆fOSC(t) oscillator frequency drift 5 s to 15 min after switching on; note 6 − 300 1300 kHz ΦOSC phase noise, carrier to noise sideband ±100 kHz frequency offset; worst case in the frequency range − 100 − dBc/Hz RSC ripple susceptibility of VCC (peak-to-peak value) VCC = 5 V (worst case in the frequency range); ripple frequency 500 kHz; note 7 15 28 − mV magnitude; see Fig.11 − −13.1 − dB phase; see Fig.11 − 2.9 − deg IF AMPLIFIER S22 Zo output reflection coefficient output impedance (RS + jωLS) RS at 43.5 MHz; see Fig.11 − 75 − Ω LS at 43.5 MHz; see Fig.11 − 6.6 − nH REJECTION AT THE IF OUTPUT INTDIF level of divider interferences in note 8; worst case: channel C the IF signal − 17 − dBµV INTRXTAL crystal oscillator interferences rejection VIF = 100 dBµV; worst case in the frequency range; note 9 60 − − dBc INTRFREF reference frequency rejection VIF = 100 dBµV; worst case in the frequency range; fREF = 7.8125 kHz; note 10 50 − − dBc INTCH6 channel 6 beat VRFpix = VRFsnd = 80 dBµV; note 11 57 − − dBc INTCHA-5 channel A-5 beat VRFpix = 80 dBµV; note 12 60 − − dBc Notes 1. The RF frequency range is defined by the oscillator frequency range and the intermediate frequency (IF). 2. This is the level of the RF signal (100% amplitude modulated with 11.89 kHz) that causes a 750 Hz frequency deviation on the oscillator signal; it produces sidebands 30 dB below the level of the oscillator signal. 3. Limits are related to the tank circuits used in Fig.19; frequency bands may be adjusted by the choice of external components. 4. The frequency shift is defined as a change in oscillator frequency when the supply voltage varies from VCC = 5 to 4.75 V (4.5 V) or from VCC = 5 to 5.25 V (5.5 V). The oscillator is free running during this measurement. 2000 Jan 24 19 Philips Semiconductors Product specification 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners TDA6402; TDA6402A; TDA6403; TDA6403A 5. The frequency drift is defined as a change in oscillator frequency when the ambient temperature varies from Tamb = 25 to 50 °C or from Tamb = 25 to 0 °C. The oscillator is free running during this measurement. The VHF drift value can be improved by adding a 10 kΩ resistor between the VHFOSCOC pin and the VCC. In that case the typical VHF drift value can be reduced to 900 kHz. 6. Switch-on drift is defined as the change in oscillator frequency between 5 s and 15 min after switch on. The oscillator is free running during this measurement. 7. The ripple susceptibility is measured for a 500 kHz ripple at the IF output using the measurement circuit of Fig.19; the level of the ripple signal is increased until a difference of 53.5 dB occurs between the IF carrier fixed at 100 dBµV and the sideband components. 8. This is the level of divider interferences close to the IF frequency. For example channel C: fOSC = 179 MHz, 1⁄ f 4 OSC = 44.75 MHz. Divider interference is measured with the Philips 37185 demonstration board in accordance with Fig.19. All ground pins are connected to a single ground plane under the IC. The VHFIN input must be left open (i.e. not connected to any load or cable); The UHFIN1 and UHFIN2 inputs are connected to a hybrid. The measured levels of divider interference are influenced by layout, grounding and port decoupling. The measurement results could vary by as much as 10 dB with respect to the specification. 9. Crystal oscillator interference means the 4 MHz sidebands caused by the crystal oscillator. The rejection has to be greater than 60 dB for an IF output signal of 100 dBµV. 10. The reference frequency rejection is the level of reference frequency sidebands related to the sound sub-carrier. The rejection has to be greater than 50 dB for an IF output signal of 100 dBµV. 11. Channel 6 beat is the interfering product of fRFpix + fRFsnd − fOSC of channel 6 at 42 MHz. 12. Channel A-5 beat is the interfering product of fRFpix, fIF and fOSC of channel A-4; fBEAT = 45.5 MHz. The possible mechanisms are: fOSC − 2 × fIF or 2 × fRFpix − fOSC. For the measurement VRF = 80 dBµV. 1 handbook, full pagewidth 2 0.5 0.2 5 10 –j ∞ 10 5 2 1 0.5 0.2 40 MHz 0 +j 10 400 MHz 5 0.2 2 0.5 1 MGE722 Fig.9 Input admittance (S11) of the VHF mixer input (40 to 400 MHz); Y0 = 20 mS. 2000 Jan 24 20 Philips Semiconductors Product specification 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners TDA6402; TDA6402A; TDA6403; TDA6403A 1 handbook, full pagewidth 0.5 2 860 MHz 0.2 5 350 MHz 10 +j 0.2 0 0.5 1 2 5 ∞ 10 –j 10 5 0.2 2 0.5 1 MGE723 Fig.10 Input impedance (S11) of the UHF mixer input (350 to 860 MHz); Z0 = 50 Ω. 1 handbook, full pagewidth 0.5 2 0.2 5 10 +j 0 0.2 0.5 1 20 MHz 2 5 ∞ 10 100 MHz –j 10 5 0.2 2 0.5 1 MGE724 Fig.11 Output impedance (S22) of the IF amplifier (20 to 60 MHz); Z0 = 50 Ω. 2000 Jan 24 21 Philips Semiconductors Product specification 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners TDA6402; TDA6402A; TDA6403; TDA6403A TEST AND APPLICATION INFORMATION handbook, full pagewidth signal source 50 Ω 22 Ω VHFIN e Vmeas V 50 Ω IFOUT D.U.T. Vi spectrum analyzer Vo 50 Ω V'meas RMS voltmeter MGE698 Zi >> 50 Ω ⇒ Vi = 2 × Vmeas = 80 dBµV. Vi = Vmeas + 6 dB = 80 dBµV. 50 + 22 Vo = V’meas × ------------------50 Vo Gv = 20 log -----Vi Fig.12 Gain measurement in VHF band. I1 handbook, full pagewidth BNC I3 PCB C1 L1 BNC plug C2 PCB C3 plug I2 RIM-RIM RIM-RIM C4 (a) (b) MBE286 - 1 (a) For fRF = 50 MHz: (b) For fRF = 150 MHz: mixer A frequency response measured = 57 MHz, loss = 0 dB image suppression = 16 dB mixer A frequency response measured = 150.3 MHz, loss = 1.3 dB image suppression = 13 dB C1 = 9 pF C2 = 15 pF L1 = 7 turns (∅ 5.5 mm, wire ∅ = 0.5 mm) l1 = semi rigid cable (RIM): 5 cm long (semi rigid cable (RIM); 33 dB/100 m; 50 Ω; 96 pF/m). C3 = 5 pF C4 = 25 pF l2 = semi rigid cable (RIM): 30 cm long l3 = semi rigid cable (RIM): 5 cm long (semi rigid cable (RIM); 33 dB/100 m; 50 Ω; 96 pF/m). Fig.13 Input circuit for optimum noise figure in VHF band. 2000 Jan 24 22 Philips Semiconductors Product specification 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners TDA6402; TDA6402A; TDA6403; TDA6403A handbook, full pagewidth 22 Ω NOISE SOURCE VHFIN RIM BNC INPUT CIRCUIT IFOUT NOISE FIGURE METER D.U.T. MGE699 NF = NFmeas − loss (of input circuit) (dB). Fig.14 Noise figure (NF) measurement in VHF band. FILTER handbook, full pagewidth 50 Ω AM = 50% 1 kHz unwanted signal source eu 22 Ω A VHFIN C 18 dB attenuator IFOUT 45.75 MHz HYBRID D.U.T. Vo V Vmeas modulation analyzer 50 Ω 50 Ω B ew wanted signal source D 50 Ω RMS voltmeter MGE700 50 + 22 Vo = Vmeas × ------------------50 Wanted output signal at fRFW = 55.25 (361.25) MHz; Vo(w) = 100 dBµV. Measuring the level of the unwanted output signal Vo(u) causing 0.5% AM modulation in the wanted output signal; fRFU = 59.75 (366.75) MHz. fOSC = 101 (407) MHz. Filter characteristics: fC = 45.75 MHz, f−3 dB(BW) = 1.4 MHz, f−30 dB(BW) = 3.1 MHz. Fig.15 Cross modulation measurement in VHF band. 2000 Jan 24 23 Philips Semiconductors Product specification 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners handbook, full pagewidth e 50 Ω TDA6402; TDA6402A; TDA6403; TDA6403A signal source 22 Ω A Vmeas V 50 Ω Vi UHFIN1 IFOUT C HYBRID B D.U.T. spectrum analyzer Vo V'meas UHFIN2 D RMS 50 Ω voltmeter MGE701 Loss (in hybrid) = 1 dB. Vi = Vmeas − loss (in hybrid) = 70 dBµV. 50 + 22 Vo = V’meas × ------------------50 Vo Gv = 20 log -----Vi Fig.16 Gain (Gv) measurement in UHF band. handbook, full pagewidth 22 Ω NOISE SOURCE A C UHFIN HYBRID B D IFOUT NOISE FIGURE METER D.U.T. UHFIN 50 Ω MGE702 Loss (in hybrid) = 1 dB. NF = NFmeas − loss (in hybrid). Fig.17 Noise figure (NF) measurement in bands UHF. 2000 Jan 24 50 Ω 24 Philips Semiconductors Product specification 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners TDA6402; TDA6402A; TDA6403; TDA6403A FILTER handbook, full pagewidth AM = 50% 50 Ω 1 kHz unwanted signal source eu A C ew C 22 Ω UHFIN IFOUT 45.75 MHz HYBRID HYBRID B B 50 Ω wanted signal source A 18 dB attenuator D 50 Ω D D.U.T. Vo V Vmeas modulation analyzer 50 Ω UHFIN RMS voltmeter 50 Ω MGE703 50 + 22 Vo = Vmeas × ------------------50 Wanted output signal at fRFW = 367.25 (801.25) MHz; Vo(w) = 100 dBµV. Measuring the level of the unwanted output signal Vo(u) causing 0.5% AM modulation in the wanted output signal; fRFU = 371.25 (805.75) MHz. fOSC = 413 (847) MHz. Filter characteristics: fC = 45.75 MHz, f−3 dB(BW) = 1.4 MHz, f−30 dB(BW) = 3.1 MHz. Fig.18 Cross modulation measurement in UHF band. 2000 Jan 24 25 Philips Semiconductors Product specification 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners handbook, full pagewidth C1 UHFIN1 UHF-IN 1 (28) (1) 28 TDA6402; TDA6402A; TDA6403; TDA6403A UHFOSCIB2 C6 (N750) R1 1 pF 22 kΩ 1 nF C2 UHFIN2 UHF-IN 2 (27) (2) 27 UHFOSCOC2 D1 BB134 C7 (N750) 1.8 pF C8 (N750) 47 pF (N750) 1 nF 23 nH L2 C11 L3 C3 VHFIN VHF-IN 3 (26) (3) 26 UHFOSCOC1 1 nF RFGND 4 (25) (4) 25 IFFIL1 5 (24) (5) 24 VHFOSCOC C12 (N750) 15 pF 2.2 pF L1 C5 2 x 5t IFFIL2 6 (23) (6) 23 PVHFL VHF-LOW 7 (22) 330 Ω D4 R20 PVHFH VHF-HIGH 8 (21) 330 Ω D5 TDA6402 TDA6402A TDA6403 TDA6403A (7) 22 R3 R4 22 kΩ 22 kΩ C14 (N470) D2 BB133 OSCGND 15 pF R19 VHFOSCIB 4.7 kΩ R2 C9 (N750) UHFOSCIB1 1 pF C4 8 pF (N750) C10 1.8 pF C13 (N750) R5 4.7 Ω 100 pF L4 L5 30 nH 80 nH C15 R6 4.7 nF 10 kΩ C16 D3 R7 4.7 nF BA792 680 Ω 2.5 pF (8) 21 23 nH GND PVHFH R9 3.9 kΩ R21 UHF PUHF R22 FMST FMST 330 Ω D7 4 × LED 3 mm (9) 20 9 (20) 330 Ω D6 (10) 19 10 (19) 80 nH (11) 18 11 (18) 1 R14 CE/AS 330 Ω R12 1 DA 330 Ω 2 12 (17) (12) 17 13 (16) (13) 16 X1 C19 4 MHz 18 pF XTAL for test purpose only VCC PVHFL 3.9 kΩ C18 SW 2 R8 1 nF VCC 3-WIRE / I2C-bus open for 3-wire C17 L6 IFOUT 10 nF VCC VT CP C20 R10 100 nF 33 kΩ VT TP R11 TR1 BC847B R13 CL (14) 15 14 (15) 330 Ω C21 LOCK/ADC R16 22 kΩ 22 kΩ C22 10 nF 2.2 nF R23 6.8 kΩ C23 10 µF (16 V) Vripple C24 R15 10 µF (16 V) R18 330 Ω R26 50 Ω 3 2 R24 R25 68 kΩ 1 kΩ C25 1 IFOUT measurement 1/2fDIV or fREF measurement BC847B DA CL AGND CE +5 V 10 nF JMP2 LOCK TR2 for test purpose only The pin numbers in parenthesis represent the TDA6403 and TDA6403A. Fig.19 Measurement circuit. 2000 Jan 24 26 22 Ω +5 V MGE689 +33 V VCC AGND for test purpose only Philips Semiconductors Product specification 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners TDA6402; TDA6402A; TDA6403; TDA6403A Component values for measurement circuit Table 13 Capacitors (all SMD and NP0) COMPONENT VALUE COMPONENT VALUE C1 1 nF R11 22 kΩ C2 1 nF R12 330 Ω C3 1 nF R13 330 Ω C4 15 pF R14 330 Ω C5 15 pF R15 330 Ω C6 1 pF (N750) R16 22 kΩ C7 1.8 pF (N750) R18 22 Ω C8 1.8 pF (N750) R19 330 Ω C9 1 pF (N750) R20 330 Ω C10 8 pF (N750) R21 330 Ω C11 47 pF (N750) R22 330 Ω C12 2.2 pF (N750) R23 6.8 kΩ C13 2.7 pF (N750) R24 68 kΩ C14 100 pF (N470) R25 1 kΩ C15 4.7 nF R26 50 Ω C16 4.7 nF C17 1 nF C18 10 nF C19 18 pF D1 BB134 C20 100 nF D2 BB133 C21 2.2 nF D3 BA792 C22 10 nF IC C23 10 µF (16 V; electrolytic) TDA6402; TDA6402A; TDA6403; TDA6403A Table 15 Diodes and ICs COMPONENT C24 10 µF (16 V; electrolytic) C25 10 nF VALUE Table 16 Coils (wire size 0.4 mm) COMPONENT Table 14 Resistors (all SMD) COMPONENT VALUE VALUE L2 23 nH L3 23 nH 30 nH R1 22 kΩ L4 R2 4.7 kΩ L5 80 nH R3 22 kΩ L6 80 nH R4 22 kΩ R5 4.7 Ω R6 10 kΩ R7 680 Ω L1 R8 3.9 kΩ Note R9 3.9 kΩ R10 33 kΩ 1. Coil type: TOKO 7kN; material: 113 kN; screw core: 03-0093; pot core: 04-0026. 2000 Jan 24 Table 17 Transformer (note 1) COMPONENT 27 VALUE 2 × 5 turns Philips Semiconductors Product specification 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners Table 18 Crystal COMPONENT Examples of I2C-bus sequences (SW = VCC) for TDA6402 and TDA6403 VALUE X1 TDA6402; TDA6402A; TDA6403; TDA6403A Tables 20 to 24 show the various sequences where: 4 MHz fOSC = 100 MHz Table 19 Transistors PVHFL = ‘ON’ to switch on VHF I COMPONENT FMST is ‘ON’ to switch on an FM sound trap VALUE TR1 BC847B ICP = 280 µA TR2 BC847B N = 512 fXTAL = 4 MHz Tuning amplifier S = START The tuning amplifier is capable of driving the varicap voltage without an external transistor. The tuning voltage output must be connected to an external load of 27 kΩ which is connected to the tuning voltage supply rail. The loop filter design depends on the oscillator characteristics and the selected reference frequency. A = acknowledge P = STOP. For the complete sequence see Table 20 (sequence 1) or Table 21 (sequence 2). Crystal oscillator The crystal oscillator uses a 4 MHz crystal connected in series with an 18 pF capacitor thereby operating in the series resonance mode. Connecting the oscillator to the supply voltage is preferred, but it can also be connected to ground. Table 20 Complete sequence 1 START ADDRESS BYTE DIVIDER BYTE 1 DIVIDER BYTE 2 CONTROL BYTE S C2 A 06 A 40 A CE A BAND SWITCH BYTE 09 A STOP P Table 21 Complete sequence 2 START ADDRESS BYTE CONTROL BYTE S C2 A CE A BAND SWITCH BYTE 09 A C2 A 06 A 40 A S P C2 A CE A 09 A 2000 Jan 24 C2 A CE 40 A P C3 A XX(1) X(2) P 1. XX = Read status byte. P 2. X = No acknowledge from the master means end of sequence. Table 24 Control byte only sequence S A Notes Table 23 Control and band switch bytes only sequence S 06 STOP Table 25 Status byte acquisition Table 22 Divider bytes only sequence S DIVIDER BYTE 1 DIVIDER BYTE 2 A P 28 Philips Semiconductors Product specification 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners TDA6402; TDA6402A; TDA6403; TDA6403A Table 26 Two status bytes acquisition S C3 XX(1) A XX(1) A X(2) P Notes 1. XX = Read status byte. 2. X = No acknowledge from the master means end of sequence. Other I2C-bus addresses may be selected by applying an appropriate voltage to the CE input. Examples of 3-wire bus sequences (SW = OPEN) Table 27 18-bit sequence (fOSC = 800 MHz; PUHF = ON) 1 0 0 0 1 1 0 0 1 0 0 0 0 0 0 0 0 0 The reference divider is automatically set to 512 assuming that RSB has been set to logic 1 at power-on. If RSB has been set to logic 0, in a previous 27-bit sequence, the reference divider will still be set at 640. In that event, the 18-bit sequence has to be adapted to the 640 divider ratio. Table 28 19-bit sequence (fOSC = 650 MHz; PUHF = ON) 1 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 0 0 The reference divider is automatically set to 512 assuming that RSB has been set to logic 1 at power-on. If RSB has been set to logic 0 in a previous 27-bit sequence, the reference divider will still be set at 640. In that event, the 19-bit sequence has to be adapted to the 640 divider ratio. Table 29 27-bit sequence (fOSC = 750 MHz; PUHF = ON; N = 640; ICP = 60 µA; no test function) 1 0 0 0 0 1 1 1 0 1 0 1 0 0 1 1 0 0 0 1 0 0 0 1 0 0 0 Table 30 19-bit sequence 1 0 0 0 0 1 0 1 1 1 0 1 1 1 0 0 0 0 0 0 0 This sequence will program fOSC to 600 MHz in 50 kHz steps; ICP remains at 60 µA. Table 31 18-bit sequence 1 0 0 0 1 0 1 1 1 0 1 1 1 This sequence will program fOSC to 600 MHz in 50 kHz steps; ICP remains at 60 µA. 2000 Jan 24 29 0 0 0 Philips Semiconductors Product specification 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners TDA6402; TDA6402A; TDA6403; TDA6403A INTERNAL PIN CONFIGURATION AVERAGE DC VOLTAGE (V) (measured in Fig.19) PIN DESCRIPTION(1) SYMBOL TDA6402; TDA6402A TDA6403; TDA6403A UHFIN1 1 28 note 2 1.0 UHFIN2 2 27 note 2 1.0 1.8 note 2 0.0 0.0 3.6 3.6 3.6 3.6 0.0 or (VCC − VCE) 0.0 VHF 1 2 (28) (27) UHF MGE704 VHFIN 3 26 3 (26) MGE705 RFGND 4 25 4 (25) MGE706 IFFIL1 5 24 IFFIL2 6 23 (24) 5 6 (23) MGD617 PVHFL 7 22 PVHFH 8 21 (VCC − VCE) or 0.0 0.0 PUHF 9 20 0.0 (VCC − VCE) FMST 10 19 0.0 or (VCC − VCE) 0.0 7 8 (22) (21) 9 10 (20) (19) MGE708 2000 Jan 24 30 Philips Semiconductors Product specification 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners TDA6402; TDA6402A; TDA6403; TDA6403A AVERAGE DC VOLTAGE (V) (measured in Fig.19) PIN DESCRIPTION(1) SYMBOL SW TDA6402; TDA6402A TDA6403; TDA6403A 11 18 VHF UHF 5.0 5.0 1.25 1.25 note 2 note 2 note 2 note 2 4.6 4.6 11 (18) CE/AS 12 MGE709 17 12 (17) MGE710 DA 13 16 13 (16) MGE711 CL 14 15 14 (15) LOCK/ADC 15 MGE712 14 15 (14) MGE713 2000 Jan 24 31 Philips Semiconductors Product specification 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners TDA6402; TDA6402A; TDA6403; TDA6403A AVERAGE DC VOLTAGE (V) (measured in Fig.19) PIN DESCRIPTION(1) SYMBOL CP TDA6402; TDA6402A TDA6403; TDA6403A 16 13 VHF UHF 1.9 1.9 VVT VVT 3.4 3.4 5.0 5.0 2.1 2.1 0.0 0.0 0.0 0.0 16 (13) MGE714 VT 17 12 17 (12) MGE715 XTAL 18 11 18 (11) MGE716 VCC 19 10 IFOUT 20 9 supply voltage 20 (9) GND 21 8 MGE717 21 (8) MGE718 OSCGND 23 6 23 (6) MGE719 2000 Jan 24 32 Philips Semiconductors Product specification 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners TDA6402; TDA6402A; TDA6403; TDA6403A AVERAGE DC VOLTAGE (V) (measured in Fig.19) PIN DESCRIPTION(1) SYMBOL TDA6402; TDA6402A TDA6403; TDA6403A VHFOSCIB 22 7 1.8 note 2 VHFOSCOC 24 5 3.0 note 2 note 2 1.9 note 2 2.9 note 2 2.9 note 2 1.9 VHF UHF 24 (5) 22 (7) MGE720 UHFOSCIB1 25 4 UHFOSCOC1 26 3 UHFOSCOC2 27 2 UHFOSCIB2 28 1 (2) (3) 27 26 25 28 (4) (1) MGK825 Notes 1. The pin numbers in parenthesis represent the TDA6403 and TDA6403A. 2. Not applicable. 2000 Jan 24 33 Philips Semiconductors Product specification 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners TDA6402; TDA6402A; TDA6403; TDA6403A PACKAGE OUTLINE SSOP28: plastic shrink small outline package; 28 leads; body width 5.3 mm D SOT341-1 E A X c HE y v M A Z 28 15 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 14 bp e detail X w M 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2.0 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 10.4 10.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 1.1 0.7 8 0o Note 1. Plastic or metal protrusions of 0.20 mm maximum per side are not included. OUTLINE VERSION SOT341-1 2000 Jan 24 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE 95-02-04 99-12-27 MO-150 34 o Philips Semiconductors Product specification 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners • Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. SOLDERING Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). • For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. • For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 230 °C. Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results: 2000 Jan 24 TDA6402; TDA6402A; TDA6403; TDA6403A 35 Philips Semiconductors Product specification 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners TDA6402; TDA6402A; TDA6403; TDA6403A Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE WAVE BGA, LFBGA, SQFP, TFBGA not suitable suitable(2) HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS not PLCC(3), SO, SOJ suitable LQFP, QFP, TQFP SSOP, TSSOP, VSO REFLOW(1) suitable suitable suitable not recommended(3)(4) suitable not recommended(5) suitable Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”. 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 2000 Jan 24 36 Philips Semiconductors Product specification 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners TDA6402; TDA6402A; TDA6403; TDA6403A DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. PURCHASE OF PHILIPS I2C COMPONENTS Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011. 2000 Jan 24 37 Philips Semiconductors Product specification 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners NOTES 2000 Jan 24 38 TDA6402; TDA6402A; TDA6403; TDA6403A Philips Semiconductors Product specification 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners NOTES 2000 Jan 24 39 TDA6402; TDA6402A; TDA6403; TDA6403A Philips Semiconductors – a worldwide company Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 545004/05/pp40 Date of release: 2000 Jan 24 Document order number: 9397 750 06728