TSC103 High-voltage, high-side current sense amplifier Features ■ Independent supply and input common-mode voltages ■ Wide common-mode operating range: 2.9 to 70 V in single-supply configuration -2.1 to 65 V in dual-supply configuration ■ Wide common-mode surviving range: -16 to 75 V (reversed battery and load-dump conditions) ■ Supply voltage range: 2.7 to 5.5 V in single-supply configuration ■ Low current consumption: ICC max = 360 µA ■ Pin selectable gain: 20 V/V, 25 V/V, 50 V/V or 100 V/V ■ Buffered output TSSOP8 (Plastic package) SO-8 (Plastic package) Applications 8 Vp Vm 1 ■ Automotive current monitoring ■ DC motor control SEL1 2 7 Vcc- ■ Photovoltaic systems SEL2 3 6 Gnd ■ Battery chargers ■ Precision current sources ■ Current monitoring of notebook computers ■ Uninterruptible power supplies ■ High-end power supplies Description The TSC103 measures a small differential voltage on a high-side shunt resistor and translates it into a ground-referenced output voltage. The gain is adjustable to four different values from 20 V/V up to 100 V/V by two selection pins. Wide input common-mode voltage range, low quiescent current, and tiny TSSOP8 packaging enable use in a wide variety of applications. January 2010 5 Vcc+ Out 4 Pin connections (top view) The input common-mode and power-supply voltages are independent. The common-mode voltage can range from 2.9 to 70 V in the singlesupply configuration or be offset by an adjustable voltage supplied on the Vcc- pin in the dualsupply configuration. With a current consumption lower than 360 µA and a virtually null input leakage current in standby mode, the power consumption in the applications is minimized. Doc ID 16873 Rev 1 1/23 www.st.com 23 Contents TSC103 Contents 1 Application schematic and pin description . . . . . . . . . . . . . . . . . . . . . . 3 2 Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 6 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4 Parameter definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.1 Common mode rejection ratio (CMR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.2 Supply voltage rejection ratio (SVR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.3 Gain (Av) and input offset voltage (Vos) . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.4 Output voltage drift versus temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.5 Input offset drift versus temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.6 Output voltage accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5 Maximum permissible voltages on pins . . . . . . . . . . . . . . . . . . . . . . . . 15 6 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 7 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 7.1 SO-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 7.2 TSSOP-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 8 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 2/23 Doc ID 16873 Rev 1 TSC103 Application schematic and pin description The TSC103 high-side current sense amplifier can be used in either single- or dual-supply mode. In the single-supply configuration, the TSC103 features a wide 2.9 V to 70 V input common-mode range totally independent of the supply voltage. In the dual-supply range, the common-mode range is shifted by the value of the negative voltage applied on the Vccpin. For instance, with Vcc+ = 5 V and Vcc- = -5 V, then the input common-mode range is -2 V to 65 V. Figure 1. Single-supply configuration schematic Vsense Iload Rsense Vp Common-mode voltage: 2.9 V to 70 V load 1 Application schematic and pin description 5V Vcc+ Vm Out SEL1 TSC103 Vcc- SEL2 Gnd Vcc Vout µ Controller ADC GPIO1 GPIO2 Gnd AM04517 Doc ID 16873 Rev 1 3/23 Application schematic and pin description Figure 2. TSC103 Dual-supply configuration schematic Vsense Iload Vp Common-mode voltage: -2 V to 65 V load Rsense Vm 5V Out SEL1 TSC103 Vcc- Vcc Vcc+ SEL2 Gnd Vout µ Controller ADC GPIO1 GPIO2 Gnd -5 V AM04518 4/23 Doc ID 16873 Rev 1 TSC103 Application schematic and pin description Figure 3. Common-mode versus supply voltage in dual-supply configuration Vicm common-mode voltage operating range Max = 70 V Max = 65 V Max = 60 V min = 2.9 V min = -2.1 V Vcc- = 0 V Vcc- = -5 V Single-supply min = -7.1 V Vcc- = -10 V Dual-supply AM04519 Table 1 describes the function of each pin. Their position is shown in the illustration on the cover page and in Figure 1 on page 3. Table 1. Pin description Symbol Type Function Out Analog output The Out voltage is proportional to the magnitude of the sense voltage Vp-Vm. Gnd Power supply Ground line. Vcc+ Power supply Positive power supply line. Vcc- Power supply Negative power supply line. Vp Analog input Connection for the external sense resistor. The measured current enters the shunt on the Vp side. Vm Analog input Connection for the external sense resistor. The measured current exits the shunt on the Vm side. SEL1 Digital input Gain-select pin. SEL2 Digital input Gain-select pin. Doc ID 16873 Rev 1 5/23 Absolute maximum ratings and operating conditions 2 TSC103 Absolute maximum ratings and operating conditions Table 2. Absolute maximum ratings Symbol Vid Vin_sense Vin_sel Vcc+ Vcc+-Vcc- Parameter Value Unit ±20 V -16 to 75 V -0.3 to Vcc++0.3 V Positive supply voltage(2) -0.3 to 7 V DC supply voltage 0 to 15 V -0.3 to Vcc++0.3 V -55 to 150 °C Maximum junction temperature 150 °C TSSOP8 thermal resistance junction to ambient 120 °C/W SO-8 thermal resistance junction to ambient 125 °C/W 2.5 kV 150 V 1.5 kV Input pins differential voltage (Vp-Vm) (1) Sensing pins input voltages (Vp, Vm) (2) Gain selection pins input voltages (SEL1, SEL2) voltage(2) Vout DC output pin Tstg Storage temperature Tj Rthja HBM: human body ESD model(3) MM: machine model(4) CDM: charged device model(5) 1. These voltage values are measured with respect to the Vcc- pin. 2. These voltage values are measured with respect to the Gnd pin. 3. Human body model: a 100 pF capacitor is charged to the specified voltage, then discharged through a 1.5 kΩ resistor between two pins of the device. This is done for all couples of connected pin combinations while the other pins are floating. 4. Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 Ω). This is done for all couples of connected pin combinations while the other pins are floating. 5. Charged device model: all pins plus package are charged together to the specified voltage and then discharged directly to ground. Table 3. Operating conditions Symbol Parameter Value Unit Vcc+ Supply voltage in single-supply configuration from Tmin to Tmax (Vcc- connected to Gnd = 0 V) 2.7 to 5.5 V Vcc+ = 5.5 V max -8 to 0 V Vcc+ = 3 V max -11 to 0 V Vicm Common-mode voltage range referred to pin Vcc (Tmin to Tmax) 2.9 to 70 V Toper Operational temperature range (Tmin to Tmax) -40 to 125 °C Negative supply voltage in dual-supply configuration from Tmin to Tmax Vcc- 6/23 Doc ID 16873 Rev 1 TSC103 3 Electrical characteristics Electrical characteristics The electrical characteristics given in the following tables are measured under the following test conditions unless otherwise specified. Table 4. ● Tamb = 25° C, Vcc+ = 5 V, Vcc- connected to Gnd (single-supply configuration). ● Vsense = Vp-Vm = 50 mV, Vm = 12 V, no load on Out, all gain configurations. Supply Symbol Parameter Test conditions Min. Typ. Max. Unit ICC Total supply current Vsense = 0 V, Tmin < Tamb < Tmax 200 360 µA ICC1 Total supply current Vsense = 50 mV Av = 50 V/V Tmin < Tamb < Tmax 300 480 µA Min. Typ. Max. Unit 90 105 dB 95 dB 100 dB Table 5. Symbol Input Parameter Test conditions DC common-mode rejection DC CMR Variation of Vout versus Vicm referred to input(1) 2.9 V< Vm < 70 V Tmin < Tamb < Tmax AC common-mode rejection Variation of Vout versus Vicm AC CMR referred to input (peak-to-peak voltage variation) Av = 50 V/V or 100 V/V 2.9 V< Vm < 30 V 1 kHz sine wave Supply voltage rejection Variation of Vout versus VCC(2) SEL1 = Gnd, SEL2 = Gnd 2.7 V< VCC < 5.5 V Vsense = 30 mV Tmin < Tamb < Tmax Vos Input offset voltage(3) Tamb = 25° C Tmin < Tamb < Tmax dVos/dT Input offset drift vs. T Av = 50 V/V Tmin < Tamb < Tmax Ilk Input leakage current VCC = 0 V Tmin < Tamb < Tmax Iib Input bias current Vsense = 0 V Tmin < Tamb < Tmax VIL Logic low voltage threshold (SEL1 and SEL2) VIH Logic high voltage threshold (SEL1 VCCmin < VCC < VCCmax and SEL2) Tmin < Tamb < Tmax Isel Gain-select pins (SEL1 and SEL2) SEL pin connected to GND or input bias current VCC Tmin < Tamb < Tmax SVR VCCmin < VCC < VCCmax Tmin < Tamb < Tmax 85 ±500 ±1100 µV +5 µV/°C 1 µA 15 µA -0.3 0.5 V 1.2 VCC V -20 10 400 nA 1. See Chapter 4: Parameter definitions on page 10 for the definition of CMR. 2. See Chapter 4 for the definition of SVR. 3. See Chapter 4 for the definition of Vos. Doc ID 16873 Rev 1 7/23 Electrical characteristics Table 6. Output Symbol Av ΔVout/ΔT TSC103 Parameter Gain SEL1 = Gnd, SEL2 = Gnd SEL1 = Gnd, SEL2 = Vcc+ SEL1 = Vcc+, SEL2 = Gnd SEL1 = Vcc+, SEL2 = Vcc+ Output voltage drift vs. T(1) Av = 50 V/V Tmin < Tamb < Tmax ΔVout/ΔIout Output stage load regulation ΔVout Test conditions Total output voltage accuracy(2) Min. Typ. Max. 20 25 50 100 Unit V/V ±240 ppm/°C ±1.5 mV/mA Vsense = 50 mV(3) Tamb = 25° C Tmin < Tamb < Tmax ±2.5 ±4 % ±3.5 ±5 % -10 mA < Iout <10 mA Iout sink or source current Av = 50 V/V 0.3 ΔVout Total output voltage accuracy Vsense = 90 mV(3) Tamb = 25° C Tmin < Tamb < Tmax ΔVout Total output voltage accuracy Vsense = 20 mV Tamb = 25° C Tmin < Tamb < Tmax ±3.5 ±5 % ΔVout Total output voltage accuracy Vsense = 10 mV Tamb = 25° C Tmin < Tamb < Tmax ±5.5 ±8 % ΔVout Total output voltage accuracy Vsense = 5 mV Tamb = 25° C Tmin < Tamb < Tmax ±10 ±22 % Short-circuit current OUT connected to VCC or GND VOH Output stage high-state saturation voltage VOH = VCC-Vout Vsense = 1 V Iout = 1 mA 85 135 mV VOL Output stage low-state saturation voltage Vsense =-1 V Iout = 1 mA 80 125 mV Isc 15 26 mA 1. See Chapter 4: Parameter definitions on page 10 for the definition of output voltage drift versus temperature. 2. Output voltage accuracy is the difference with the expected theoretical output voltage Vout-th=Av*Vsense. See Chapter 4 for a more detailed definition. 3. Except for Av = 100 V/V. 8/23 Doc ID 16873 Rev 1 TSC103 Table 7. Electrical characteristics Frequency response Symbol ts Parameter Response to input differential voltage change. Output settling to 1% of final value Test conditions Min. Typ. Max. Unit Vsense square pulse applied to generate a variation of Vout from 500 mV to 3 V Cload = 47 pF Av = 20 V/V, 3 µs Av = 25 V/V 4 µs Av = 50 V/V 6 Av = 100 V/V 10 µs tSEL Response to a gain change. Output settling to 1% of final value Any change of state of SEL1 or SEL2 pin 1 µs trec Response to common-mode voltage change. Output settling to 1% of final value Vcc+= 5 V, Vcc-= -5 V Vm step change from -2 V to 30 V or 30 V to -2 V 20 µs SR Slew rate Vsense = 10 mV to 100 mV 0.6 V/µs BW 3 dB bandwidth Cload = 47 pF Vm = 12 V Vsense = 50 mV Av = 50 V/V 700 kHz Table 8. Symbol eN 0.4 Noise Parameter Equivalent input noise voltage Test conditions f = 1 kHz Doc ID 16873 Rev 1 Min. Typ. 40 Max. Unit nV/√ Hz 9/23 Parameter definitions TSC103 4 Parameter definitions 4.1 Common mode rejection ratio (CMR) The common-mode rejection ratio (CMR) measures the ability of the current-sensing amplifier to reject any DC voltage applied on both inputs Vp and Vm. The CMR is referred back to the input so that its effect can be compared with the applied differential signal. The CMR is defined by the formula: ΔV out CMR = – 20 ⋅ log -----------------------------ΔV icm ⋅ Av 4.2 Supply voltage rejection ratio (SVR) The supply-voltage rejection ratio (SVR) measures the ability of the current-sensing amplifier to reject any variation of the supply voltage VCC. The SVR is referred back to the input so that its effect can be compared with the applied differential signal. The SVR is defined by the formula: ΔV out SVR = – 20 ⋅ log ----------------------------ΔV CC ⋅ Av 4.3 Gain (Av) and input offset voltage (Vos) The input offset voltage is defined as the intersection between the linear regression of the Vout vs. Vsense curve with the X-axis (see Figure 4). If Vout1 is the output voltage with Vsense = Vsense1 and Vout2 is the output voltage with Vsense = Vsense2, then Vos can be calculated with the following formula. V sense1 – V sense2 V os = V sense1 – ⎛ ------------------------------------------------ ⋅ V out1⎞ ⎝ V out1 – V out2 ⎠ 10/23 Doc ID 16873 Rev 1 TSC103 Parameter definitions Figure 4. Vout versus Vsense characteristics: detail for low Vsense values Vout Vout_1 Vout_2 Vsense Vos Vsense2 Vsense1 AM04520 The values of Vsense1 and Vsense2 used for the input offset calculations are detailed in Table 9. Table 9. Test conditions for Vos voltage calculation Av (V/V) Vsense1 (mV) Vsense2 (mV) 20 50 5 25 50 5 50 50 5 100 40 5 Doc ID 16873 Rev 1 11/23 Parameter definitions 4.4 TSC103 Output voltage drift versus temperature The output voltage drift versus temperature is defined as the maximum variation of Vout with respect to its value at 25° C over the temperature range. It is calculated as follows: ΔV out V out ( T amb ) – V out ( 25° C ) ----------------- = max -------------------------------------------------------------------------ΔT T amb – 25° C with Tmin < Tamb < Tmax. Figure 5 provides a graphical definition of the output voltage drift versus temperature. On this chart Vout is always comprised in the area defined by the maximum and minimum variation of Vout versus T, and T = 25° C is considered to be the reference. Figure 5. Output voltage drift versus temperature (Av = 50 V/V Vsense = 50 mV) 60 Vout-Vout@25°C (mV) 40 20 0 -20 -40 -60 -60 -40 12/23 -20 0 20 40 60 T (°C) Doc ID 16873 Rev 1 80 100 120 140 TSC103 4.5 Parameter definitions Input offset drift versus temperature The input voltage drift versus temperature is defined as the maximum variation of Vos with respect to its value at 25° C over the temperature range. It is calculated as follows: ΔV os V os ( T amb ) – V os ( 25° C ) --------------- = max --------------------------------------------------------------------ΔT T amb – 25° C with Tmin < Tamb < Tmax. Figure 6. provides a graphical definition of the input offset drift versus temperature. On this chart Vos is always comprised in the area defined by the maximum and minimum variation of Vos versus T, and T = 25° C is considered to be the reference. Figure 6. Input offset drift versus temperature (Av = 50 V/V) 1.5 Vos-Vos@25°C (mV) 1 0.5 0 -0.5 -1 -1.5 -2 -2.5 -60 -40 -20 0 20 40 60 80 100 120 140 T (°C) 4.6 Output voltage accuracy The output voltage accuracy is the difference between the actual output voltage and the theoretical output voltage. Ideally, the current sensing output voltage should be equal to the input differential voltage multiplied by the theoretical gain, as in the following formula. Vout-th = Av . Vsense The actual value is very slightly different, mainly due to the effects of: ● the input offset voltage Vos, ● the non-linearity. Doc ID 16873 Rev 1 13/23 Parameter definitions Figure 7. TSC103 Vout vs. Vsense theoretical and actual characteristics Vout Actual Ideal Vout accuracy for Vsense = 5 mV Vsense 5 mV AM04521 The output voltage accuracy, expressed as a percentage, can be calculated with the following formula, abs ( V out – ( Av ⋅ V sense ) ) ΔV out = -------------------------------------------------------------------------Av ⋅ V sense with 20 V/V, 25 V/V, 50 V/V or 100 V/V depending on the configuration of the SEL1 and SEL2 pins. 14/23 Doc ID 16873 Rev 1 TSC103 5 Maximum permissible voltages on pins Maximum permissible voltages on pins The TSC103 can be used in either single- or dual-supply configuration. The dual-supply configuration is achieved by disconnecting Vcc- and Gnd, and connecting Vcc- to a negative supply. Figure 8 illustrates how the absolute maximum voltages on input pins Vp and Vm are referred to the Vcc- potential, while the maximum voltages on the positive supply pin, gain selection pins and output pins are referred to the Gnd pin. It should also be noted that the maximum voltage between Vcc- and Vcc+ is limited to 15 V. Figure 8. Maximum voltages on pins Vp and Vm +75 V SEL1, SEL2 and Out Vcc- Vcc+ Vcc+ +15 V +7 V Vcc+ + 0.3 V Gnd Gnd -0.3V -0.3 V Vcc+ SEL1, SEL2 and Out Vcc- -16 V Vp and Vm AM04522 Doc ID 16873 Rev 1 15/23 Application information 6 TSC103 Application information The TSC103 can be used to measure current and to feed back the information to a microcontroller. Figure 9. Single-supply configuration schematic Vsense Iload Vp Common-mode voltage: 2.9 V to 70 V load Rsense 5V Vcc+ Vm Out SEL1 TSC103 SEL2 Vcc- Gnd Vcc Vout µ Controller ADC GPIO1 GPIO2 Gnd AM04517 The current from the supply flows to the load through the Rsense resistor causing a voltage drop equal to Vsense across Rsense. The amplifier’s input currents are negligible, therefore its inverting input voltage is equal to Vm. The amplifier's open-loop gain forces its non-inverting input to the same voltage as the inverting input. As a consequence, the amplifier adjusts current flowing through Rg1 so that the voltage drop across Rg1 matches Vsense exactly. Therefore, the drop across Rg1 is: VRg1 = Vsense = Rsense.Iload If IRg1 is the current flowing through Rg1, then IRg1 is given by the formula: IRg1 = Vsense/Rg1 The IRg1 current flows entirely into resistor Rg3 (the input bias current of the buffer is negligible). Therefore, the voltage drop on the Rg3 resistor can be calculated as follows. VRg3 = Rg3.IRg1 = (Rg3/Rg1).Vsense Since the voltage across the Rg3 resistor is buffered to the Out pin, Vout can be expressed as: Vout = (Rg3/Rg1).Vsense or: Vout = (Rg3/Rg1).Rsense.Iload 16/23 Doc ID 16873 Rev 1 TSC103 Application information The resistor ratio Rg3/Rg1 is internally set to 20 V/V for TSC103A, to 50 V/V for TSC103B and to 100 V/V for TSC103C. Since they define the full-scale output range of the application, the Rsense resistor and the Rg3/Rg1 resistor ratio (equal to Av) are important parameters and must therefore be selected carefully. Doc ID 16873 Rev 1 17/23 Package information 7 TSC103 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 18/23 Doc ID 16873 Rev 1 TSC103 7.1 Package information SO-8 package information Figure 10. SO-8 package mechanical drawing Table 10. SO-8 package mechanical data Dimensions Ref. Millimeters Min. Typ. A Inches Max. Min. Typ. 1.75 0.069 A1 0.10 A2 1.25 b 0.28 0.48 0.011 0.019 c 0.17 0.23 0.007 0.010 D 4.80 4.90 5.00 0.189 0.193 0.197 E 5.80 6.00 6.20 0.228 0.236 0.244 E1 3.80 3.90 4.00 0.150 0.154 0.157 e 0.25 Max. 0.004 0.010 0.049 1.27 0.050 h 0.25 0.50 0.010 0.020 L 0.40 1.27 0.016 0.050 L1 k ccc 1.04 0 0.040 8° 0.10 Doc ID 16873 Rev 1 1° 8° 0.004 19/23 Package information 7.2 TSC103 TSSOP-8 package information Figure 11. TSSOP8 package mechanical drawing Table 11. TSSOP8 package mechanical data Dimensions Ref. Millimeters Min. Typ. A Max. Min. Typ. 1.20 A1 0.05 A2 0.80 b Max. 0.047 0.15 0.002 1.05 0.031 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.008 D 2.90 3.00 3.10 0.114 0.118 0.122 E 6.20 6.40 6.60 0.244 0.252 0.260 E1 4.30 4.40 4.50 0.169 0.173 0.177 e 0° L 0.45 aaa 1.00 0.65 k L1 20/23 Inches 0.60 0.006 0.039 0.041 0.0256 8° 0° 0.75 0.018 1 8° 0.024 0.030 0.039 0.10 Doc ID 16873 Rev 1 0.004 TSC103 Ordering information 8 Ordering information Table 12. Order codes Part number Temperature range TSC103IPT Package Packaging Marking TSSOP8 Tape & reel 103I SO-8 Tape & reel TSC103I TSSOP8 Tape & reel 103Y SO-8 Tape & reel TSC103Y -40° C, +125° C TSC103IDT TSC103IYPT(1) TSC103IYDT -40° C, +125° C Automotive grade 1. Qualification and characterization according to AEC Q100 and Q003 or equivalent, advanced screening according to AEC Q001 & Q002 or equivalent are on-going. Doc ID 16873 Rev 1 21/23 Revision history 9 TSC103 Revision history Table 13. 22/23 Document revision history Date Revision 04-Jan-2010 1 Changes Initial release. Doc ID 16873 Rev 1 TSC103 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. 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