INTEGRATED CIRCUITS DATA SHEET TZA3013A; TZA3013B SDH/SONET STM16/OC48 transimpedance amplifier Product specification Supersedes data of 2000 Jun 19 File under Integrated Circuits, IC19 2001 Feb 26 Philips Semiconductors Product specification SDH/SONET STM16/OC48 transimpedance amplifier TZA3013A; TZA3013B FEATURES APPLICATIONS • Low equivalent input noise, typically 8 pA/√Hz • Digital fibre optic receiver in short, medium and long haul optical telecommunications transmission systems or in high speed data networks • Wide dynamic range, typically 6 µA to 1.7 mA (p-p) • Differential transimpedance of 4 kΩ • Wide-band RF gain block. • Bandwidth from DC to 1.9 GHz • Differential outputs GENERAL DESCRIPTION • On-chip Automatic Gain Control (AGC) The TZA3013 is a transimpedance amplifier with AGC, designed to be used in STM16/OC48 fibre-optic links. It amplifies the current generated by a photo detector (PIN diode or avalanche photodiode) and converts it to a differential output voltage. • No external components required • Single supply voltage 3.3 V • Bias voltage for PIN diode • Remains linear up to 1.7 mA (p-p) input current (unclipped) • Switched output polarity available (types A and B). ORDERING INFORMATION TYPE NUMBER PACKAGE NAME DESCRIPTION VERSION TZA3013AU − bare die in waffle pack carriers; die dimensions 0.810 × 1.230 mm − TZA3013BU − bare die in waffle pack carriers; die dimensions 0.810 × 1.230 mm − 2001 Feb 26 2 Philips Semiconductors Product specification SDH/SONET STM16/OC48 transimpedance amplifier TZA3013A; TZA3013B BLOCK DIAGRAM AGC handbook, full pagewidth 100 pF DREF 1 4 VCC 270 Ω PILOT VCC 12 GAIN CONTROL 15 VCC PEAK DETECTOR 50 Ω TZA3013AU 50 Ω 2 kΩ IN 2 14 13 6 2 kΩ low noise amplifier single-ended to differential converter 5 OUTSENSE OUT OUTQ OUTQSENSE BIAS SOURCE 7, 8 GNDA 10 3 GNDD INQ 9 TESTC 11 MGT099 TESTD Fig.1 Block diagram of TZA3013AU (bare die only). AGC handbook, full pagewidth 100 pF DREF 1 4 VCC 270 Ω PILOT VCC 12 GAIN CONTROL 15 VCC PEAK DETECTOR 50 Ω TZA3013BU 50 Ω 2 kΩ IN 2 5 6 13 2 kΩ low noise amplifier single-ended to differential converter 14 OUTSENSE OUT OUTQ OUTQSENSE BIAS SOURCE 7, 8 GNDA 10 3 GNDD INQ 9 TESTC 11 TESTD Fig.2 Block diagram of TZA3013BU (bare die only). 2001 Feb 26 3 MGU137 Philips Semiconductors Product specification SDH/SONET STM16/OC48 transimpedance amplifier TZA3013A; TZA3013B PINNING PAD TZA3013AU PAD TZA3013BU DREF 1 1 analog output bias voltage output for PIN diode; connect cathode of PIN diode to this pad IN 2 2 input current input; anode of PIN diode should be connected to this pad; note 1 INQ 3 3 input decision level adjust input; note 1 AGC 4 4 analog output AGC voltage OUTQSENSE 5 14 analog output data sense output for OUTQ; for test purposes OUTQ 6 13 output data output; compliment of OUT GNDA 7 7 ground analog ground GNDA 8 8 ground analog ground TESTC 9 9 input test input; not used in the application GNDD 10 10 ground digital ground TESTD 11 11 input test input; not used in the application PILOT 12 12 analog output pilot tone detection current output OUT 13 6 output data output; compliment of OUTQ; note 2 OUTSENSE 14 5 analog output data sense output for OUT; for test purposes VCC 15 15 supply supply voltage SYMBOL TYPE DESCRIPTION Notes 1. DC bias voltage = 0.86 V. 2. This pad goes HIGH when current flows into pad IN. 2001 Feb 26 4 Philips Semiconductors Product specification SDH/SONET STM16/OC48 transimpedance amplifier TZA3013A; TZA3013B FUNCTIONAL DESCRIPTION The TZA3013 has a wide dynamic range to handle the signal current generated by the PIN diode which can vary from 6 µA to 1.7 mA (p-p). This is implemented by an AGC loop which reduces the preamplifier feedback resistance so that the amplifier remains linear over the whole input range. The AGC loop hold capacitor is integrated on-chip, so an external capacitor is not required. The TZA3013 is a transimpedance amplifier intended for use in fibre optic links for signal recovery in STM16/OC48 applications. It amplifies the current generated by a photo detector (PIN diode or avalanche photodiode) and converts it to a differential output voltage. The most important characteristics of the TZA3013 are high receiver sensitivity and wide dynamic range. High receiver sensitivity is achieved by minimizing transimpedance amplifier noise. A differential amplifier converts the output of the preamplifier to a differential voltage. The data output circuit is shown in Fig.3. The logic level symbol definitions are shown in Fig.4. VCC handbook, full pagewidth 50 Ω 50 Ω 2 kΩ 2 kΩ OUTSENSE OUTQSENSE OUT OUTQ 16 Ω 16 Ω MGT102 Fig.3 Data output circuit. VCC handbook, full pagewidth VO(max) VOQH VOH Vo(p-p) VOQL VOL VOO VO(min) MGR243 Fig.4 Logic level symbol definitions for data outputs OUT and OUTQ. 2001 Feb 26 5 Philips Semiconductors Product specification SDH/SONET STM16/OC48 transimpedance amplifier TZA3013A; TZA3013B PIN diode bias voltage DREF Pad DREF provides an easy bias voltage for the PIN diode. The voltage at DREF is derived from VCC by a low-pass filter comprising internal resistor R1 and external capacitor C2 which decouples any supply voltage noise. The value of external capacitor C2 affects the value of PSRR and should have a minimum value of 100 pF. Increasing this value increases the value of PSRR. The performance of an optical receiver is largely determined by the combined effect of the transimpedance amplifier and the PIN diode. In particular, the method used to connect the PIN diode to the input and the layout around the input pad strongly influences the main parameters of a transimpedance amplifier, such as sensitivity, bandwidth, and PSRR. Sensitivity is most affected by the value of the total capacitance at the input pad. Therefore, to obtain the highest possible sensitivity requires the value of total capacitance to be as low as possible by reducing the capacitance of the PIN diode and the parasitics around the input pad. To minimize parasitics, the PIN diode should be placed as close as physically possible to the IC. The capacitance of the PIN diode can be reduced by making the value of reverse voltage across it as high as possible. For a supply voltage of 3.3 V, the reverse voltage across the PIN diode is 2.438 V (3.3 V − 0.862 V). It is preferable to connect the cathode of the PIN diode to a voltage higher than VCC if there is one available on the PCB, leaving pad DREF unconnected. If a negative supply voltage is available, the configuration shown in Fig.6 can be used. It should be noted that in this configuration, the direction of the signal current is reversed to that shown in Fig.5. It is essential that the PIN diode bias voltage is correctly filtered to achieve the highest possible level of sensitivity. The PIN diode can be connected to the input in two ways. Figure 5 shows the PIN diode connected between pads DREF and IN. VCC handbook, halfpage DREF 1 C2 100 pF R1 VCC handbook, halfpage 30 270 Ω 270 Ω Ii 30 DREF 1 IN 2 IN 2 Ii TZA3013 TZA3013 MGT103 MGU120 Fig.5 negative supply The PIN diode connected between the input and pad DREF. 2001 Feb 26 Fig.6 6 The PIN diode connected between the input and a negative supply voltage. Philips Semiconductors Product specification SDH/SONET STM16/OC48 transimpedance amplifier TZA3013A; TZA3013B AGC When the AGC is inactive, the transimpedance is at its maximum value of 4 kΩ differential. When the AGC is active, the feedback resistor value of the transimpedance amplifier is reduced, reducing its transimpedance, to keep the output voltage constant. The transimpedance is regulated from 4 kΩ at low currents (Ii < 50 µA) to 80 Ω at high currents (Ii = 1.7mA). The AGC allows the amplifier to remain linear over the whole input current range compared to other configurations which clip the large signals, such as those using Schottky diodes, for example. The TZA3013 transimpedance amplifier can handle input currents from 6 µA to 1.7 mA which is equivalent to a dynamic range of 49 dB. At low input currents, the transimpedance must be high to obtain enough output voltage, and the noise should be low enough to guarantee a minimum bit error rate. At high input currents however, the transimpedance should be low to avoid pulse width distortion. To achieve the wide dynamic range requires the gain of the amplifier to depend on the level of the input signal. This is achieved in the TZA3013 by an AGC loop. The top half of Fig.7 shows the output voltage at pads OUT and OUTQ (VOUT and VOUTQ) as a function of DC input current (II) at a supply voltage of 3.3 V. The bottom half of Fig.7 shows the difference between VOUT and VOUTQ. The output voltage changes linearly up to an input current of 50 µA. At this point and above, the AGC becomes active and tries to keep the differential output voltage constant, which is about 220 mV for a large range input current of <1.7 mA. The AGC loop comprises a peak detector, a hold capacitor and a gain control circuit. The peak detector detects the amplitude of the signal and the hold capacitor stores it. The hold capacitor voltage is compared to a threshold voltage which corresponds to an input current of 50 µA (p-p). The AGC is only active when the input signal level is larger than the threshold level and is inactive when the input signal is smaller than the threshold level. MGT104 3.2 handbook, V full pagewidth o (V) VOUT 3.1 3.0 VCC = 3.3 V 2.9 VOUTQ 2.8 300 Vo(dif) (mV) 200 100 0 1 10 102 Vo(dif) = VOUT − VOUTQ Fig.7 AGC characteristics. 2001 Feb 26 7 103 Ii (µA) 104 Philips Semiconductors Product specification SDH/SONET STM16/OC48 transimpedance amplifier TZA3013A; TZA3013B LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL PARAMETER MAX. UNIT −0.5 +3.8 V pads IN and INQ −0.5 +2.0 V pads OUT and OUTQ −0.5 VCC + 0.5 V pads OUTSENSE and OUTQSENSE −0.5 VCC + 0.5 V pad PILOT −0.5 VCC + 0.5 V pad DREF −0.5 VCC + 0.5 V pads IN and INQ −4.0 +4.0 mA pads OUT and OUTQ −10 +10 mA pad PILOT −0.2 +0.2 mA pad DREF −4.0 +4.0 mA VCC supply voltage Vn DC voltage In MIN. DC current Ptot total power dissipation − 300 mW Tstg storage temperature −65 +150 °C Tj junction temperature − 150 °C Tamb ambient temperature −40 +85 °C HANDLING Inputs and outputs are protected against electrostatic discharge in normal handling. However it is good practice to take normal precautions appropriate to handling MOS devices (see “Handling MOS devices” ). CHARACTERISTICS Typical values at Tj = 25 °C and VCC = 3.3 V; minimum and maximum values are valid over the entire ambient temperature range and supply range; all voltages are measured with respect to ground; unless otherwise specified. SYMBOL PARAMETER VCC supply voltage ICC supply current Ptot total power dissipation Tj CONDITIONS MIN. TYP. MAX. UNIT 3.0 3.3 3.6 V AC-coupled; RL = 50 Ω; without input signal − 26 38 mA VCC = 3.3 V − 85.8 134 mW junction temperature −40 − +125 °C Tamb ambient temperature −40 +25 +85 °C Rtr small-signal transresistance measured differentially; of the receiver AC-coupled RL = ∞ 3.6 7 10 kΩ RL = 50 Ω 1.8 3.5 5.0 kΩ f−3dB(h) high frequency −3 dB point Ci = 0.5 pF 1.7 1.9 − GHz In(tot)(rms) total integrated RMS noise current over bandwidth referenced to input; ∆fi = 1.8 GHz third-order Bessel filter; note 1 − 425 − nA 2001 Feb 26 8 Philips Semiconductors Product specification SDH/SONET STM16/OC48 transimpedance amplifier SYMBOL PSRR PARAMETER TZA3013A; TZA3013B CONDITIONS MIN. TYP. MAX. UNIT power supply rejection ratio measured differentially; note 2 fi = 100 kHz to 100 MHz − 38 − µA/V fi = 3 GHz − 3.2 − mA/V Automatic gain control loop: AGC tatt AGC attack time − 10 − µs tdecay AGC decay time − 10 − µs referenced to input − 50 − µA tested at DC level 240 270 340 Ω −1700 − +1700 µA Ith(AGC)(p-p) AGC threshold current (peak-to-peak value) Bias voltage: DREF RDREF resistance between DREF and VCC Inputs: IN and INQ Ii(p-p) input current (peak-to-peak value) VI(bias) input bias voltage Ri small-signal input resistance 700 860 1100 mV tested at 1 MHz; Ii < 20 µA (p-p) − 53 − Ω Data outputs: OUT and OUTQ Vo(cm) common mode output voltage AC-coupled; RL = 50 Ω VCC − 0.5 VCC − 0.25 VCC − 0.1 V Vo(se)(p-p) single-ended load output voltage (peak-to-peak value) AC-coupled; RL = 50 Ω; Ii = 100 µA (p-p) 45 110 200 mV VOO differential output offset voltage −100 0 +100 mV Ro output resistance single-ended; DC tested 40 53 65 Ω tr rise time 20% to 80% − 200 − ps tf fall time 80% to 20% − 200 − ps Notes 1. Measurement performed with Ci = 0.5 pF comprising 0.4 pF (photodiode) and 0.1 pF (allowed for PCB layout). 2. PSRR is defined as the ratio of change in input current (∆Ii) corresponding to change in supply voltage (∆VCC): ∆I i PSRR = -------------∆V CC For example, a 4 mV disturbance on VCC at 10 MHz will typically add an extra 120 nA to Ii (photodiode output current). The value of the external capacitor connected between pads DREF and GND has a significant effect on the value of PSRR. The specification is valid with an external capacitor of 1 nF. 2001 Feb 26 9 Philips Semiconductors Product specification SDH/SONET STM16/OC48 transimpedance amplifier TZA3013A; TZA3013B TYPICAL PERFORMANCE CHARACTERISTICS MGT105 33 CC (mA) 31 handbook, halfpage I MGT106 31 ICC handbook, halfpage (1) (mA) 29 29 (2) 27 27 25 25 (3) 23 23 21 −40 0 40 80 21 3.0 120 160 Tj (°C) (1) VCC = 3.6 V. (2) VCC = 3.3 V. (3) VCC = 3.0 V. Tj = 25 °C. Fig.8 Fig.9 Supply current as a function of the junction temperature. MGT107 866 3.4 3.2 VCC (V) 3.6 Supply current as a function of the supply voltage. MGT108 965 I(bias) (mV) 925 handbook, halfpage V handbook, halfpage VI(bias) (mV) 864 885 845 862 805 860 765 858 3.0 3.2 3.4 VCC (V) 725 −40 3.6 (1) (2) (3) 0 40 80 120 160 Tj (°C) (1) VCC = 3.6 V. Tj = 25 °C. (2) VCC = 3.3 V. (3) VCC = 3.0 V. Fig.10 Input bias voltage as a function of the supply voltage. Fig.11 Input bias voltage as a function of the junction temperature. 2001 Feb 26 10 Philips Semiconductors Product specification SDH/SONET STM16/OC48 transimpedance amplifier TZA3013A; TZA3013B MGT109 290 MGT110 340 handbook, halfpage handbook, halfpage Vo(cm) Vo(cm) (mV) (mV) 270 (1) (2) (1) 300 250 (2) 260 230 (3) 220 210 190 3.0 3.2 3.4 VCC (V) 180 −40 3.6 40 80 120 160 Tj (°C) (1) VCC = 3.6 V. (2) VCC = 3.3 V. (3) VCC = 3.0 V. Tj = 25 °C. (1) VCC − VOUT. (2) VCC − VOUTQ. Fig.13 Common mode output voltage as a function of the junction temperature referenced to VCC. Fig.12 Common mode output voltage as a function of the supply voltage referenced to VCC. 2001 Feb 26 0 11 Philips Semiconductors Product specification SDH/SONET STM16/OC48 transimpedance amplifier TZA3013A; TZA3013B APPLICATION AND TEST INFORMATION 10 µH handbook, full pagewidth VP 1 nF 680 nF VCC 15 DREF transmission line 1 13 100 pF OUT Zo = 50 Ω OUTQ Zo = 50 Ω 100 nF TZA3013A IN 6 2 100 nF R3 50 Ω 7, 8, 10 R4 50 Ω GND MGT112 Fig.14 Application diagram. handbook, full pagewidth NETWORK ANALYZER S-PARAMETER TEST SET PORT 1 PORT 2 Zo = 50 Ω Zo = 50 Ω VCC 100 nF PATTERN GENERATOR OUT 10 nF 330 Ω 223−1 PRBS DATA R SAMPLING OSC IN TZA3013 1 OUTQ 60 Ω GND 100 nF 2 Zo = 50 Ω 223−1 PRBS CLOCK MGT113 Total impedance of the test circuit = ZT and is calculated by the equation Z T = s 21 × ( R + Z IN ) × 2 where s21 is the insertion loss of ports 1 and 2. Typical values: R = 330 Ω, ZIN = 73 Ω. Fig.15 Test circuit. 2001 Feb 26 12 trigger input Philips Semiconductors Product specification SDH/SONET STM16/OC48 transimpedance amplifier TZA3013A; TZA3013B BONDING PAD LOCATIONS COORDINATES(1) SYMBOL DREF PAD TZA3013AU 1 PAD TZA3013BU 1 x y −440 +155 IN 2 2 −440 +10 INQ 3 3 −440 −157 AGC 4 4 −266 −255 OUTQSENSE 5 − −40 −255 − 14 −40 +255 OUTQ 6 − +116 −255 − 13 +110 +255 GNDA 7 7 +256 −255 GNDA 8 8 +398 −255 TESTC 9 9 +448 −79 GNDD 10 10 +448 +70 TESTD 11 11 +410 +255 PILOT 12 12 +260 +255 OUT 13 − +110 +255 − 6 +116 −255 OUTSENSE 14 − −40 +255 − 5 −40 −255 VCC 15 15 −266 +255 Note 1. All coordinates are referenced, in µm, to the centre of the die. 2001 Feb 26 13 Philips Semiconductors Product specification IN INQ x 2 0 10 GNDD 9 TESTC 0 3 5 6 7 1 IN 2 INQ 3 810 µm y 4 DREF 15 14 8 12 11 x 0 10 GNDD 9 TESTC 0 y AGC GNDA GNDA OUTQ OUTQSENSE AGC 13 TZA3013BU 4 1230 µm TESTD TZA3013AU 5 6 7 8 GNDA 810 µm 1 PILOT DREF GNDA 11 OUTQ TESTD 12 OUT PILOT 13 OUTQSENSE OUT 14 handbook, halfpage OUTSENSE OUTSENSE 15 handbook, halfpage TZA3013A; TZA3013B VCC VCC SDH/SONET STM16/OC48 transimpedance amplifier 1230 µm MGT101 MGT167 Fig.16 Bonding pad locations of the TZA3013AU. Fig.17 Bonding pad locations of the TZA3013BU. Physical characteristics of the bare die PARAMETER VALUE Glass passivation 0.3 µm PSG (PhosphoSilicate Glass) on top of 0.8 µm silicon nitride Bonding pad dimension minimum dimension of exposed metallization is 90 × 90 µm (pad size = 100 × 100 µm) except pads 2 and 3 which have exposed metallization of 80 × 80 µm (pad size = 90 × 90 µm) Metallization 2.8 µm AlCu Thickness 380 µm nominal Size 0.810 × 1.230 mm (0.996 mm2) Backing silicon; electrically connected to GND potential through substrate contacts Attach temperature <440 °C; recommended die attach is glue Attach time <15 s 2001 Feb 26 14 Philips Semiconductors Product specification SDH/SONET STM16/OC48 transimpedance amplifier TZA3013A; TZA3013B DATA SHEET STATUS DATA SHEET STATUS PRODUCT STATUS DEFINITIONS (1) Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Note 1. Please consult the most recently issued data sheet before initiating or completing a design. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. DEFINITIONS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. BARE DIE DISCLAIMER All die are tested and are guaranteed to comply with all data sheet limits up to the point of wafer sawing for a period of ninety (90) days from the date of Philips' delivery. If there are data sheet limits not guaranteed, these will be separately indicated in the data sheet. There is no post waffle pack testing performed on individual die. Although the most modern processes are utilized for wafer sawing and die pick and place into waffle pack carriers, Philips Semiconductors has no control of third party procedures in the handling, packing or assembly of the die. Accordingly, Philips Semiconductors assumes no liability for device functionality or performance of the die or systems after handling, packing or assembly of the die. It is the responsibility of the customer to test and qualify their application in which the die is used. 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