TEMIC U2896B

U2896B
Modulation PLL for GSM, DCS and PCS Systems
Description
The U2896B is a monolithic integrated circuit. It is
realized using TEMIC’s advanced silicon bipolar UHF5S
technology. The device integrates a mixer, an I/Q
modulator, a phase-frequency detector (PFD) with two
synchronous programmable dividers, and a charge pump.
The U2896B is designed for cellular phones such as
GSM900, DCS1800, and PCS1900, applying a
transmitter architecture at which the VCO operates at the
TX output frequency. No duplexer is needed since the
out-of-band noise is very low. The U2896B exhibits low
power consumption. Broadband operation gives high
flexibility for multi-band frequency mappings. The IC is
available in a shrinked small-outline 36-pin package
(SSO36).
Features
Benefits
D Supply voltage range 2.7 V to 5.5 V
D
D
D
D
D
D
Electrostatic sensitive device.
Observe precautions for handling.
D Current consumption 50 mA
D Power-down functions
D High-speed PFD and charge pump (CP)
D Small CP saturation voltages (0.5/0.6 V)
D Programmable dividers and CP polarity
Novel TX architecture saves filter costs
Extended battery operating time without duplexer
Less board space (few external components)
VCO control without voltage doubler
Small SSO36 package
One device for all GSM bands
D Low-current standby mode
Block Diagram
VS1 GND1 I NI
6
5 1
2
36
NMDO
PU
35
NMIXOMIXO PUMIX MIXLO
23
33 34
32
25
LO
MDLO 3
NMDLO 4
MDO
Q NQ
Mixer
VRef
90°
24
31
7
29
28
8
Modulator
30
N
10
22
ND
21
NND
VS3
RF
NRF
GND3
VSP
1:2
MUX
15
RD
NMIXLO
Charge
pump
PFD
11
CPO
R
16
1:2
NRD
12
GNDP
Mode control
17
MC
27
26
VS2 GND2
13
CPCL
14
CPCH
14891
Figure 1. Block diagram
Rev. A1, 18-Sep-98
1 (13)
Preliminary Information
U2896B
Ordering Information
Extended Type Number
U2896B-MFCG3
Package
SSO36
Pin Description
I
1
36 Q
NI
2
35 NQ
MDLO
3
34 PUMIX
NMDLO
4
33 MIXO
GND1
5
32 NMIXO
VSI 1)
6
31 VS3 1)
MDO
7
30 GND3
NMDO
8
29 RF
SUB
9
28 NRF
VSP 10
27 VS2 1)
CPO 11
26 GND2
GNDP 12
25 MIXLO
CPCL 13
24 NMIXLO
CPCH 14
23 PU
RD 15
22 ND
NRD 16
21 NND
MC 17
20 n.c.
n.c. 18
19 n.c.
14892
Figure 2. Pinning
Remarks
Taped and reeled
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Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
1)
Symbol
I
NI
MDLO
NMDLO
GND1
VS1 1)
MDO
NMDO
SUB
VSP
CPO
GNDP
CPCL
Function
In-phase base band-input
Complementary to I
I/Q-modulator LO input
Complementary to MDLO
Ground
Supply I/Q modulator
I/Q modulator
Complementary to MDO
Substrate, connected to GND
Supply charge pump
Charge pump output
Ground
Charge pump current control
GSM1800
CPCH
Charge pump current control
GSM900
RD
R-divider input
NRD
Complementary to RD
MC
Mode control
n.c.
Not connected
n.c.
Not connected
n.c.
Not connected
NND
Complementary to ND
ND
N-divider input
PU
Power-up. whole chip, except
mixer
NMIXLO Complementary to MIXLO
MIXLO Mixer LO input
GND2
Ground
1)
VS2
Supply (MISC)
NRF
Complementary to RF
RF
Mixer RF input
GND3
Ground
VS3 1)
Supply mixer
NMIXO Complementary to MIXO
MIXO
Mixer output
PUMIX Power-up mixer
NQ
Complementary to Q
Q
Quad-phase base-band input
Between the Pins VS1, VS2 and VS3 the allowed
maximum voltage is ≤ 200 mV
2 (13)
Rev. A1, 18-Sep-98
Preliminary Information
U2896B
Absolute Maximum Ratings
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Parameters
Supply voltage VS1, VS2, VS3
Supply voltage charge pump VSP
Voltage at any input
Current at any input / output pin
except CPC
CPC output currents
Ambient temperature
Storage temperature
Symbol
VVS#
VVSP
VVi#
| II# | | IO# |
–0.5
| ICPC |
Tamb
Tstg
Value
VVSP
5.5
VVi# VVS# +5.5
2
Unit
V
V
V
mA
5
–20 to +85
–40 to +125
mA
°C
°C
Operating Range
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Thermal Resistance
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Electrical Characteristics
Parameters
Supply voltage
Supply voltage
Ambient temperature
Symbol
VVS#
VVSP
Tamb
Value
2.7 to 5.5
2.7 to 5.5
–20 to +85
Unit
V
V
°C
Parameters
Junction ambient SSO36
Symbol
RthJA
Value
130
Unit
K/W
VS = 2.7 to 5.5 V, Tamb = –20°C to +85°C, final test at 25°C
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Parameters
DC supply
Supply voltages VS#
Supply voltage VSP
Supply
pp y current IVS1
Test Conditions / Pin
VVS1 = VVS2 = VVS3
Active (VPU = VS)
Standby (VPU = 0)
Supply
pp y current IVS2
Active (VPU = VS)
Standby (VPU = 0)
Supply
pp y current IVS3
Active (VPUMIX = VS)
Standby (VPUMIX = 0)
Supply current IVSP 1)
Active
(VPU = VS, CPO open)
Standby (VPU = 0)
N & R divider inputs ND, NND & RD, NRD
N:1 divider frequency
50- source
R:1 divider frequency
50- source
Input impedance
Active & standby
Input sensitivity
50- source
Input capacitance
Active & standby
1)
2)
Symbol
Min.
VVS#
VVSP
IVS1A
IVS1Y
IVS2A
IVS2Y
IVS3A
IVS3Y
IVSPA
2.7
VVS# – 0.3
17
17
13
1.4
IVSPY
fND
fRD
ZRD, ZND
VRD, VND
CRD, CND
Typ.
100
100
1
5 2)
Max.
Unit
5.5
5.5
22
20
22
20
17
30
1.8
V
V
mA
A
mA
A
mA
A
mA
20
A
600
600
MHz
MHz
k
mVrms
pF
200
0.5
Mean value, measured with FND = 151 MHz, FRD = 150 MHz, current vs. time, see page 6, figure 3
For optimized noise performance this voltage level may be higher
Rev. A1, 18-Sep-98
3 (13)
Preliminary Information
U2896B
Electrical Characteristics (continued)
VS = 2.7 to 5.5 V, Tamb = –20°C to +85°C, final test at 25°C
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Parameters
Test Conditions / Pin
Phase-frequency detector (PFD)
PFD operation
fND = 600 MHz, N = 2
fRD = 600 MHz, R = 2
Frequency comparison
fND = 600 MHz, N = 2
only 4)
fRD = 450 MHz, R = 2
I/Q modulator baseband inputs I, NI & Q, NQ
DC voltage
Referred to GND
MD_IQ
AC voltage 5)
Frequency range
Referred to GND
AC voltage
Differential (preferres)
I/Q modulator LO input MDLO
MDLO
Frequency range
Input impedance
Active & standby
Input level
50- source
I/Q modulator outputs MDO, NMDO
DC current
VMDO, VNMDO = VS
Internal pull-up resistor
Voltage compliance
VMDO, VNMDO = VC
MDO output level
615 to VS 6)
(differential)
1.5 pF external load
Carrier suppression 6)
Sideband suppression 6)
IF spurious 6)
fLO ± 3 fmod
6)
Noise
@ 400 kHz off carrier
Frequency range
Mixer (900 MHz)
RF input level
900 MHz
Output resistance
LO-spurious at
@ P9MIXLO = –10 dBm
RF/NRF port
@ P9RF = –15 dBm
MIXLO input level
0.05 to 2 GHz
MIXO
Frequency range
Output level 7) differen- @ P9MIXLO = –15 dBm
tial
Carrier suppression
@ P9MIXLO = –15 dBm
4)
5)
6)
7)
Symbol
Min.
fPFD
50
Typ.
fFD
VI, VNI, VQ, VNQ
1.35
fIO
ACI, ACNI,
ACQ, ACNQ
ACDI, ACDQ
0
fMDLO
ZMDLO
PMDLO
100
–14
IMDO, INMDO
RMDO, RNMDO
VCMDO, VCNMDO VS – 0.7
PMDO
40
CSMDO
SSMDO
SPMDO
NMDO
fMDO
–32
–35
P9RF
RMIXO, RNMIXO
SP9RF
–23
P9MIXLO
fMIXO
P9MIXO
–22
50
CS9MIXO
–20
VS1/2
Max.
Unit
300
MHz
400
MHz
VS1/2
+ 0.1
1
V
200
MHz
mVpp
400
mVpp
450
3
–11
–5
0.8
615
–35
–40
–50
100
MHz
k
dBm
mA
5.5
60
V
mVrms
–45
–115
450
dBc
dBc
dBc
dBc/Hz
MHz
–17
dBm
–40
dBm
–12
450
dBm
MHz
mVrms
650
80
dBc
PFD can be used as a frequency comparator until 300 MHz for loop acquisition
Single-ended operation (complementary baseband input is AC-grounded) leads to reduced linearity
(degrading suppression of odd harmonics)
With typical drive levels at MDLO- & I/Q-inputs
–1 dB compression point C = 1.5 pF to GND
4 (13)
Rev. A1, 18-Sep-98
Preliminary Information
U2896B
Electrical Characteristics (continued)
VS = 2.7 to 5.5 V, Tamb = –20°C to +85°C, final test at 25°C
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Parameters
Test Conditions / Pin
Symbol
Mixer (1900 MHz)
Output resistance
RMIXO, RNMIXO
RF input level
0.5 to 2 GHz
P19RF
LO-spurious at
@ P19MIXLO = –10 dBm
SP19RF
RF/NRF ports
@ P19RF = –15 dBm
MIXLO input level
0.05 to 2 GHz
P19MIXLO
MIXO
Output level 8) differen- @ P19MIXLO = –17 dBm
P19MIXO
tial
Carrier suppression
@ P19MIXLO = –17 dBm
CS19MIXO
Charge-pump output CPO (VVSP = 5 V; VCPO = 2.5 V)
Pump-current
RCPCH 9) = 4.7 kΩ
| ICPO_H |
p
ppulse
RCPCL 10) = 2.4 kΩ
| ICPO_L |
Sensivity to VVSP
SICPO
I
V VSP
| CPO |
|
|
I CPO
V VSP
VCPO voltage range
| ICPO | degradation <
10%
(VVSP = 2.7 V to 5 V)
VCPO
Mode control
Sink current
VMC = VS
IMC
Power-up input PU (power-up for all functions, except mixer)
Settling time
Output power within 10%
SPU
of steady state values
High level
Active
VPUH
Low level
Standby
VPUL
High-level current
Active, VPUH = 2.2 V
IPUH
Low-level current
Standby, VPUL = 0.4 V
IPUL
Power-up input PUMIX (power-up for mixer only)
Settling time
Output power within 10%
tsetl
of steady state values
High level
Active
VPUMIXH
Low level
Standby
VPUMIXL
High-level current
Active, VPUMIXH = 2.2 V
IPUMIXH
Low-level current
Standby,
IPUMIXL
VPUMIXL = 0.4 V
8)
9)
10)
Min.
Typ.
Max.
Unit
–23
–17
–40
dBm
dBm
–22
–12
dBm
650
70
mVrms
–20
1.4
3
dBc
2
4
0.5
2.6
5
0.1
mA
mA
–
VVSP–0.6
V
60
5
2.0
0
–1
5
2.0
0
0.1
–1
A
10
s
0.4
70
20
V
V
A
A
10
s
0.4
70
20
V
V
A
A
– 1 dB compression point C = 1.5 pF to GND
RCPCH: external resistor to GND for charge-pump current control (MODE 1, 5, only Pin 14 active)
RCPCL: external resistor to GND for charge-pump current control (MODE 2, 3, 4, only Pin 13 active)
Rev. A1, 18-Sep-98
5 (13)
Preliminary Information
U2896B
Supply Current of the Charge Pump IVSP vs. Time
Due to the pulsed operation of the charge pump, the
current into the charge-pump supply pin VSP is not
constant. Depending on I (see figure 5) and the phase
difference at the phase detector inputs, the current IVSP
over time varies. Basically, the total current is the sum of
the quiescent current, the charge-/discharge current, and
– after each phase comparison cycle – a current spike (see
figure 3).
Up
Down
2.5 ICPCO
IVSP 1.5 I
CPCO
I
t
Internal current |ICPC| vs. RCPC
19.2 kW
9.6 kW
4.8 kW
2.4 kW
RCPC
ICPCO
|ICPCO|
0.5 mA
1 mA
2 mA
4 mA
ICPO
t
–ICPCO
14913
Figure 3. Supply current of the charge pump
(typical values)
Mode Selection
The device can be programmed to different modes via an external resistor RMODE (including short, open) from Pin
MC to VS2. The mode is distinguished from specific N-, R-divider ratios, and the polarity of the charge-pump selection.
Mode Selection
Mode
1
2
3
4
5
1)
2)
3)
4)
N-Divider
R-Divider
Resistance
between Pin MC
and Pin VS2
0 (<50 W)
2.7 kW (±5%)
10 kW (±5%)
47 kW (±5%)
∞ (> MW)
1:1
1:1
1:1
2:1
2:1
1:1
1:1
2:1
2:1
2:1
CPO Current Polarity 4)
fn < fR 1)
fn > fR 1)
sink
source
source
source
sink
source
sink
sink
sink
source
Application
CPCH
active
t.b.d.
t.b.d.
t.b.d.
PCN/ PCS 2)
GSM 3)
x
CPCL
active
x
x
x
x
Frequencies referred to PFD input
LO frequencies below VCO frequency
LO frequencies above VCO frequency
Sink current into Pin CPO. Source: current out from Pin CPO.
6 (13)
Rev. A1, 18-Sep-98
Preliminary Information
U2896B
Equivalent Circuits at the IC’s Pins
2 x 615 W
VS1
VBias_MDLO
MDO
NMDO
2230 Ω
2230 Ω
I,Q
MDLO
NI, NQ
VRef_input
VRef_MDLO
VRef_output
GND
Baseband inputs
LO input
Output
14893
Figure 4. I/Q modulator
1 kΩ
1 kΩ
VBias_RF
RF
890 Ω
VBias_LO
890 Ω
1.6 kΩ
VS3
650 W
650 W
1.6 kΩ
NMIXO
NRF
MIXO
MIXLO
VRef_RF
VRef_LO
GND
RF input
LO output
Output
14894
Figure 5. Mixer
VSP
4
4
up
Ref
CPCL
down
I
CPO
Ref
I
VRef
n
n
CPCH
n
GNDP
= Transistor with an emitter area–factor of “n”
14896
Figure 6. Charge pump
Rev. A1, 18-Sep-98
7 (13)
Preliminary Information
U2896B
VS2
ND/RD
2 kΩ
2 kΩ
20 kΩ
PU, PUMIX
NND/NRD
VRef_div
GND
14899
GND
14897
Figure 7. Dividers
Figure 8. Power-up
VS2
N–divider
Logic
C (U) ≅
0.5 pF @ 2 V
R–divider
C (U) is a non-linear junction capacitance
MUX
MC
14900
Figure 10. ESD-protection diodes
2x
60 µA
GND
14898
Figure 9. Mode control
8 (13)
Rev. A1, 18-Sep-98
Preliminary Information
U2896B
Application Hints
Mode Control
Interfacing
For some of the baseband ICs it may be necessary to
reduce the I/Q voltage swing so that it can be handled by
the U2896B. In those cases, the following circuitry can be
used.
U2896B
VS2
R1
I
VS2
I
R1
Baseband IC
U2896B
R2
RMode
C
NI
NI
Q
Q
R1
NQ
R2
RMode1
U2896B
RMode2
MC
C
a) any single mode
MC
b) any 2 modes
NQ
R1
U2896B
U2896B
14901
VS2
Figure 11. Interfacing the U2896B to I/Q baseband circuits
VS2
RMode
Due to a possible current offset in the differential baseband inputs of the U2896B the best values for the carrier
suppression of the I/Q modulator can be achieved with
voltage driven I/NI-, and Q/NQ-inputs. A value of
Rsource = R2/2*RS 1.5 kW should be realized. RS is the
sum of R1 (above drawing) and the output resistance of
the baseband IC.
v
MC
RMode
MC
c) any mode
& mode 5
36 kΩ or
10 kΩ
d) mode 5 & mode 3 or mode 4
14895
Figure 12. Application examples for programming
different modes
Rev. A1, 18-Sep-98
9 (13)
Preliminary Information
U2896B
Test Circuit
V2
450 mVpp
V5
450 mVpp
R1
V4
1.35V
V3
1.35V
R12
R2
C1
200MHz
–10dBm
R11
36
1
R3
C2
2
35
3
34
4
33
5
32
6
31
3V
C7
C8
C3
3V
3V
C9
7
30
8
29
28
9
C10
900MHz
–15dBm
C11
U2896B
3V, 5V
27
10
3V
C12
C4
11
26
12
25
R4
V7
1.5V
13
24
14
23
15
22
C13
C14
R13
1100MHz
–15dBm
R5
R6
C5
200.1MHz
–15dBm
R7
3V
R8
R9
R10
C6
16
21
17
20 n.c.
n.c. 18
19 n.c.
3V
C15
C16
R14
200MHz
–15dBm
14903
Figure 13. Test circuit
10 (13)
Rev. A1, 18-Sep-98
Preliminary Information
U2896B
Application Circuit for DCS1800 (1710 – 1785 MHz)
R9
R1
36
1
Baseband
C12
C1
R3
R2
C2
2nd LO
–10dBm
C3
2
35
3
34
4
33
5
32
6
31
Baseband
R8 R10
3V
C4
3V
3V
C13
7
30
8
29
C15
28
9
VCO
C14
880 to 915MHz
1710 to 1785MHz
–20dBm
U2896B
3V, 5V
27
10
3V
C16
C5
Tuning voltage
11
26
12
25
C6
R4
C7
13
24
14
23
15
22
C17
1st LO
–15dBm
C18
R5
3V
R6
C9
C8
L1
L2
C19
C11
C10
16
21
17
20
n.c.
19
n.c.
R7
3V
C20
n.c. 18
L3
C29
14904
Figure 14. Application circuit
Modulation Spectrum & Phase Error
Measurements
CPC: 1 kΩ to GND
Modulation-Loop Settling Time
As valid for all PLL loops the settling time depends on
several factors. The following figure is an extraction from
measurements performed in an arrangement like the
application circuit. It shows that a loop settling time of a
few ms can be achieved.
CPC ‘open’
Vertical: VCO tuning voltage 1 V/Div
Horizontal: Time 1 ms/Div
Rev. A1, 18-Sep-98
11 (13)
Preliminary Information
U2896B
Package Information
5.6
5.2
4.5
4.3
Package SSO36
Dimensions in mm
9.6
9.1
1.3
0.12
0.15
0.05
0.2
0.5
6.6
6.3
8.45
36
19
technical drawings
according to DIN
specifications
13047
1
18
12 (13)
Rev. A1, 18-Sep-98
Preliminary Information
U2896B
Ozone Depleting Substances Policy Statement
It is the policy of TEMIC Semiconductor GmbH to
1. Meet all present and future national and international statutory requirements.
2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems
with respect to their impact on the health and safety of our employees and the public, as well as their impact on
the environment.
It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as
ozone depleting substances ( ODSs).
The Montreal Protocol ( 1987) and its London Amendments ( 1990) intend to severely restrict the use of ODSs and
forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban
on these substances.
TEMIC Semiconductor GmbH has been able to use its policy of continuous improvements to eliminate the use of
ODSs listed in the following documents.
1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively
2 . Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental
Protection Agency ( EPA) in the USA
3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C ( transitional substances ) respectively.
TEMIC Semiconductor GmbH can certify that our semiconductors are not manufactured with ozone depleting
substances and do not contain such substances.
We reserve the right to make changes to improve technical design and may do so without further notice.
Parameters can vary in different applications. All operating parameters must be validated for each customer
application by the customer. Should the buyer use TEMIC products for any unintended or unauthorized
application, the buyer shall indemnify TEMIC against all claims, costs, damages, and expenses, arising out of,
directly or indirectly, any claim of personal damage, injury or death associated with such unintended or
unauthorized use.
TEMIC Semiconductor GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany
Telephone: 49 ( 0 ) 7131 67 2594, Fax number: 49 ( 0 ) 7131 67 2423
Rev. A1, 18-Sep-98
13 (13)
Preliminary Information