INTEGRATED CIRCUITS DATA SHEET UAA2062 Analog cordless telephone IC Product specification File under Integrated Circuits, IC17 2000 Aug 10 Philips Semiconductors Product specification Analog cordless telephone IC UAA2062 FEATURES Baseband TX section RF RX (double superheterodyne FM receiver) • Microphone amplifier • Integrated Low Noise Amplifier (LNA) with programmable gain and input impedance • Compressor • Programmable TX gain. • 1st mixer with external filter at 10.7 MHz Microcontroller interface • 2nd mixer with external filter at 455 or 450 kHz (depending on country application) • 3-wire serial interface. • FM detector including a fully integrated IF limiter, a wide-band PLL and a Received Signal Strength Indicator (RSSI) output Other features • Carrier Detector (CD) with programmable threshold. • Voltage regulator to supply internal PLLs and the microcontroller RF TX • Programmable low-battery detector time multiplexed with RSSI carrier detector. • Buffer driving an internal Power Amplifier (PA) with programmable gain APPLICATIONS • Narrow-band PLL including VCO • World-wide analog cordless telephone set (CT0). • Data transmission summing operational amplifier. Synthesizer GENERAL DESCRIPTION • 10.24 or 11.15 MHz crystal reference oscillator (LO2) and reference frequency divider The UAA2062 is a BiCMOS integrated circuit that performs all functions from the antenna to the microcontroller for reception and transmission for both the base station and the handset in a cordless telephone. • Programmable TX VCO with phase detector and frequency divider This IC integrates most of the functions required for a cordless telephone into a single integrated circuit. The implemented programming enables the device to be used for the CT0 standard in many countries. Additionally, the implemented programming significantly reduces the amount of external components, board space requirements and external adjustments. • Programmable RX VCO (LO1) with phase detector and frequency divider • Programmable clock divider with output buffer to drive the microcontroller. Baseband RX section • Programmable RX gain • Expander • Fully integrated earpiece amplifier with fixed gain. ORDERING INFORMATION PACKAGE TYPE NUMBER UAA2062TS 2000 Aug 10 NAME DESCRIPTION VERSION SSOP48 plastic shrink small outline package; 48 leads; body width 7.5 mm SOT370-1 2 Philips Semiconductors Product specification Analog cordless telephone IC UAA2062 BLOCK DIAGRAM handbook, full pagewidth ECAP VCC 1 TXPD 2 TXLF 3 MODO 4 14-BIT TX PROGRAMMABLE DIVIDER data TX MODI 48 Vref(PLL) REFERENCE DIVIDER (2048 or 892) TX PHASE DETECTOR RX PHASE DETECTOR 47 RXPD LO2 46 PLLGND 45 LO1O 14-BIT RX PROGRAMMABLE DIVIDER RX VCO 44 LO1I 5 43 RXLF LO1 VCC TXO 6 PAO 7 TXGND 8 42 RFI TX gain VBMOD BPFI TX mute PA 40 × LO1 LO3I hard limiter 9 TX VCO 38 RFGND × LO2 VREFTX ALC 36 MX2I compressor RSSI MICO 13 VB 14 Vref(PLL) VREFTX REG 3 V REG 3 V VB VB 32 PLLO VCO Vref LBD VCC CD LOOP FILTER amplifier 31 DETO VCC(AU) ECAP VB CDBDO 17 33 VCC(RF) × 16 CD/BD 34 LIMI LIM VBMOD VB VCC(AUTX) 15 35 RSSI RSSI UAA2062 microphone amplifier RX mute RX gain RSSI 30 RXI VB EN 18 VCC DATA 19 CLK 20 data amplifier expander MICROCONTROLLER SERIAL INTERFACE DATO crystal(1) LO2O 23 LO2I 24 VB 27 EARO DIVIDER CRYSTAL OSCILLATOR 26 EARI LO2 25 AUGND FCA120 (1) Values are depending on country application (see definition in Chapter “Channel frequencies”). Fig.1 Block diagram. 2000 Aug 10 VCC(AU) earpiece amplifier DATO 21 22 29 DATI 28 220 kΩ CLKO 1st IF filter(1) 37 MX2O CCAP CMPI 12 VB VCC 2nd mixer CCAP 11 MICI BPFI 39 MX1O 1st mixer VREFTX 10 VCC RF 41 VCC(LNA) LNA 3 2nd IF filter(1) Philips Semiconductors Product specification Analog cordless telephone IC UAA2062 PINNING SYMBOL ECAP SYMBOL PIN 1 DESCRIPTION 24 crystal oscillator input output pin for external capacitor from expander AUGND 25 ground for audio part EARI 26 earpiece amplifier inverting input EARO 27 earpiece amplifier output voltage 2 phase detector output voltage for TX PLL TXLF 3 input from loop filter to TX VCO MODO 4 summing amplifier output voltage MODI 5 summing amplifier inverting input TXO 6 TX baseband output voltage PAO 7 power amplifier output TXGND 8 ground for RF TX chain and PA LO3I 9 TX VCO input VREFTX 10 output pin for decoupling capacitor for regulated voltage for TX VCO 11 DESCRIPTION LO2I TXPD CCAP PIN output pin for external capacitor from compressor VCC(AU) 28 supply voltage for audio part DATI 29 data comparator input RXI 30 RX audio input voltage DETO 31 amplifier FM PLL output voltage PLLO 32 amplifier FM PLL inverting input VCC(RF) 33 supply voltage for RF RX LIMI 34 limiter input voltage RSSI 35 output pin for external capacitor from RSSI MX2I 36 2nd mixer input MX2O 37 2nd mixer output RFGND 38 ground for RF RX 39 1st mixer output voltage CMPI 12 compressor input voltage MX1O MICO 13 microphone amplifier output voltage BPFI 40 LNA output for external LC VCC(LNA) 41 supply voltage for LNA MICI 14 microphone amplifier inverting input RFI 42 LNA input voltage RXLF 43 input from loop filter to RX VCO VCC(AUTX) 15 supply voltage for TX audio LO1I 44 VB 16 internal voltage reference input pin to connect the external LC for RX VCO CDBDO 17 multiplexed output from carrier detector or low-battery detector LO1O 45 output pin to connect the external LC for RX VCO EN 18 enable signal for serial interface PLLGND 46 ground for digital part of the PLL DATA 19 data signal for serial interface RXPD 47 CLK 20 clock signal for serial interface phase detector output voltage for RX PLL DATO 21 data comparator output Vref(PLL) 48 CLKO 22 output pin for external clock LO2O 23 crystal oscillator output output pin for decoupling capacitor for regulated voltage for internal PLLs and microcontroller 2000 Aug 10 4 Philips Semiconductors Product specification Analog cordless telephone IC UAA2062 handbook, halfpage ECAP 1 48 Vref(PLL) TXPD 2 47 RXPD TXLF 3 46 PLLGND MODO 4 45 LO1O MODI 5 44 LO1I TXO 6 43 RXLF PAO 7 42 RFI 41 VCC(LNA) TXGND 8 LO3I 9 40 BPFI VREFTX 10 39 MX1O CCAP 11 38 RFGND CMPI 12 37 MX2O UAA2062 MICO 13 36 MX2I MICI 14 35 RSSI VCC(AUTX) 15 34 LIMI 33 VCC(RF) VB 16 CDBDO 17 32 PLLO EN 18 31 DETO DATA 19 30 RXI CLK 20 29 DATI DATO 21 28 VCC(AU) CLKO 22 27 EARO LO2O 23 26 EARI LO2I 24 25 AUGND FCA091 Fig.2 Pin configuration. 2000 Aug 10 5 Philips Semiconductors Product specification Analog cordless telephone IC UAA2062 FUNCTIONAL DESCRIPTION 1. In the active mode all blocks are powered. Power supply and power management 2. In the RX mode, all circuitry in the receiver part is powered. POWER SUPPLY VOLTAGE 3. In the standby mode, all circuitry is powered down except the crystal oscillator, the microcontroller interface and the Vref(PLL) block. The UAA2062 is used in a cordless telephone handset and in a base unit. The handset unit is battery powered and can operate on three NiCad cells. The minimum supply voltage (VCC) is 3.0 V. However the low-battery detector, crystal oscillator, clock divider and internal voltage regulator will function with a supply voltage of 2.85 V. 4. In the inactive mode, all circuitry is powered down except the microcontroller interface and the Vref(PLL) block. Latch memory is maintained in all modes. Table 1 shows which blocks are powered in each mode. POWER SAVING OPERATION MODES When the UAA2062 is used in a handset, it is important to reduce the current consumption. There are 3 power saving modes in addition to the active mode: Table 1 Power saving operation modes ACTIVE MODE RX MODE Microcontroller interface X X X X Vref(PLL) X X X(1) X(1) Crystal oscillator X X X − RF receiver and RX PLL X X − − VB reference X X − − Carrier and low-battery detectors X X − − Data comparator X X − − TX PLL and PA X − − − RX and TX audio paths X − − − CIRCUIT BLOCK STANDBY MODE INACTIVE MODE Note 1. In the standby mode and in the inactive mode, by default, Vref(PLL) remains regulated but is not calibrated (bit VREFPLL disable is logic 0). If bit VREFPLL disable is logic 1, Vref(PLL) is not regulated and fluctuates with VCC. MAXIMUM CURRENT CONSUMPTION Table 2 shows the typical and the maximum current consumption in the active mode and the three current saving modes under the following conditions: IP3 HIGH mode (bit IP3 is logic 1), see Table 6; LNA gain is step 3 (bits LNA are logic 11), see Table 12 and the PA output level is step 3 (bits PA are logic 11), see Table 15. In the standby mode and in the inactive mode, pin Vref(PLL) is not powered (bit VREFPLL disable is logic 1) and the clock output signal is disabled (bits clock divider ratio are logic 00). 2000 Aug 10 6 Philips Semiconductors Product specification Analog cordless telephone IC Table 2 UAA2062 Current consumption in the 4 operating modes (VCC = 3.6 V; Tamb = 25 °C); see Table 5 for programming of the power saving operation modes POWER OPERATING MODE TYPICAL CURRENT CONSUMPTION (mA) MAXIMUM CURRENT CONSUMPTION (mA) active mode 27 36 RX mode 11 15 standby mode 0.35 0.5 inactive mode 0.05 0.1 The FM receiver part FM RECEIVER The FM receiver has the programmability to operate for all country channels, including the 25 U.S. channels, without the need for external switching circuitry (see Fig.3). The gain and input impedance of the LNA are programmable. The LNA also includes a programmable capacitance to avoid external manual fine tuning. handbook, full pagewidth 1st IF filter(1) RF 2nd IF filter(1) RFI BPFI MX1O MX2I MX2O LIMI PLLO DETO 42 40 39 36 37 34 32 31 IF limiter × LNA × 1st mixer × LOOP FILTER 2nd mixer VCO DUAL PLL FREQUENCY SYNTHESIZER RSSI CRYSTAL OSCILLATOR RX VCO Vref 47 43 45 44 24 23 35 RXPD RXLF LO1O LO1I LO2I LO2O RSSI LPF crystal (1) (1) Values depend on the country application (see definition in Chapter “Channel frequencies”). Fig.3 FM receiver schematic diagram. 2000 Aug 10 7 amplifier carrier detect output FCA121 Philips Semiconductors Product specification Analog cordless telephone IC UAA2062 DATA COMPARATOR TRANSMIT VCO The data comparator is an inverting hysteresis comparator. An external filter is connected between pins DETO and DATI (AC-coupled). The open-collector output is current limited to control the output signal slew rate. The external resistor at pin DATO, connected to VCC, should be 220 kΩ. An external capacitor in parallel with this resistor will reduce the slew rate. Before the VCO, an amplifier sums the modulating signal and the data TX signal. The Colpitts type transmit VCO includes integrated varicaps. Fixed external capacitors are used to extend the tuning range for all countries. The internal capacitors are programmed via the serial bus interface. The power amplifier is capable of driving 50 Ω AC. The output level is also programmed with 2 bits via the serial bus interface. An internal regulator supplies the TX VCO. The transmit part The transmitter architecture is of the direct modulation type. The transmit VCO can be frequency modulated either by speech or data (see Fig.4). data TX handbook, full pagewidth MODI TXO 6 VCC(AUTX) MODO 5 4 VB 10 VREFTX REG 3 V VBMOD summing amplifier 7 PAO TX VCO PA 10.24 MHz TXPD 2 15 DUAL PLL FREQUENCY SYNTHESIZER 9 LO3I LPF TXLF 3 FCA122 Fig.4 Transmit schematic diagram. 2000 Aug 10 8 Philips Semiconductors Product specification Analog cordless telephone IC UAA2062 The synthesizer All counters power-up in the proper default state and for a 10.24 MHz reference crystal. Both RX and TX phase detectors have current drive type outputs of 400 µA. The synthesizer has been designed to support most country channel frequencies between 25 and 50 MHz (see Chapter “Channel frequencies”). The RX VCO is connected to an external capacitor and inductor as illustrated in Fig.5. The varicaps are integrated. The local oscillator LO2 and the reference divider provide the reference frequency for the RX and TX PLL loops. A single bit programmes the divider value for the reference divider. A 5 kHz reference frequency (respectively 12.5 kHz) is used with a 10.24 MHz crystal frequency (respectively 11.15 MHz). The clock divider ratio can be programmed to 2.5 or to 80. The ratio 80 can be chosen when the IC is in sleep mode to obtain current saving in the microcontroller. The clock output is a CMOS output inverter, supplied by Vref(PLL). Operating in the 25 US channels, there is a large frequency difference between the minimum and the maximum channel frequencies. The sensitivity of the RX VCO is not large enough to accommodate this large frequency range. Internal programmable capacitors can be connected across the RX VCO tank circuit to change the RX VCO sensitivity. The TX VCO also has internal programmable capacitors to accommodate a large frequency range. Chapter “Channel frequencies” shows the frequency selection for all countries. The 14-bit TX counter is programmed for the desired transmit channel frequency. The 14-bit RX counter is programmed for the desired RX VCO frequency. andbook, full pagewidth CLKO 22 1-BIT PROGRAMMABLE REFERENCE COUNTER /2048 or /892 CLOCK DIVIDER 24 LO2I crystal oscillator 9 LO3I 14-BIT PROGRAMMABLE RX COUNTER 14-BIT PROGRAMMABLE TX COUNTER RX PHASE DETECTOR C1 23 LO2O TX PHASE DETECTOR TX VCO 3 TXLF C6 R6 RXPD 47 R5 C5 R2 2 TXPD C2 C4 R3 43 C3 RXLF 44 LO1I RX VCO 45 LO1O FCA123 Fig.5 Synthesizer schematic diagram. 2000 Aug 10 9 Philips Semiconductors Product specification Analog cordless telephone IC UAA2062 The RX baseband EARPIECE AMPLIFIER This section covers the RX audio path from pins RXI to EARO. The RXI input signal is AC-coupled. The earpiece amplifier is an inverting rail-to-rail operational amplifier. The non-inverting input is connected to the internal reference voltage VB. Internal resistors are used to set the gain at 6 dB. An external resistor (connected between pins EARI and EARO) can be used to reduce the gain. The microcontroller sets the value of the RX gain by 32 linear steps of 0.5 dB. The RX baseband has a mute and an expander with the characteristics shown in Fig.7. handbook, full pagewidth ECAP EARI 1 26 earpiece amplifier RXI EARO 27 30 RX gain RX mute expander internal resistor : 28 kΩ external resistor FCA124 Fig.6 RX baseband schematic diagram. handbook, full pagewidth FCA127 EARO (dBV) 0 EARO = −7 dBV typical at THD = 5% −10 −20 −20 −30 −40 −40 −50 −60 −40 −30 −20 −10 (1) ∆GARX = 0 dB, GEAR = 0 dB (external resistor of 28 kΩ). Fig.7 Expander characteristic. 2000 Aug 10 10 0 RXI (dBV) Philips Semiconductors Product specification Analog cordless telephone IC UAA2062 The TX baseband The TX baseband has a compressor with the characteristic shown in Fig.9. The Automatic Level Control (ALC) provides a ‘soft’ limit to the output signal swing as the input voltage increases slowly (i.e. a sine wave is maintained at the output). A hard limiter clamps the compressor output voltage at 1.26 V (p-p). The ALC and the hard limiter can be disabled via the microcontroller interface. The hard limiter is followed by a mute circuit. The TX gain is digitally programmable in 32 steps of 0.5 dB. This section covers the TX audio path from pins MICI to TXO. The microphone amplifier is an inverting operational amplifier whose gain can be set by external resistors. The input signal at pin MICI and the output signal at pin MOCO are both AC-coupled. The non-inverting input is connected to the internal reference voltage VB. External resistors are used to set the gain and frequency response. CCAP handbook, full pagewidth 11 ALC MICI MICO CMPI TXO 14 13 12 6 FCA125 microphone amplifier hard limiter compressor TX mute TX gain Fig.8 TX baseband schematic diagram. handbook, full pagewidth TXO (dBV) VCMPI = −4 dBV; VTXO = −1.26 V(p-p) (hard limiting signals) 0 −10 −20 −30 VCMPI = −2.5 dBV VTXO = −11.5 dBV −20 VCMPI = −16 dBV; VTXO = −13 dBV (slowly changing ALC signals) −30 −40 −60 −50 −40 −30 −20 −10 0 CMPI (dBV) Fig.9 Compressor characteristic. 2000 Aug 10 11 FCA126 Philips Semiconductors Product specification Analog cordless telephone IC UAA2062 The comparator has a built-in hysteresis to prevent spurious switching. The precision of the detection depends on the divider accuracy, the comparator offset and the accuracy of the reference voltage VB. The output is multiplexed at pin CDBDO. When the battery voltage level is below the threshold voltage the output CDBDO is going LOW. Other features PLL VOLTAGE REGULATOR Pin Vref(PLL) provides the internal supply voltage for the RX and TX PLLs. It is regulated at 3 V. Pin VCC(AU) provides the supply voltage input for the internal voltage regulator. Two capacitors of 47 µF and 100 nF must be connected to pin Vref(PLL) to filter and stabilize this regulated voltage. The tolerance of the regulated voltage is initially ±8% but is improved to ±4% after the internal band gap voltage reference is adjusted via the microcontroller. Microcontroller serial interface Pins DATA, CLK and EN provide a 3-wire unidirectional serial interface for programming the reference counters, the transmit and receive channel divider counters and the control functions. The voltage regulator is always turned on. In the inactive mode the calibration is turned off to reduce current consumption. In this mode, the Vref(PLL) block supplies 300 µA to the microcontroller. The output drive capability is 3 mA. The voltage regulator is able to supply the microcontroller. The interface consists of 18-bit shift registers connected to a matrix of registers organized as 6 words of 18 bits. The leading 15 bits include the data D14 to D0. The trailing 3 bits set up the address AD2 to AD0. The data is entered with the most significant bit D14 first. The last bit is bit AD0. The local oscillator LO2 and the RX and TX phase detectors are powered by the internal voltage regulator at pin Vref(PLL). Therefore, the maximum input and output level for most I/O pins (LO2I and LO2O) equals the regulated voltage at pin Vref(PLL). Pins DATA and CLK are used to load data into the shift register. Figure 10 shows the timing required on all pins. Data is clocked into the shift registers on negative clock transitions. LOW-BATTERY DETECTOR The serial interface pins DATA, CLK and EN, are supplied by Vref(PLL). Internal level shifters are provided after the pins which allow the logic and registers to be internally powered by VCC(AU). The low-battery detector measures the voltage level of the VCC(AU) using a resistance divider and a comparator. One input of the comparator is connected to VB, the other to the middle point of the resistance divider. The ESD protection diodes on these pins are connected to VCC(AU). All the digital outputs (CDBDO and DATO) are open-collector outputs. data bits (15) handbook, full pagewidth D14 DATA address bits (3) D13 D12 AD1 AD0 tSU;DC CLK 50% 50% tHD;EC tEND tSU;CE EN tw 50% data bits latched MGR004 Fig.10 Digital signals timing requirement. 2000 Aug 10 12 Philips Semiconductors Product specification Analog cordless telephone IC UAA2062 DATA REGISTERS AND ADDRESSES Table 3 shows the data latches and addresses which are used to select each of the registers. bit D14 is the MSB and is written and loaded first. Table 3 ADDR Data register and addresses D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 001 − TX counter [13 to 0] 010 − RX counter [13 to 0] 011 voltage reference adjust [2 to 0] 100 test modes [2 to 0](1) 101 BD active 110 active modes [1 and 0] Clk Div [1 and 0] Ref Div IP3 LNA gain [1 and 0] LNA capacitor [3 to 0] low-battery detector threshold [2 to 0] D3 TX VCO capacitor selection[3 to 0] D2 D1 D0 − VREFPLL HLim disable LNA RIN [1 and 0] RX VCO capacitor [3 to 0] CD threshold control [4 to 0] PA [1 and 0] D4 FM PLL centre frequency shift [3 to 0] RX mute RX gain control[4 to 0] ALC TX disable mute TX gain control[4 to 0] Note 1. The three bits must be set at 000 in normal operation. Table 4 Data register default value ADDR D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 001 − 1 0 0 1 1 0 1 1 1 0 1 1 1 0 010 − 0 1 1 1 0 0 0 0 1 0 1 1 1 1 011 0 1 1 0 1 0 0 0 0 0 0 0 1 − − 100 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 101 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 110 0 0 1 1 0 1 1 1 0 0 0 1 1 1 1 ACTIVE MODES BITS SELECTION Table 5 Active modes bits selection 2000 Aug 10 BIT 1 BIT 0 0 0 active mode 0 1 RX mode 1 0 standby mode 1 1 inactive mode 13 DESCRIPTION Philips Semiconductors Product specification Analog cordless telephone IC UAA2062 REGISTER CONTENT DESCRIPTION Table 6 Register content description DATA REGISTER IP3 ALC disable HLim RX mute TX mute LBD enable VREFPLL disable Ref Div 2000 Aug 10 BIT DESCRIPTION 1 IP3 HIGH mode for 2nd mixer 0 IP3 LOW mode for 2nd mixer 1 automatic level control disabled 0 normal operation 1 hard limiter disabled 0 normal operation 1 RX channel muted 0 normal operation 1 TX channel muted 0 normal operation 1 low-battery detector enabled 0 carrier detector enabled 1 VREFPLL disabled (tied to VCC) 0 VREFPLL enabled 1 divider ratio 892 (conversion from 11.15 MHz to 12.5 kHz) 0 divider ratio 2048 (conversion from 10.24 MHz to 5 kHz) 14 Philips Semiconductors Product specification Analog cordless telephone IC UAA2062 TX AND RX GAIN SELECTION The TX and RX audio signal paths have a programmable gain block. If a TX or RX voltage gain other than the nominal power-up default is desired it can be programmed via the microcontroller interface. The gain blocks can be used during final test of the telephone to electronically adjust for gain tolerances in the telephone system. The RX gain and the TX gain selection covers a dynamic range from −7.5 to +8 dB in steps of 0.5 dB and can be programmed independently from each other. Table 7 TX and RX gain selection BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 STEP TX GAIN (dB) RX GAIN (dB) 0 0 0 0 0 0 −7.5 −7.5 0 0 0 0 1 1 −7.0 −7.0 0 0 0 1 0 2 −6.5 −6.5 0 0 0 1 1 3 −6.0 −6.0 0 0 1 0 0 4 −5.5 −5.5 0 0 1 0 1 5 −5.0 −5.0 0 0 1 1 0 6 −4.5 −4.5 0 0 1 1 1 7 −4.0 −4.0 0 1 0 0 0 8 −3.5 −3.5 0 1 0 0 1 9 −3.0 −3.0 0 1 0 1 0 10 −2.5 −2.5 0 1 0 1 1 11 −2.0 −2.0 0 1 1 0 0 12 −1.5 −1.5 0 1 1 0 1 13 −1.0 −1.0 0 1 1 1 0 14 −0.5 −0.5 0 1 1 1 1 15 0 0 1 0 0 0 0 16 +0.5 +0.5 1 0 0 0 1 17 +1.0 +1.0 1 0 0 1 0 18 +1.5 +1.5 1 0 0 1 1 19 +2.0 +2.0 1 0 1 0 0 20 +2.5 +2.5 1 0 1 0 1 21 +3.0 +3.0 1 0 1 1 0 22 +3.5 +3.5 1 0 1 1 1 23 +4.0 +4.0 1 1 0 0 0 24 +4.5 +4.5 1 1 0 0 1 25 +5.0 +5.0 1 1 0 1 0 26 +5.5 +5.5 1 1 0 1 1 27 +6.0 +6.0 1 1 1 0 0 28 +6.5 +6.5 1 1 1 0 1 29 +7.0 +7.0 1 1 1 1 0 30 +7.5 +7.5 1 1 1 1 1 31 +8.0 +8.0 2000 Aug 10 15 Philips Semiconductors Product specification Analog cordless telephone IC UAA2062 CARRIER DETECTOR THRESHOLD SELECTION The carrier detector indicates if a carrier signal is present on the selected channel. The nominal value and tolerance of the carrier detector threshold is given in the carrier detector specification section. If a different carrier detector threshold value is desired, it can be selected via the microcontroller interface. If it is required to scale the carrier detector range, an external resistor should be connected between pin RSSI and ground. The carrier detector threshold step 19 (10011) corresponds to a typical level on pin RSSI of 0.86 V DC. Table 8 Carrier detector threshold selection BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 STEP CARRIER DETECTOR THRESHOLD (V) 0 0 0 0 0 0 0.1 0 0 0 0 1 1 0.14 0 0 0 1 0 2 0.18 0 0 0 1 1 3 0.22 0 0 1 0 0 4 0.26 0 0 1 0 1 5 0.3 0 0 1 1 0 6 0.34 0 0 1 1 1 7 0.38 0 1 0 0 0 8 0.42 0 1 0 0 1 9 0.46 0 1 0 1 0 10 0.5 0 1 0 1 1 11 0.54 0 1 1 0 0 12 0.58 0 1 1 0 1 13 0.62 0 1 1 1 0 14 0.66 0 1 1 1 1 15 0.7 1 0 0 0 0 16 0.74 1 0 0 0 1 17 0.78 1 0 0 1 0 18 0.82 1 0 0 1 1 19 0.86 1 0 1 0 0 20 0.9 1 0 1 0 1 21 0.94 1 0 1 1 0 22 0.98 1 0 1 1 1 23 1.02 1 1 0 0 0 24 1.06 1 1 0 0 1 25 1.1 1 1 0 1 0 26 1.14 1 1 0 1 1 27 1.18 1 1 1 0 0 28 1.22 1 1 1 0 1 29 1.26 1 1 1 1 0 30 1.3 1 1 1 1 1 31 1.34 2000 Aug 10 16 Philips Semiconductors Product specification Analog cordless telephone IC UAA2062 LOW-BATTERY DETECTOR LEVEL SELECTION When the LBD register is set HIGH, the low-battery detector is enabled and the low-battery detect output signal is routed to the output pin CDBDO. The low-battery detector level selection functions only in a programmable mode. The power-up default value is step 7 (111). Table 9 Low-battery detector level selection BIT 2 BIT 1 BIT 0 STEP NOMINAL LOW-BATTERY DETECTOR VOLTAGE (V) 0 0 0 0 3.6 0 0 1 1 3.5 0 1 0 2 3.4 0 1 1 3 3.3 1 0 0 4 3.2 1 0 1 5 3.1 1 1 0 6 3.0 1 1 1 7 2.9 VOLTAGE REFERENCE SELECTION An internal 1.5 V band gap reference voltage provides the voltage reference for the low-battery detector circuit, the Vref(PLL) voltage regulator, the VB reference and all internal analog references. Table 10 Voltage reference selection BIT 2 BIT 1 BIT 0 STEP NOMINAL VOLTAGE REFERENCE (%) 0 0 0 0 −7 0 0 1 1 −5 0 1 0 2 −3 0 1 1 3 −1 1 0 0 4 +1 1 0 1 5 +3 1 1 0 6 +5 1 1 1 7 +7 2000 Aug 10 17 Philips Semiconductors Product specification Analog cordless telephone IC UAA2062 LNA CAPACITOR SELECTION The LNA has an external capacitor and inductor that together form a band-pass filter. A programmable on-chip capacitor is integrated which gives, in parallel with an external L and C, the possibility to tune the band-pass filter characteristic during production. A parasitic capacitor has to be added to the internal capacitor value. Table 11 LNA capacitor selection BIT 3 BIT 2 BIT 1 BIT 0 STEP LNA CAPACITOR VALUE (pF) 0 0 0 0 0 0 0 0 0 1 1 0.8 0 0 1 0 2 1.6 0 0 1 1 3 2.4 0 1 0 0 4 3.2 0 1 0 1 5 4.0 0 1 1 0 6 4.8 0 1 1 1 7 5.6 1 0 0 0 8 6.4 1 0 0 1 9 7.2 1 0 1 0 10 8.0 1 0 1 1 11 8.8 1 1 0 0 12 9.6 1 1 0 1 13 10.4 1 1 1 0 14 11.2 1 1 1 1 15 12.0 2000 Aug 10 18 Philips Semiconductors Product specification Analog cordless telephone IC UAA2062 LNA GAIN SELECTION The LNA has an internal programmable voltage conversion gain. This allows to tune the gain in order to achieve the best compromise in term of performance. The LNA gain is given with a reference value of L = 390 nH (Qloaded = 40) at 50 MHz. Table 12 LNA gain selection; L = 390 nH at BPFI; QLoaded = 40; f = 50 MHz BIT 1 BIT 0 STEP LNA GAIN (dB) 0 0 0 17 0 1 1 19 1 0 2 21 1 1 3 23 LNA INPUT RESISTIVE IMPEDANCE SELECTION The LNA has an internal programmable input resistive impedance (RIN) in order to improve the duplexer and LNA performance. To calculate the input resistive impedance we must know the typical LNA gain (i.e. the value of the external inductance and its Q). A small capacitance at the LNA input is needed to improve matching between LNA and duplexer. The programmability of tuning the input impedance allows to obtain an optimum sensitivity performance in the active and in the RX mode of operation. Table 13 LNA input resistive impedance selection TYPICAL LNA INPUT RESISTIVE IMPEDANCE BIT 1 BIT 0 STEP LNA VOLTAGE GAIN = 17 dB LNA VOLTAGE GAIN = 23 dB 0 0 0 1.2 kΩ 645 Ω 0 1 1 3.0 kΩ 1.6 kΩ 1 0 2 7.1 kΩ 3.8 kΩ 1 1 3 22.9 kΩ 14.5 kΩ 2000 Aug 10 19 Philips Semiconductors Product specification Analog cordless telephone IC UAA2062 RX AND TX VCO CAPACITOR SELECTION The RX VCO and the TX VCO have an external LC tank circuit. A programmable internal capacitor is integrated in parallel with the external L and C in order to tune the VCO and to keep the PLL in lock for large frequency steps. A parasitic capacitor has to be added to these values. The RX VCO capacitor value and the TX VCO capacitor value can be programmed independently one from the other. Table 14 RX and TX VCO capacitor selection BIT 3 BIT 2 BIT 1 BIT 0 STEP INTERNAL RX VCO CAPACITOR VALUE (pF) INTERNAL TX VCO CAPACITOR VALUE (pF) 0 0 0 0 0 0 0 0 0 0 1 1 0.9 0.45 0 0 1 0 2 1.8 0.9 0 0 1 1 3 2.7 1.35 0 1 0 0 4 3.6 1.8 0 1 0 1 5 4.5 2.25 0 1 1 0 6 5.4 2.7 0 1 1 1 7 6.3 3.15 1 0 0 0 8 7.2 3.6 1 0 0 1 9 8.1 4.05 1 0 1 0 10 9.0 4.5 1 0 1 1 11 9.9 4.95 1 1 0 0 12 10.8 5.4 1 1 0 1 13 11.7 5.85 1 1 1 0 14 12.6 6.3 1 1 1 1 15 13.5 6.75 PA OUTPUT LEVEL SELECTION The power amplifier has 2 bits to select the output voltage level. The power-up default value is step 3 (11). VCC = 3.6 V. Table 15 PA output level selection BIT 1 BIT 0 STEP PA OUTPUT POWER (dB) 0 0 0 −4 0 1 1 −2 1 0 2 0 1 1 3 +2 2000 Aug 10 20 Philips Semiconductors Product specification Analog cordless telephone IC UAA2062 FM PLL CENTRE FREQUENCY SHIFT SELECTION This programming enables to shift the centre frequency of the VCO, within the FM PLL, in order to align the frequency as close as possible to the 2nd IF frequency (nominal frequency 455 kHz). Table 16 FM PLL centre frequency shift selection BIT 3 BIT 2 BIT 1 BIT 0 STEP CENTRE FREQUENCY SHIFT (kHz) 0 0 0 0 0 −154 0 0 0 1 1 −132 0 0 1 0 2 −110 0 0 1 1 3 −88 0 1 0 0 4 −66 0 1 0 1 5 −44 0 1 1 0 6 −22 0 1 1 1 7 0 1 0 0 0 8 +22 1 0 0 1 9 +44 1 0 1 0 10 +66 1 0 1 1 11 +88 1 1 0 0 12 +110 1 1 0 1 13 +132 1 1 1 0 14 +154 1 1 1 1 15 +176 CLOCK DIVIDER RATIO SELECTION The clock output signal CLKO is derived from the local oscillator LO2 and can be used to drive a microcontroller. The LO2 signal is divided with a programmable divider value. The divider is followed by a filter that controls the slew rate of the signal in order to avoid radiation noise on the PCB. The CLKO output also has the option to disable the output signal. The default value is step 1 (01). Table 17 Clock divider ratio selection BIT 1 BIT 0 STEP CLOCK DIVIDER RATIO 0 0 0 output disabled 0 1 1 2.5 1 0 2 80 2000 Aug 10 21 Philips Semiconductors Product specification Analog cordless telephone IC UAA2062 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL PARAMETER MIN. MAX. UNIT VCC supply voltage −0.3 +6.0 V Tstg storage temperature −55 +125 °C Tamb ambient temperature −10 +70 °C HANDLING Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling MOS devices. THERMAL CHARACTERISTICS SYMBOL Rth(j-a) PARAMETER CONDITIONS thermal resistance from junction to ambient VALUE UNIT 100 K/W in free air CHARACTERISTICS VCC = 3.6 V; Tamb = 25 °C; specified for US handset applications; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply VCC supply voltage 3 3.6 5.25 V Tamb ambient temperature −10 − +70 °C for 20 dB SINAD − −112 − dBm for 12 dB SINAD RX mode − −117 − dBm for 12 dB SINAD active mode − −116 − dBm FM receiver part GENERAL FM RECEIVER SYSTEM CHARACTERISTICS; note 1 SRFI sensitivity at duplexer input (50 Ω) matched duplexer (3 dB loss) THDFM total harmonic distortion without CCITT filter − 2.0 3.0 % VDETO(rms) AC output level at pin DETO (RMS value) Vi(RFI) = −65 dBm − 100 − mV S/NFM signal-to-noise ratio Vi(RFI) = −65 dBm − 45 − dB 2000 Aug 10 22 Philips Semiconductors Product specification Analog cordless telephone IC SYMBOL PARAMETER UAA2062 CONDITIONS MIN. TYP. MAX. UNIT LOW-NOISE AMPLIFIER; note 2 Gv(LNA) voltage conversion gain from pin RFI to pin BPFI; LNA gain step 2; LNA RIN step 3 − 21 − dB ∆Gv(LNA) voltage conversion gain adjustment range from pin RFI to pin BPFI − 6 − dB Nsteps(LNA) voltage conversion gain adjust steps from pin RFI to pin BPFI − 4 − Vi(LNA) input voltage −125 − −10 dBm CP1LNA(rms) 1 dB compression point (RMS value) referenced to pin RFI − 35 − mV FLNA noise figure from pin RFI to pin BPFI; LNA gain step 2; LNA RIN step 3 − 3 − dB 1ST MIXER; note 3 Zo(MX1) output impedance referenced to pin BPFI − 330 − Ω Gcp(MX1) voltage conversion gain ZL = 330 Ω; − referenced to pin BPFI 11.5 − dB IP3MX1(rms) 3rd-order intercept point (RMS value) referenced to pin BPFI − 260 − mV CP1MX1(rms) 1 dB compression point (RMS value) referenced to pin BPFI − 100 − mV FMX1 input referenced noise referenced to pin BPFI − 12 − nV/√Hz 2ND MIXER; note 4 Zi(MX2) input impedance − 1.5 − kΩ Zo(MX2) output impedance − 1.5 − kΩ Gcp(MX2) voltage conversion gain IP3 HIGH − 15 − dB IP3 LOW − 18 − dB − 15 18 dB IP3 HIGH − 210 − mV IP3 LOW − 150 − mV NFMX2 noise figure from pin MX2I to pin MX2O IP3MX2(rms) 3rd order intercept (RMS value) 2000 Aug 10 measured at pin MX2O measured at pin MX2O; referenced to pin MX2I 23 Philips Semiconductors Product specification Analog cordless telephone IC SYMBOL CP1MX2(rms) PARAMETER 1 dB compression point (RMS value) UAA2062 CONDITIONS MIN. TYP. MAX. UNIT measured at pin MX2O; referenced to pin MX2I IP3 HIGH − 70 − mV IP3 LOW − 50 − mV LIMITER Zi(LIM) input impedance f0 = 455 kHz − 1.5 − kΩ Gv(LIM) voltage gain f0 = 455 kHz; − Vi(LIM) = 100 µV (RMS) 85 − dB PLL DEMODULATOR; note 5 ∆fVCO/∆V VCO gain after calibration − 50 − kHz/V fVCO VCO centre frequency free running; open loop 200 455 650 kHz Nstep(VCO) number of steps for VCO frequency adjustment − 16 − fVCO(st) VCO centre frequency step − 22 − kHz RL(PLL) demodulator external load on pin DETO 5 − − kΩ Vo(PLL)(rms) output voltage on pin DETO (RMS value) − − 0.4 V RL(PLL) = 5 kΩ RSSI CARRIER DETECTOR; note 6 RSSI output current dynamic range − 65 − dB VOH HIGH-level output voltage at CD step 19; pin CDBDO Vi(LIM) = 0.1 V (RMS) 0.9VCC − − V VOL LOW-level output voltage at pin CDBDO Vi(LIM) = 0 V (RMS); CD step 19 − − 0.1VCC V Ri internal resistance between pins RSSI and VCC(RF) − 170 − kΩ Vdet voltage detection 0.05 − 1.3 V Vdet(st) voltage detection step − 40 − mV Vhys hysteresis voltage − 60 − mV Nstep(CD) number of steps for carrier sense threshold programmable through − microcontroller 32 − − DATA COMPARATOR Vac(DATI)(p-p) AC input voltage (peak-to-peak value) 75 − Vth(DATI) threshold voltage on pin DATI − VCC − 0.9 − 2000 Aug 10 24 mV V Philips Semiconductors Product specification Analog cordless telephone IC SYMBOL PARAMETER UAA2062 CONDITIONS MIN. TYP. MAX. UNIT − 240 − kΩ 0.9VCC − − V LOW-level output voltage on Vi(DATI) = VCC − 0.4 V pin DATO − − 0.1VCC V Vi(DATI) = VCC − 0.4 V; Vo(DATO) = 0.1VCC − 20 − µA VMICI = 1 mV (RMS); CCITT filter (P53) − 2 − % − −10 − dBV 10 − − kΩ − 2.4 − V − 2 − dBm Zi(DATI) input impedance at pin DATI VOH(DATO) HIGH-level output voltage on pin DATO VOL(DATO) Io(sink) output sink current Vi(DATI) = VCC − 1.4 V The transmit part; note 7 General THDTX total harmonic distortion after demodulation Summing amplifier Vo(SUM) summing amplifier output voltage on pin MODO Rf(SUM) summing amplifier external feedback resistor Vbias(SUM) DC voltage at pin MODI between pins MODI and MODO Voltage controlled oscillator and power amplifier; note 8 VPA PA output voltage fo = 49.97 MHz; PA step 3 Nstep(PA) number of steps of VCO output voltage − 4 − Vo(PA) PA output voltage −4 − +2 dB H2PA attenuation 2nd harmonic 14 18 − dB H3PA attenuation 3rd harmonic 26 34 − dB ∆f ------- (MODO) ∆V VCO modulation gain VMODO = 2.4 V − 15.5 − kHz/V ∆f ------- (TXLF) ∆V VCO gain VTXLF = 0.9 V − 550 − kHz/V VTXLF = 1.2 V − 380 − kHz/V QL(VCO) Q factor of external L filter L = 330 nH 40 − − NVCO(TX) TX VCO phase noise fcarrier = 25 to 50 MHz foffset = 5 kHz − −96 −80 dBc/Hz foffset = 12.5 kHz − −104 −87 dBc/Hz The synthesizer PLL LOOP FILTER; note 9 fxtal LO frequency − − 12 MHz Ci(LO2) parasitic capacitance between pins LO2I and LO2O − − 3 pF CL(LO2) load capacitance between pins LO2I and LO2O − 15 30 pF 2000 Aug 10 25 Philips Semiconductors Product specification Analog cordless telephone IC SYMBOL PARAMETER fRX RX VCO frequency NVCO(RX) RX VCO phase noise at pin LO2O UAA2062 CONDITIONS MIN. TYP. MAX. UNIT 25 − 55 MHz foffset = 5 kHz − −96 −90 dBc/Hz foffset = 12.5 kHz − −104 −98 dBc/Hz fcarrier = 25 to 37 MHz tstrt(RXPLL) RX PLL start time measured by switching − from inactive to active mode 10 − ms tres(RXPLL) RX PLL step response time from channel 8 to channel 10; measured within ±500 Hz from final frequency − 12 − ms tstrt(TXPLL) TX PLL start time measured by switching − from inactive to active mode 60 − ms tres(TXPLL) TX PLL step response time from CH 7 to CH 10; measured within ±500 Hz from final frequency − 40 − ms fTX TX VCO frequency 20 − 55 MHz Co(RXPD) output capacitance at pin RXPD − − 8 pF Co(TXPD) output capacitance at pin TXPD − − 8 pF dB The RX baseband RX AUDIO PATH; note 10 ∆GARX RX gain adjustment programmable through −7.5 microcontroller − +8 Nstep(ARX) RX gain adjust steps programmable through − microcontroller 32 − ∆Gv(m) RX mute Vi(RXI) = −20 dBV − −70 −60 dB GEXP expander gain level Vi(RXI) = −20 dBV −4 0 +4 dB Vi(RXI) = −30 dBV −14 −10 −6 dB Vi(RXI) = −40 dBV − −20 − dB − 15 − kΩ Zi(RXI) input impedance tatt(EXP) expander attack time CECAP = 0.47 µF − 3.0 − ms trel(EXP) expander release time CECAP = 0.47 µF − 13.5 − ms αct(EARO) compressor to expander crosstalk attenuation from pin CMPI to pin EARO; VRXI = 0 V (RMS); VCMPI = −20 dBV − 70 − dB 2000 Aug 10 26 Philips Semiconductors Product specification Analog cordless telephone IC SYMBOL PARAMETER UAA2062 CONDITIONS MIN. TYP. MAX. UNIT EARPIECE AMPLIFIER; note 11 Vo(EARO)(p-p) output swing voltage (peak-to-peak value) THD < 4% − 2.2 − V Gear gain earpiece amplifier no external resistor − 6 − dB RL(EARO) earpiece resistance note 12 − 150 − Ω THDARX total harmonic distortion Vi(RXI) = −20 dBV − 0.5 1 % NARX audio path noise B = 400 Hz to 3 kHz − −83 − dBV RL = 10 kΩ − −27 −12 dBV 0 − 34 dB f = 1 kHz; Vo(MICO) = −12 dBV − 0.2 − % Vi(CMPI) = −10 dBV −4 0 +4 dB Vi(CMPI) = −30 dBV 6 10 14 dB Vi(CMPI) = −50 dBV 16 20 24 dB The TX baseband MICROPHONE AMPLIFIER; note 13 Vo(MICO) output swing ∆GV voltage gain adjustment THDMICO total harmonic distortion TX AUDIO PATH; note 14 GCOMP compressor gain ALC disabled GCOMP(max) maximum compressor gain Vi(CMPI) = −70 dBV − 23 − dB VHLIM(p-p) output voltage hard limiter (peak-to-peak value) HLim disabled; ALC disabled; Vi(CMPI) = −4 dBV − 1.26 − V Vi(CMPI) input voltage range − −26 −12 dBV Vo(TXO) output voltage Vi(CMPI) = −12 dBV − −12.5 − dBV Vi(CMPI) = −10 dBV − −12.3 − dBV Vi(CMPI) = −2.5 dBV − −11.5 − dBV − 0.5 1 % − 15 − kΩ ALC normal operation THDCOMP total harmonic distortion Zi(CMPI) input impedance tatt(COMP) compressor attack time CCCAP = 0.47 µF − 3.0 − ms trel(COMP) compressor release time CCCAP = 0.47 µF − 13.5 − ms αct(COMP) expander to compressor crosstalk attenuation Vi(CMPI) = 0 V (RMS); from RXI to TXO; Vi(RXI) = −10 dBV − 40 − dB ∆Gv(m) TX mute ALC disabled; Vi(CMPI) = −10 dBV − −70 −60 dB ∆GATX TX gain adjustment programmable through −7.5 microcontroller − +8 dB Nstep(ATX) TX gain adjustment steps programmable through − microcontroller 32 − 2000 Aug 10 ALC disabled; Vi(CMPI) = −10 dBV 27 Philips Semiconductors Product specification Analog cordless telephone IC SYMBOL Zo(TXO) PARAMETER UAA2062 CONDITIONS output impedance at pin TXO MIN. TYP. MAX. UNIT − 500 − Ω Other features PLL VOLTAGE REGULATOR Vref(PLL) regulated output level before VB adjustment 2.75 3 3.25 V after VB adjustment 2.95 3 3.05 V ∆Vref(PLL) load regulation VCC = 3.6 V; Io = 0 to 3 mA − 100 − mV Io output current VCC = 3.6 V − − 3 mA after VB adjustment; low-battery detect level step 0 −3 − +3 % LOW-BATTERY DETECTOR: LBD ENABLED ∆VCC/VCC battery detection accuracy Characteristics of digital pins MICROCONTROLLER VIL LOW-level input voltage at pins DATA, CLK and EN − − 0.5 V VIH HIGH-level input voltage at pins DATA, CLK and EN Vref(PLL) − 0.5 − VCC(AU) V IIL LOW-level input current at pins DATA, CLK and EN VIL = 0.3 V −5 − − µA IIH HIGH-level input current at pins DATA, CLK and EN VIH = Vref(PLL) − 0.3 V − − 5 µA Ci input capacitance at pins DATA, CLK and EN − − 8 pF CDBDO OUTPUT IOL LOW-level output current at pin CDBDO 0.7 − − mA IOH HIGH-level output current at pin CDBDO − − −0.7 mA VOL LOW-level output voltage at pin CDBDO − − 0.1VCC V VOH HIGH-level output voltage at RL = 100 kΩ pin CDBDO 0.9VCC − − V RL = 100 kΩ TIMING (see Fig.10) tSU;CE set-up time CLK to EN 50% of signals 200 − − ns tSU;DC set-up time DATA to CLK 50% of signals 200 − − ns tHD;EC hold time EN to CLK 50% of signals 200 − − ns fclk clock frequency − − 300 kHz tr input rise time 10% to 90% − − 10 ns tf input fall time 10% to 90% − − 10 ns 2000 Aug 10 28 Philips Semiconductors Product specification Analog cordless telephone IC SYMBOL PARAMETER tEND hold time enable at the end of a word tW input pulse width at pin EN tstrt microcontroller interface start-up time UAA2062 CONDITIONS MIN. TYP. MAX. UNIT 100 − − ns note 15 1/fCOMP − − ns 90% of Vref(PLL) to DATA, CLK and EN − − 200 µs Notes 1. f0 = 46.97 MHz; fdev = 1.5kHz; fmod = 1 kHz; LPF = 2.4 kHz at DETO; all with CCITT filter. 2. f0 = 46.97 MHz; L = 390 nH; Qloaded = 40; the input impedance and the gain of the LNA can be programmed individually (see Tables 12 and 13). 3. With 10.7 MHz filter load (input impedance 330 Ω); measured at pin MX1O. 4. fRF = 10.695 MHz; fLO = 10.24 MHz with 455 kHz ceramic filter load (input impedance 1500 Ω). 5. f0 = 455 kHz; fdev = 1.5kHz; fmod = 1 kHz. 6. VB = 1.5 V. 7. f0 = 49.97 MHz. 8. Voltage controlled oscillator: at pin LO3I, an inductance of 330 nH in parallel with a capacitor of 12 pF are connected to ground via a capacitor of 10 nF. Power amplifier: at PAO an inductance of 180 nH in parallel with a capacitor of 27 pF. The PAO is AC-coupled to the duplexer with a capacitor of 100 pF to filter the 2nd and 3rd harmonic. 9. PLL loop (see Fig.5): values for the RX loop filter components: C1 = 6.8 nF; C2 = 68 nF; C3 = 1.5 nF; R2 = 22 kΩ; R3 = 47 kΩ; values for the TX loop filter components: C4 = 15 nF; C5 = 150 nF; C6 = 3.9 nF; R5 = 22 kΩ; R6 = 47 kΩ. 10. RX gain adjust, RX mute and expander (see Fig.6): VB = 1.5 V; f = 1 kHz; RX gain step 15. 11. VB = 1.5 V; f = 1 kHz; no external feedback resistor; RL = 150 Ω in series with 10 µF. 12. For stable amplifier operation. 13. VB = 1.5 V; f = 1 kHz. Gain can be adjusted with external resistors. 14. Compressor, ALC/TX mute, TX gain adjust (see Fig.8): VB = 1.5 V; f = 1 kHz; TX gain step 15. 15. The minimum pulse width should be equal to the period of the comparison frequency, depending on the country. 2000 Aug 10 29 Philips Semiconductors Product specification Analog cordless telephone IC UAA2062 CHANNEL FREQUENCIES France: CT0 base set and handset channel frequencies Crystal frequency = 11.15 MHz; reference divider = 892; fref = 12.5 kHz; 1st IF = 10.7 MHz. BASE SET CHANNEL NUMBER TX CHANNEL FREQ (MHz) HANDSET TX DIVIDER LO1 FREQ (MHz) RX TX CHANNEL DIVIDER FREQ (MHz) TX DIVIDER LO1 FREQ (MHz) RX DIVIDER 1 26.3125 2105 30.6125 2449 41.3125 3305 37.0125 2961 2 26.3250 2106 30.6250 2450 41.3250 3306 37.0250 2962 3 26.3375 2107 30.6375 2451 41.3375 3307 37.0375 2963 4 26.3500 2108 30.6500 2452 41.3500 3308 37.0500 2964 5 26.3625 2109 30.6625 2453 41.3625 3309 37.0625 2965 6 26.3750 2110 30.6750 2454 41.3750 3310 37.0750 2966 7 26.3875 2111 30.6875 2455 41.3875 3311 37.0875 2967 8 26.4000 2112 30.7000 2456 41.4000 3312 37.1000 2968 9 26.4125 2113 30.7125 2457 41.4125 3313 37.1125 2969 10 26.4250 2114 30.7250 2458 41.4250 3314 37.1250 2970 11 26.4375 2115 30.7375 2459 41.4375 3315 37.1375 2971 12 26.4500 2116 30.7500 2460 41.4500 3316 37.1500 2972 13 26.4625 2117 30.7625 2461 41.4625 3317 37.1625 2973 14 26.4750 2118 30.7750 2462 41.4750 3318 37.1750 2974 15 26.4875 2119 30.7875 2463 41.4875 3319 37.1875 2975 Australia: CT0 base set and handset channel frequencies Crystal frequency = 11.15 MHz; reference divider = 892; fref = 12.5 kHz; 1st IF = 10.7 MHz. BASE SET CHANNEL NUMBER HANDSET TX CHANNEL FREQ (MHz) TX DIVIDER LO1 FREQ (MHz) TX DIVIDER LO1 FREQ (MHz) RX DIVIDER 1 30.075 2406 29.075 2326 2 30.125 2410 29.125 2330 39.775 3182 40.775 3262 39.825 3186 40.825 3266 3 30.175 2414 29.175 2334 39.875 3190 40.875 3270 4 30.225 2418 5 30.275 2422 29.225 2338 39.925 3194 40.925 3274 29.275 2342 39.975 3198 40.975 3278 6 30.100 2408 29.100 2328 39.800 3184 40.800 3264 7 30.150 2412 29.150 2332 39.850 3188 40.850 3268 8 30.200 2416 29.200 2336 39.900 3192 40.900 3272 9 30.250 2420 29.250 2340 39.950 3196 40.950 3276 10 30.300 2424 29.300 2344 40.000 3200 41.000 3280 2000 Aug 10 RX TX CHANNEL DIVIDER FREQ (MHz) 30 Philips Semiconductors Product specification Analog cordless telephone IC UAA2062 Spain: CT0 base set and handset channel frequencies Crystal frequency = 11.15 MHz; reference divider = 892; fref = 12.5 kHz; 1st IF = 10.7 MHz. BASE SET CHANNEL NUMBER HANDSET TX CHANNEL FREQ (MHz) TX DIVIDER LO1 FREQ (MHz) TX DIVIDER LO1 FREQ (MHz) RX DIVIDER 1 31.025 2482 29.225 2338 39.925 3194 41.725 3338 2 31.050 2484 29.250 3 31.075 2486 29.275 2340 39.950 3196 41.750 3340 2342 39.975 3198 41.775 3342 4 31.100 2488 29.300 2344 40.000 3200 41.800 3344 5 31.125 6 31.150 2490 29.325 2346 40.025 3202 41.825 3346 2492 29.350 2348 40.050 3204 41.850 3348 7 31.175 2494 29.375 2350 40.075 3206 41.875 3350 8 31.200 2496 29.400 2352 40.100 3208 41.900 3352 9 31.250 2500 29.450 2356 40.150 3212 41.950 3356 10 31.275 2502 29.475 2358 40.175 3214 41.975 3358 11 31.300 2504 29.500 2360 40.200 3216 42.000 3360 12 31.325 2506 29.525 2362 40.225 3218 42.025 3362 RX TX CHANNEL DIVIDER FREQ (MHz) Netherlands: CT0 base set and handset channel frequencies Crystal frequency = 11.15 MHz; reference divider = 892; fref = 12.5 kHz; 1st IF = 10.7 MHz. BASE SET CHANNEL NUMBER HANDSET TX CHANNEL FREQ (MHz) TX DIVIDER LO1 FREQ (MHz) TX DIVIDER LO1 FREQ (MHz) RX DIVIDER 1 31.0375 2483 29.2375 2339 39.9375 3195 41.7375 3339 2 31.0625 2485 29.2625 2341 39.9625 3197 41.7625 3341 3 31.0875 2487 4 31.1125 2489 29.2875 2343 39.9875 3199 41.7875 3343 29.3125 2345 40.0125 3201 41.8125 3345 5 31.1375 2491 29.3375 2347 40.0375 3203 41.8375 3347 6 7 31.1625 2493 29.3625 2349 40.0625 3205 41.8625 3349 31.1875 2495 29.3875 2351 40.0875 3207 41.8875 3351 8 31.2125 2497 29.4125 2353 40.1125 3209 41.9125 3353 RX TX CHANNEL DIVIDER FREQ (MHz) 9 31.2325 2499 29.4375 2355 40.1375 3211 41.9375 3355 10 31.2625 2501 29.4625 2357 40.1625 3213 41.9625 3357 11 31.2875 2503 29.4875 2359 40.1875 3215 419875 3359 12 31.3125 2505 29.5125 2361 40.2125 3217 42.0125 3361 2000 Aug 10 31 Philips Semiconductors Product specification Analog cordless telephone IC UAA2062 New Zealand: CT0 base set and handset channel frequencies Crystal frequency = 11.15 MHz; reference divider = 892; fref = 12.5 kHz; 1st IF = 10.7 MHz. BASE SET CHANNEL NUMBER HANDSET TX CHANNEL FREQ (MHz) TX DIVIDER LO1 FREQ (MHz) TX DIVIDER LO1 FREQ (MHz) RX DIVIDER 11 34.250 2740 29.550 2364 40.250 3220 44.950 3596 12 34.275 2742 29.575 13 34.300 2744 29.600 2366 40.275 3222 44.975 3598 2368 40.300 3224 45.000 3600 14 34.325 2746 29.625 2370 40.325 3226 45.025 3602 15 34.350 16 34.375 2748 29.650 2372 40.350 3228 45.050 3604 2750 29.675 2374 40.375 3230 45.075 3606 17 34.400 2752 29.700 2376 40.400 3232 45.100 3608 18 34.425 2754 29.725 2378 40.425 3234 45.125 3610 19 34.450 2756 29.750 2380 40.450 3236 45.150 3612 20 34.475 2758 29.775 2382 40.475 3238 45.175 3614 RX TX CHANNEL DIVIDER FREQ (MHz) Korea: CT0 base set and handset channel frequencies Crystal frequency = 10.24 MHz; reference divider = 2048; fref = 5 kHz; 1st IF = 10.695 MHz. BASE SET CHANNEL NUMBER HANDSET TX CHANNEL FREQ (MHz) TX DIVIDER LO1 FREQ (MHz) TX DIVIDER LO1 FREQ (MHz) RX DIVIDER 1 46.610 9322 38.970 7794 49.670 9934 35.910 7182 2 46.630 9326 39.145 3 46.670 9334 39.160 7829 49.845 9969 35.930 7186 7832 49.860 9972 35.970 7194 4 46.710 9342 39.070 7814 49.770 9954 36.010 7202 5 46.730 6 46.770 9346 39.175 7835 49.875 9975 36.030 7206 9354 39.130 7826 49.830 9966 36.070 7214 7 46.830 9366 39.190 7838 49.890 9978 36.130 7226 8 46.870 9374 39.230 7846 49.930 9986 36.170 7234 9 46.930 9386 39.290 7858 49.990 9998 36.230 7246 10 46.970 9394 39.270 7854 49.970 9994 36.270 7254 11 46.510 9302 38.995 7799 49.695 9939 35.810 7162 12 46.530 9306 39.010 7802 49.710 9942 35.830 7166 13 46.550 9310 39.025 7805 49.725 9945 35.850 7170 14 46.570 9314 39.040 7808 49.740 9948 35.870 7174 15 46.590 9318 39.055 7811 49.755 9951 35.890 7178 2000 Aug 10 RX TX CHANNEL DIVIDER FREQ (MHz)) 32 Philips Semiconductors Product specification Analog cordless telephone IC UAA2062 USA: CT0 base set and handset channel frequencies Crystal frequency = 10.24 MHz; reference divider = 24848048; fref = 5 kHz; 1st IF = 10.695 MHz. BASE SET CHANNEL NUMBER HANDSET TX CHANNEL FREQ (MHz) TX DIVIDER LO1 FREQ (MHz) TX DIVIDER LO1 FREQ (MHz) RX DIVIDER 1 46.610 9322 38.975 7795 49.670 9934 35.915 7183 2 46.630 9326 39.150 3 46.670 9334 39.165 7830 49.845 9969 35.935 7187 7833 49.860 9972 35.975 7195 4 46.710 9342 39.075 7815 49.770 9954 36.015 7203 5 46.730 6 46.770 9346 39.180 7836 49.875 9975 36.035 7207 9354 39.135 7827 49.830 9966 36.075 7215 7 46.830 9366 39.195 7839 49.890 9978 36.135 7227 8 46.870 9374 39.235 7847 49.930 9986 36.175 7235 9 46.930 9386 39.295 7859 49.990 9998 36.235 7247 10 46.970 9394 39.275 7855 49.970 9994 36.275 7255 11 43.720 8744 38.065 7613 48.760 9752 33.025 6605 12 43.740 8748 38.145 7629 48.840 9768 33.045 6609 13 43.820 8764 38.165 7633 48.860 9772 33.125 6625 14 43.840 8768 38.225 7645 48.920 9784 33.145 6629 15 43.920 8784 38.325 7665 49.020 9804 33.225 6645 16 43.960 8792 38.385 7677 49.080 9816 33.265 6653 17 44.120 8824 38.405 7681 49.100 9820 33.425 6685 18 44.160 8832 38.465 7693 49.160 9832 33.465 6693 19 44.180 8836 38.505 7701 49.200 9840 33.485 6697 20 44.200 8840 38.545 7709 49.240 9848 33.505 6701 21 44.320 8864 38.585 7717 49.280 9856 33.625 6725 22 44.360 8872 38.665 7733 49.360 9872 33.665 6733 23 44.400 8880 38.705 7741 49.400 9880 33.705 6741 24 44.460 8892 38.765 7753 49.460 9892 33.765 6753 25 44.480 8896 38.805 7761 49.500 9900 33.785 6757 RX TX CHANNEL DIVIDER FREQ (MHz) New channels 2000 Aug 10 33 Philips Semiconductors Product specification Analog cordless telephone IC UAA2062 China: CT0 base set and handset channel frequencies Crystal frequency = 10.24 MHz; reference divider = 2048; fref = 5 kHz; 1st IF = 10.695 MHz. BASE SET CHANNEL NUMBER HANDSET TX CHANNEL FREQ (MHz) TX DIVIDER LO1 FREQ (MHz) RX DIVIDER TX CHANNEL FREQ (MHz) TX DIVIDER LO1 FREQ (MHz) RX DIVIDER 1 45.250 9050 37.550 7510 48.250 9650 34.550 6910 2 45.275 9055 37.575 7515 48.275 9655 34.575 6915 3 45.300 9060 37.600 7520 48.300 9660 34.600 6920 4 45.325 9065 37.625 7525 48.325 9665 34.625 6925 5 45.350 9070 37.650 7530 48.350 9670 34.650 6930 6 45.375 9075 37.675 7535 48.375 9675 34.675 6935 7 45.400 9080 37.700 7540 48.400 9680 34.700 6940 8 45.425 9085 37.725 7545 48.425 9685 34.725 6945 9 45.450 9090 37.750 7550 48.450 9690 34.750 6950 10 45.475 9095 37.775 7555 48.475 9695 34.775 6955 2000 Aug 10 34 Philips Semiconductors Product specification Analog cordless telephone IC UAA2062 PACKAGE OUTLINE SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm SOT370-1 D E A X c y HE v M A Z 25 48 Q A2 A1 A (A 3) θ pin 1 index Lp L 24 1 detail X w M bp e 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2.8 0.4 0.2 2.35 2.20 0.25 0.3 0.2 0.22 0.13 16.00 15.75 7.6 7.4 0.635 10.4 10.1 1.4 1.0 0.6 1.2 1.0 0.25 0.18 0.1 0.85 0.40 8 0o Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT370-1 2000 Aug 10 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE 95-02-04 99-12-27 MO-118 35 o Philips Semiconductors Product specification Analog cordless telephone IC UAA2062 • Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. SOLDERING Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). • For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. • For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 230 °C. Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results: 2000 Aug 10 36 Philips Semiconductors Product specification Analog cordless telephone IC UAA2062 Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE REFLOW(1) WAVE BGA, SQFP not suitable HLQFP, HSQFP, HSOP, HTSSOP, SMS not PLCC(3), SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO suitable suitable(2) suitable suitable suitable not recommended(3)(4) suitable not recommended(5) suitable Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”. 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 2000 Aug 10 37 Philips Semiconductors Product specification Analog cordless telephone IC UAA2062 DATA SHEET STATUS DATA SHEET STATUS PRODUCT STATUS DEFINITIONS (1) Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Note 1. Please consult the most recently issued data sheet before initiating or completing a design. DEFINITIONS DISCLAIMERS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 2000 Aug 10 38 Philips Semiconductors Product specification Analog cordless telephone IC UAA2062 NOTES 2000 Aug 10 39 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 403506/01/pp40 Date of release: 2000 Aug 10 Document order number: 9397 750 06699