VCA824 VC A8 24 VC A824 www.ti.com....................................................................................................................................... SBOS394C – NOVEMBER 2007 – REVISED DECEMBER 2008 Ultra-Wideband, > 40dB Gain Adjust Range, Linear in V/V VARIABLE GAIN AMPLIFIER FEATURES 1 DESCRIPTION • 710MHz SMALL-SIGNAL BANDWIDTH (G = +2V/V) • 320MHz, 4VPP BANDWIDTH (G = +10V/V) • 0.1dB GAIN FLATNESS to 135MHz • 2500V/µs SLEW RATE • > 40dB GAIN ADJUST RANGE • HIGH GAIN ACCURACY: 20dB ±0.3dB • HIGH OUTPUT CURRENT: ±90mA 23 The VCA824 is a dc-coupled, wideband, linear in V/V, continuously variable, voltage-controlled gain amplifier. It provides a differential input to single-ended conversion with a high-impedance gain control input used to vary the gain down 40dB from the nominal maximum gain set by the gain resistor (RG) and feedback resistor (RF). APPLICATIONS • • • • • DIFFERENTIAL LINE RECEIVERS DIFFERENTIAL EQUALIZERS PULSE AMPLITUDE COMPENSATION VARIABLE ATTENUATORS VOLTAGE-TUNABLE ACTIVE FILTERS VIN1 RF +VIN RG+ RS R1 RL FB RG VOUT VCA824 C1 CL RG- VIN2 -VIN 20W The VCA824 internal architecture consists of two input buffers and an output current feedback amplifier stage integrated with a multiplier core to provide a complete variable gain amplifier (VGA) system that does not require external buffering. The maximum gain is set externally with two resistors, providing flexibility in designs. The maximum gain is intended to be set between +2V/V and +40V/V. Operating from ±5V supplies, the gain control voltage for the VCA824 adjusts the gain linearly in V/V as the control voltage varies from +1V to –1V. For example, set for a maximum gain of +10V/V, the VCA824 provides 10V/V, at +1V input, to 0.1V/V at –1V input of gain control range. The VCA824 offers excellent gain linearity. For a 20dB maximum gain, and a gain-control input voltage varying between 0V and 1V, the gain does not deviate by more than ±0.3dB (maximum at +25°C). RS VCA824 RELATED PRODUCTS DUALS GAIN ADJUST RANGE (dB) Differential Equalizer SINGLES 9 SIGNAL BANDWIDTH (MHz) VCA810 — 80 2.4 35 3 — VCA2612 45 1.25 80 0 — VCA2613 45 1 80 — VCA2615 52 0.8 50 — VCA2617 48 4.1 50 VCA820 — 40 8.2 150 -15 VCA821 — 40 6.0 420 -18 VCA822 — 40 8.2 150 VCA824 — 40 6.0 420 Equalized Frequency Response 6 Gain (dB) INPUT NOISE (nV/√Hz) Initial Frequency Response of the VCA824 with RC Load -3 -6 -9 -12 -21 -24 1M 10M 100M 1G Frequency (Hz) Differential Equalization of an RC Load 1 2 3 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. X2Y is a registered trademark of X2Y Attenuators LLC. All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2007–2008, Texas Instruments Incorporated VCA824 SBOS394C – NOVEMBER 2007 – REVISED DECEMBER 2008....................................................................................................................................... www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION (1) SPECIFIED TEMPERATURE RANGE PACKAGE MARKING PRODUCT PACKAGE-LEAD PACKAGE DESIGNATOR VCA824 SO-14 D –40°C to +85°C VCA824ID VCA824 MSOP-10 DGS –40°C to +85°C BOT (1) ORDERING NUMBER TRANSPORT MEDIA, QUANTITY VCA824ID Rail, 50 VCA824IDR Tape and Reel, 2500 VCA824IDGST Tape and Reel, 250 VCA824IDGSR Tape and Reel, 2500 For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. ABSOLUTE MAXIMUM RATINGS Over operating free-air temperature range (unless otherwise noted). PARAMETER VCA824 UNIT ±6.5 V Power Supply Internal Power Dissipation See Thermal Characteristics Input Voltage Range Storage Temperature Range ±VS V –65 to +125 °C Lead Temperature (soldering, 10s) +260 °C Junction Temperature (TJ) +150 °C Junction Temperature (TJ), Maximum Continuous Operation +140 °C Human Body Model (HBM) 2000 V Charge Device Model (CDM) 1000 V Machine Model (MM) 200 V ESD Rating PIN CONFIGURATION D PACKAGE SO-14 (TOP VIEW) DGS PACKAGE MSOP-10 (TOP VIEW) +VCC 1 14 +VCC VG 2 13 NC +VIN 3 12 FB +RG 4 11 GND -RG 5 10 VOUT -VIN 6 9 VREF -VCC 7 8 -VCC FB 1 10 GND +VCC 2 9 VOUT VG 3 8 -VCC +VIN 4 7 -VIN +RG 5 6 -RG NC = No Connection 2 Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): VCA824 VCA824 www.ti.com....................................................................................................................................... SBOS394C – NOVEMBER 2007 – REVISED DECEMBER 2008 ELECTRICAL CHARACTERISTICS: VS = ±5V At AVMAX = +10V/V, VG = +1V, RF = 402Ω, RG = 80Ω, and RL = 100Ω, unless otherwise noted. VCA824 MIN/MAX OVER TEMPERATURE TYP PARAMETER CONDITIONS +25°C +25°C (2) 0°C to 70°C (3) –40°C to +85°C (3) UNITS MIN/ MAX TEST LEVEL (1) AC PERFORMANCE Small-Signal Bandwidth AVMAX = +2V/V, VG = +1V , VO = 500mVPP 710 MHz typ C AVMAX = +10V/V, VG = +1V, VO = 500mVPP 420 MHz typ C AVMAX = +40V/V, VG = +1V, VO = 500mVPP 170 MHz typ C Large-Signal Bandwidth AVMAX = +10V/V, VG = +1V, VO = 4VPP 320 MHz typ C Gain Control Bandwidth VO = 200mVPP 330 MHz min B AVMAX = +10V/V, VG = +1V, VO = 2VPP 135 MHz typ C Slew Rate AVMAX = +10V/V, VG = +1V, VO = 4V Step 2500 1800 1700 1700 V/µs min B Rise-and-Fall Time AVMAX = +10V/V, VG = +1V, VO = 4V Step 1.5 1.8 1.9 1.9 ns max B Settling Time to 0.01% AVMAX = +10V/V, VG = +1V, VO = 4V Step 11 ns typ C 2nd-Harmonic VO = 2VPP, f = 20MHz -66 –64 –64 –64 dBc min B 3rd-Harmonic VO = 2VPP, f = 20MHz -63 –61 –61 –61 dBc min B Input Voltage Noise f > 100kHz 6 nV/√Hz typ C Input Current Noise f > 100kHz 2.6 pA/√Hz typ C Bandwidth for 0.1dB Flatness 240 235 235 Harmonic Distortion GAIN CONTROL Gain Error AVMAX = +10V/V, VG = 1V ±0.1 ±0.4 ±0.5 ±0.6 dB max A Gain Deviation AVMAX = +10V/V, 0 < VG < 1 ±0.05 ±0.3 ±0.34 ±0.37 dB max A Gain Deviation AVMAX = +10V/V, -0.8 < VG < 1 ±1.06 ±1.9 ±2.1 ±2.2 dB max A Relative to max gain –26 –24 –24 –23 dB max A 22 30 35 37 µA max A ±100 ±100 nA/°C max B MΩ || pF typ C Gain at VG = –0.9V Gain Control Bias Current Average Gain Control Bias Current Drift Gain Control Input Impedance 1.5 || 0.6 DC PERFORMANCE Input Offset Voltage Average Input Offset Voltage Drift Input Bias Current Average Input Bias Current Drift Input Offset Current Average Input Offset Current Drift AVMAX = +10V/V, VCM = 0V, VG = 1V ±4 ±17 AVMAX = +10V/V, VCM = 0V, VG = 1V AVMAX = +10V/V, VCM = 0V, VG = 1V 19 25 AVMAX = +10V/V, VCM = 0V, VG = 1V AVMAX = +10V/V, VCM = 0V, VG = 1V ±0.5 ±2.5 AVMAX = +10V/V, VCM = 0V, VG = 1V Max Current Through Gain Resistance ±17.8 ±19 mV max A ±30 ±30 µV/°C max B 29 31 µA max A ±90 ±90 nA/°C max B ±3.2 ±3.5 µA max A ±16 ±16 nA/°C max B ±2.6 ±2.55 ±2.55 ±2.5 mA max B INPUT Most Positive Common-Mode Input Voltage RL = 100Ω +1.6 +1.6 +1.6 +1.6 V min A Most Negative Common-Mode Input Voltage RL = 100Ω –2.1 –2.1 –2.1 –2.1 V max A VCM = ±0.5V 80 65 60 60 dB min A Common-Mode Rejection Ratio Input Impedance (1) (2) (3) Differential 1 || 1 MΩ || pF typ C Common-Mode 1 || 2 MΩ || pF typ C Test levels: (A) 100% tested at +25°C. Over temperature limits set by characterization and simulation. (B) Limits set by characterization and simulation. (C) Typical value only for information. Junction temperature = ambient for +25°C tested specifications. Junction temperature = ambient at low temperature limit; junction temperature = ambient +23°C at high temperature limit for over temperature specifications. Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): VCA824 3 VCA824 SBOS394C – NOVEMBER 2007 – REVISED DECEMBER 2008....................................................................................................................................... www.ti.com ELECTRICAL CHARACTERISTICS: VS = ±5V (continued) At AVMAX = +10V/V, VG = +1V, RF = 402Ω, RG = 80Ω, and RL = 100Ω, unless otherwise noted. VCA824 MIN/MAX OVER TEMPERATURE TYP PARAMETER CONDITIONS +25°C +25°C (2) 0°C to 70°C (3) –40°C to +85°C (3) UNITS MIN/ MAX TEST LEVEL (1) OUTPUT Output Voltage Swing RL = 1kΩ ±3.9 ±3.6 ±3.4 ±3.3 V min A RL = 100Ω ±3.6 ±3.5 ±3.3 ±3.2 V min A VO = 0V, RL = 10Ω ±90 ±60 ＝50 ＝45 mA min A AVMAX = +10V/V, f > 100kHz 0.01 Ω typ C Output Current Output Impedance POWER SUPPLY Specified Operating Voltage V typ C Minimum Operating Voltage ±5 ±4 ±4 ±4 V min B Maximum Operating Voltage ±6 ±6 ±6 V max A Maximum Quiescent Current VG = 0V 36.5 37.5 38 38.5 mA max A Minimum Quiescent Current VG = 0V 36.5 35 34.5 34 mA max A VG = +1V -68 -61 -59 -58 dB min A –40 to +85 °C typ C DGS, MSOP-10 130 °C/W typ C D, SO-14 80 °C/W typ C Power-Supply Rejection Ratio (-PSRR) THERMAL CHARACTERISTICS Specified Operating Range D Package Thermal Resistance θJA 4 Junction-to-Ambient Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): VCA824 VCA824 www.ti.com....................................................................................................................................... SBOS394C – NOVEMBER 2007 – REVISED DECEMBER 2008 TYPICAL CHARACTERISTICS: VS = ±5V, DC Parameters At TA = +25°C, RL = 100Ω, VG = +1V, and VIN = single-ended input on +VIN with –VIN at ground, unless otherwise noted. MAXIMUM DIFFERENTIAL INPUT VOLTAGE vs RG MAXIMUM GAIN ADJUST RANGE vs RF 40 IRG MAX = 2.6mA VIN MAX(VPP) = 2 ´ RG ´ IRG MAX (AP) Maximum Gain Adjust Range (dB) Differential Input Voltage (VPP) 10 1 10 100 1k 25 VO = 1VPP 20 VO = 2VPP 15 VO = 4VPP 10 VO = 3VPP 5 100 Figure 1. Figure 2. MAXIMUM GAIN ADJUST RANGE vs PEAK-TO-PEAK OUTPUT VOLTAGE GAIN ERROR BAND vs GAIN CONTROL VOLTAGE 50 RF = 3kW RF = 4kW Gain (V/V) 40 RF = 5kW 30 RF = 500W 20 RF = 1.5kW RF = 2kW 0 0.1 11 10 9 8 7 6 5 Absolute Error Relative Error to Maximum Gain 4 3 2 1 0 RF = 1kW 10 1 -1 -1.2 10 -0.8 0 -0.4 0.4 0.8 Output Voltage (VPP) Control Voltage (V) Figure 3. Figure 4. GAIN ERROR BAND vs GAIN CONTROL VOLTAGE GAIN ERROR BAND vs GAIN CONTROL VOLTAGE 21 Data Equation: y = 20log (4.9619x + 5.0169) 19 Gain (dB) 18 Data 17 16 Relative Error to Linear Regression 15 14 Linear Regression 13 0 10k Feedback Resistor (W) IRG = 2.6mA AVMAX(V/V) = 2 ´ [RF/VIN(VPP)] ´ 2 ´ IRG (AP) 20 1k Gain Resistor (W) 60 Maximum Gain Adjust Range (dB) 30 0 0.1 Gain (dB) IRG = 2.6mA AVMAX(V/V) = 2 ´ [RF/VIN(VPP)] ´ 2 ´ IRG (AP) 35 0.2 0.4 0.6 0.8 1.0 24 22 20 18 16 14 12 10 8 6 4 2 0 -2 -4 -6 -0.8 1.2 Relative Error to Linear Regression Linear Regression Data Equation: y = 20log (4.9619x + 5.0169) Data -0.6 -0.4 -0.2 0 0.2 0.4 Control Voltage (V) Control Voltage (V) Figure 5. Figure 6. 0.6 0.8 Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): VCA824 1.0 5 VCA824 SBOS394C – NOVEMBER 2007 – REVISED DECEMBER 2008....................................................................................................................................... www.ti.com TYPICAL CHARACTERISTICS: VS = ±5V, DC and Power-Supply Parameters At TA = +25°C, RL = 100Ω, VG = +1V, and VIN = single-ended input on +VIN with –VIN at ground, unless otherwise noted. SUPPLY CURRENT vs CONTROL VOLTAGE (AVMAX = +2V/V) RECOMMENDED RF vs AVMAX 460 40 For > 40dB Gain Adjust Range Quiescent Current (mA) 39 440 430 420 410 400 390 Quiescent Current (mA) 1 10 38 -IQ 37 +IQ 36 35 34 NOTE: -3dB bandwidth varies with package type. See the Applications Information section for more details. 33 -1.0 -0.8 -0.6 -0.4 -0.2 100 0 0.2 0.4 0.6 0.8 AVMAX (V/V) Gain Control Voltage (V) Figure 7. Figure 8. SUPPLY CURRENT vs CONTROL VOLTAGE (AVMAX = +10V/V) SUPPLY CURRENT vs CONTROL VOLTAGE (AVMAX = +40V/V) 40 40 39 39 Quiescent Current (mA) Feedback Resistor (W) 450 38 -IQ 37 +IQ 36 35 34 1.0 38 -IQ 37 +IQ 36 35 34 33 -1.0 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 33 -1.0 -0.8 -0.6 -0.4 -0.2 1.0 0 0.2 0.4 Gain Control Voltage (V) Gain Control Voltage (V) Figure 9. Figure 10. 0.6 0.8 1.0 TYPICAL DC DRIFT vs TEMPERATURE 30 0.1 Input Offset Voltage (mV) 0 25 -0.1 20 -0.2 15 -0.3 10 Input Offset Voltage (VOS) Left Scale -0.4 -0.5 5 0 10x Input Offset Current (IOS) Right Scale -0.6 Input Bias and Offset Current (mA) Input Bias Current (IB) Right Scale -5 -50 -25 0 25 50 75 100 125 Temperature (°C) Figure 11. 6 Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): VCA824 VCA824 www.ti.com....................................................................................................................................... SBOS394C – NOVEMBER 2007 – REVISED DECEMBER 2008 TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = +2V/V At TA = +25°C, RL = 100Ω, RF = 453Ω, RG = 453Ω, VG = +1V, VIN = single-ended input on +VIN with –VIN at ground, and SO-14 package, unless otherwise noted. SMALL-SIGNAL FREQUENCY RESPONSE LARGE-SIGNAL FREQUENCY RESPONSE 3 3 VO = 0.5VPP VG = 0V 0 Normalized Gain (dB) Normalized Gain (dB) 0 -3 VG = +1V -6 -9 -12 -3 VO = 1VPP -6 VO = 2VPP -9 VO = 4VPP -12 VO = 5VPP AVMAX = +2V/V VIN = 1VPP RL = 100W -15 -18 1M -15 -18 10M 100M 1G 1M Figure 12. Figure 13. SMALL-SIGNAL PULSE RESPONSE LARGE-SIGNAL PULSE RESPONSE VIN = 250mVPP f = 20MHz VIN = 2VPP f = 20MHz 3 Output Voltage (V) 200 100 0 -100 2 1 0 -1 -2 -200 -3 -300 Time (10ns/div) Time (10ns/div) Figure 14. Figure 15. COMPOSITE VIDEO dG/dP GAIN FLATNESS, DEVIATION FROM LINEAR PHASE 0 0 -0.3 -0.015 -0.020 -dP, VG = 0V -0.5 -0.025 -0.6 -0.030 -dP, VG = +1V -0.8 -0.040 -0.045 -0.9 3 0.1 0.10 0 0.05 0 -0.1 Right Scale -0.2 -0.05 -0.3 -0.10 -0.035 -dG, VG = +1V 2 Magnitude (dB) -0.010 Differential Phase (°) Differential Gain (%) -dG, VG = 0V 0.15 Left Scale -0.005 -0.2 -0.7 0.2 4 -0.4 -0.15 AVMAX = +2V/V VG = +1V -0.5 Deviation from Linear Phase (°) -0.1 1 1G 4 300 -0.4 100M Frequency (Hz) 400 Output Voltage (mV) 10M Frequency (Hz) -0.20 0 50 100 150 200 Frequency (MHz) Number of Video Loads Figure 16. Figure 17. Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): VCA824 7 VCA824 SBOS394C – NOVEMBER 2007 – REVISED DECEMBER 2008....................................................................................................................................... www.ti.com TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = +2V/V (continued) At TA = +25°C, RL = 100Ω, RF = 453Ω, RG = 453Ω, VG = +1V, VIN = single-ended input on +VIN with –VIN at ground, and SO-14 package, unless otherwise noted. HARMONIC DISTORTION vs LOAD RESISTANCE -60 -60 -65 -65 -70 3rd-Harmonic -75 -80 AVMAX = +2V/V VG = +1V VO = 2VPP RL = 100W 2nd-Harmonic -85 Harmonic Distortion (dBc) Harmonic Distortion (dBc) HARMONIC DISTORTION vs FREQUENCY -90 1 10 2nd-Harmonic -75 -80 3rd-Harmonic -85 -40 -45 100 1k Frequency (MHz) Resistance (W) Figure 18. Figure 19. HARMONIC DISTORTION vs OUTPUT VOLTAGE HARMONIC DISTORTION vs GAIN CONTROL VOLTAGE -10 AVMAX = +2V/V VG = +1V RL = 100W f = 20MHz -35 100 -50 -55 -60 -65 2nd-Harmonic -70 -75 3rd-Harmonic -30 Maximum Current Through RG Limited -40 -50 3rd-Harmonic -60 -70 2nd-Harmonic -80 -80 -85 0.1 AVMAX = +2V/V VO = 2VPP RL = 100W f = 20MHz -20 Maximum Current Through RG Limited Harmonic Distortion (dBc) -30 Harmonic Distortion (dBc) -70 -90 0.1 1 -90 -0.6 10 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0 Output Voltage Swing (VPP) Gain Control Voltage (V) Figure 20. Figure 21. TWO-TONE, 3RD-ORDER INTERMODULATION INTERCEPT TWO-TONE, 3RD-ORDER INTERMODULATION INTERCEPT vs GAIN CONTROL VOLTAGE 38 40 36 35 Intercept Point (+dBm) Intercept Point (+dBm) AVMAX = +2V/V VG = +1V VO = 2VPP f = 20MHz 34 32 30 28 f = 20MHz At 50W Matched Load Constant Input Voltage Constant Output Voltage 30 25 20 15 26 At 50W Matched Load 24 0 8 10 20 30 40 50 60 70 80 90 100 10 -0.6 -0.4 -0.2 0 0.2 0.4 Frequency (MHz) Gain Control Voltage (V) Figure 22. Figure 23. Submit Documentation Feedback 0.6 0.8 1.0 Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): VCA824 VCA824 www.ti.com....................................................................................................................................... SBOS394C – NOVEMBER 2007 – REVISED DECEMBER 2008 TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = +2V/V (continued) At TA = +25°C, RL = 100Ω, RF = 453Ω, RG = 453Ω, VG = +1V, VIN = single-ended input on +VIN with –VIN at ground, and SO-14 package, unless otherwise noted. GAIN vs GAIN CONTROL VOLTAGE GAIN CONTROL FREQUENCY RESPONSE 2.2 2.0 1.8 1.6 3 VG = 0VDC + 10mVPP VIN = 0.5VDC Normalized Gain (dB) 0 Gain (V/V) 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 -3 -6 -9 -0.2 -1.2 -0.8 0 -0.4 0.4 0.8 -12 1.2 1M 100M Frequency (Hz) Figure 24. Figure 25. GAIN CONTROL PULSE RESPONSE 1G FULLY-ATTENUATED RESPONSE 4 2 1 0 1.5 -1 1.0 0 VG = +1V -10 -20 Gain (dB) 3 10 Output Voltage (V) VIN = 1VDC Input Voltage (V) 10M Gain Control Voltage (V) -30 -40 -50 VG = -1V -60 0.5 -70 0 -80 -0.5 -90 -1.0 -100 VG = 2VPP 1M Time (10ns/div) 10M 100M 1G Frequency (Hz) Figure 26. Figure 27. GROUP DELAY vs GAIN CONTROL VOLTAGE GROUP DELAY vs FREQUENCY 2.0 1.6 1.8 1.4 10MHz 1.6 Group Delay (ns) Group Delay (ns) 1.2 1.4 1.2 1.0 0.8 1MHz 20MHz 0.6 1.0 0.8 0.6 0.4 0.4 VG = +1V VO = 1VPP 0.2 0.2 0 -1.0 -0.8 -0.6 -0.4 -0.2 0 0 0.2 0.4 0.6 0.8 1.0 0 20 40 60 Gain Control Voltage (V) Frequency (MHz) Figure 28. Figure 29. 80 Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): VCA824 100 9 VCA824 SBOS394C – NOVEMBER 2007 – REVISED DECEMBER 2008....................................................................................................................................... www.ti.com TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = +2V/V (continued) At TA = +25°C, RL = 100Ω, RF = 453Ω, RG = 453Ω, VG = +1V, VIN = single-ended input on +VIN with –VIN at ground, and SO-14 package, unless otherwise noted. RECOMMENDED RS vs CAPACITIVE LOAD FREQUENCY RESPONSE vs CAPACITIVE LOAD 9 100 VO = 0.5VPP CL = 10pF 6 CL = 22pF CL = 100pF RS (W) RS (W) 3 10 CL = 47pF 0 RF -3 VIN + RS VCA824 NOTE: (1) 1kW is optional. -9 1 10 100 1 1k 10 100 Capacitive Load (pF) Capacitive Load (pF) Figure 30. Figure 31. OUTPUT VOLTAGE NOISE DENSITY 1k INPUT CURRENT NOISE DENSITY 200 10 Input Voltage Noise Density (pA/ÖHz) Output Voltage Noise Density (nV/ÖHz) 1kW(1) - 0.1dB Flatness Targeted 1 VG = 0V 100 VG = +1V VG = -1V 10 1 100 10 VOUT CL -6 1k 10k 100k 1M 10M 100 1k 10k 100k Frequency (Hz) Frequency (Hz) Figure 32. Figure 33. Submit Documentation Feedback 1M 10M Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): VCA824 VCA824 www.ti.com....................................................................................................................................... SBOS394C – NOVEMBER 2007 – REVISED DECEMBER 2008 TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = +10V/V At TA = +25°C, RL = 100Ω, RF = 402Ω, RG = 80Ω, VG = +1V, and VIN = single-ended input on +VIN with –VIN at ground, unless otherwise noted. SMALL-SIGNAL FREQUENCY RESPONSE LARGE-SIGNAL FREQUENCY RESPONSE 3 3 VG = 0V 0 Normalized Gain (dB) Normalized Gain (dB) 0 -3 -6 VG = +1V -9 -12 AVMAX = +10V/V VIN = 200mVPP RG = 100W -15 -18 1M VO = 1VPP -3 VO = 0.5VPP -6 -9 -12 VO = 4VPP -15 VO = 2VPP -18 10M 100M 1G 0 Figure 35. VIN = 50mVPP f = 20MHz 1G VIN = 400mVPP f = 20MHz Output Voltage (V) 2 100 0 -100 1 0 -1 -2 -200 -3 -300 Time (10ns/div) Time (10ns/div) Figure 36. Figure 37. OUTPUT VOLTAGE NOISE DENSITY 0.20 Left Scale -0.1 0.10 -0.2 0.05 0 -0.3 Right Scale -0.05 -0.4 -0.10 AVMAX = +10V/V VG = +1V -0.15 -0.6 50 100 150 200 Deviation from Linear Phase (°) 0.15 0 Output Voltage Noise Density (nV/ÖHz) GAIN FLATNESS, DEVIATION FROM LINEAR PHASE 0.1 Magnitude (dB) 800M LARGE-SIGNAL PULSE RESPONSE 3 200 0 600M Figure 34. SMALL-SIGNAL PULSE RESPONSE -0.5 400M Frequency (Hz) 300 Output Voltage (mV) 200M Frequency (Hz) 200 VG = +1V 100 VG = -1V VG = 0V 10 100 Frequency (MHz) 1k 10k 100k 1M 10M Frequency (Hz) Figure 38. Figure 39. Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): VCA824 11 VCA824 SBOS394C – NOVEMBER 2007 – REVISED DECEMBER 2008....................................................................................................................................... www.ti.com TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = +10V/V (continued) At TA = +25°C, RL = 100Ω, RF = 402Ω, RG = 80Ω, VG = +1V, and VIN = single-ended input on +VIN with –VIN at ground, unless otherwise noted. HARMONIC DISTORTION vs LOAD RESISTANCE -50 -66 -55 -68 Harmonic Distortion (dBc) Harmonic Distortion (dBc) HARMONIC DISTORTION vs FREQUENCY -60 3rd-Harmonic -65 -70 -75 AVMAX = +10V/V VG = +1V VO = 2VPP RL = 100W 2nd-Harmonic -80 -72 3rd-Harmonic -74 -76 -78 2nd-Harmonic -85 -80 0.1 1 10 -40 100 1k Resistance (W) Figure 40. Figure 41. HARMONIC DISTORTION vs OUTPUT VOLTAGE HARMONIC DISTORTION vs GAIN CONTROL VOLTAGE -10 AVMAX = +10V/V VG = +1V RL = 100W f = 20MHz -30 100 Frequency (MHz) Maximum Current Through RG Limited Harmonic Distortion (dBc) -20 Harmonic Distortion (dBc) -70 AVMAX = +10V/V VG = +1V VO = 1VPP f = 20MHz -50 -60 2nd-Harmonic -70 3rd-Harmonic AVMAX = +10V/V VO = 2VPP RL = 100W f = 20MHz -20 -30 Maximum Current Through RG Limited -40 3rd-Harmonic -50 -80 -60 -90 -70 -0.6 2nd-Harmonic 0.1 1 10 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0 Output Voltage Swing (VPP) Gain Control Voltage (V) Figure 42. Figure 43. TWO-TONE, 3RD-ORDER INTERMODULATION INTERCEPT TWO-TONE, 3RD-ORDER INTERMODULATION INTERCEPT vs GAIN CONTROL VOLTAGE 34 35 32 30 Intercept Point (+dBm) Intercept Point (+dBm) Constant Input Voltage 30 28 Constant Output Voltage 25 20 15 26 f = 20MHz At 50W Matched Load At 50W Matched Load 24 0 12 10 20 30 40 50 60 70 80 90 100 10 -0.6 -0.4 -0.2 0 0.2 0.4 Frequency (MHz) Gain Control Voltage (V) Figure 44. Figure 45. Submit Documentation Feedback 0.6 0.8 1.0 Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): VCA824 VCA824 www.ti.com....................................................................................................................................... SBOS394C – NOVEMBER 2007 – REVISED DECEMBER 2008 TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = +10V/V (continued) At TA = +25°C, RL = 100Ω, RF = 402Ω, RG = 80Ω, VG = +1V, and VIN = single-ended input on +VIN with –VIN at ground, unless otherwise noted. GAIN CONTROL FREQUENCY RESPONSE 3 0 Normalized Gain (dB) Gain (V/V) GAIN vs GAIN CONTROL VOLTAGE 11 10 9 8 7 6 5 4 3 2 1 0 -3 -6 -9 -12 -1 -1.2 -15 -0.8 0 -0.4 0.4 0.8 1.2 1M 10M 100M Gain Control Voltage (V) Frequency (Hz) Figure 46. Figure 47. GAIN CONTROL PULSE RESPONSE 1 0 -1 1.5 4 3 Output Voltage (V) 2 5 Output Voltage (V) VIN = 0.2VDC 1G OUTPUT VOLTAGE AND CURRENT LIMITATIONS 3 Input Voltage (V) VG = 0VDC + 10mVPP VIN = 0.1VDC 1.0 0.5 1W Internal Power Dissipation 100W Load 2 1 50W Load 0 25W Load -1 -2 0 -3 -0.5 -4 -5 -150 -1.0 Time (10ns/div) 1W Internal Power Dissipation -100 -50 0 50 100 150 Output Current (mA) Figure 48. Figure 49. IRG LIMITED OVERDRIVE RECOVERY 0.4 0.3 Input Voltage (V) VG = +1V VG = -1V Input Referred VO = 2VPP 2.0 AVMAX = +10V/V VG = -0.3V Input Voltage Left Scale 1.0 0.1 0.5 0 -0.1 0 Output Voltage Right Scale 10M 100M -0.5 -0.2 -1.0 -0.3 -1.5 -0.4 1M 1.5 0.2 1G Output Voltage (V) Gain (dB) FULLY-ATTENUATED RESPONSE 30 20 10 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -2.0 Time (40ns/div) Frequency (Hz) Figure 50. Figure 51. Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): VCA824 13 VCA824 SBOS394C – NOVEMBER 2007 – REVISED DECEMBER 2008....................................................................................................................................... www.ti.com TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = +10V/V (continued) At TA = +25°C, RL = 100Ω, RF = 402Ω, RG = 80Ω, VG = +1V, and VIN = single-ended input on +VIN with –VIN at ground, unless otherwise noted. OUTPUT LIMITED OVERDRIVE RECOVERY Output Voltage Right Scale 2 0 0 -0.4 -2 Input Voltage Left Scale 10MHz 4 0.2 -0.2 1.65 1.60 Output Voltage (V) Input Voltage (V) 0.4 GROUP DELAY vs GAIN CONTROL VOLTAGE 6 AVMAX = +10V/V VG = +1V 1.55 1MHz 1.50 20MHz 1.45 -4 -0.6 Group Delay (ns) 0.6 -6 1.40 -1.0 -0.8 -0.6 -0.4 -0.2 Time (40ns/div) 0 0.2 0.4 0.6 0.8 1.0 Gain Control Voltage (V) Figure 52. Figure 53. GROUP DELAY vs FREQUENCY 1.8 1.6 Group Delay (ns) 1.4 1.2 1.0 0.8 0.6 0.4 VG = +1V VO = 1VPP 0.2 0 0 20 40 60 80 100 Frequency (MHz) Figure 54. 14 Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): VCA824 VCA824 www.ti.com....................................................................................................................................... SBOS394C – NOVEMBER 2007 – REVISED DECEMBER 2008 TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = +40V/V At TA = +25°C, RL = 100Ω, RF = 402Ω, RG = 18Ω, VG = +1V, VIN = single-ended input on +VIN with –VIN at ground, and SO-14 package, unless otherwise noted. SMALL-SIGNAL FREQUENCY RESPONSE LARGE-SIGNAL FREQUENCY RESPONSE 3 3 0 0 Normalized Gain (dB) Normalized Gain (dB) VG = 0V -3 -6 VG = +1V -9 -12 AVMAX = +40V/V VIN = 50mVPP RL = 100W -15 -18 1M -3 VO = 0.5VPP VO = 4VPP -6 VO = 1VPP -9 -12 VO = 2VPP -15 -18 10M 100M 1G 0 100 200 200 400 Frequency (Hz) Frequency (MHz) Figure 55. Figure 56. SMALL-SIGNAL PULSE RESPONSE 500 600 LARGE-SIGNAL PULSE RESPONSE 400 2.5 VIN = 12.5mVPP f = 20MHz 300 VIN = 100mVPP f = 20MHz 2.0 Output Voltage (mV) 1.5 Output Voltage (V) 200 100 0 -100 1.0 0.5 0 -0.5 -1.0 -1.5 -200 -2.0 -2.5 -300 Time (10ns/div) Time (10ns/div) Figure 57. Figure 58. 0.10 0.05 0 0 -0.1 -0.2 -0.05 -0.3 -0.10 -0.4 -0.15 -0.20 -0.5 0 20 40 60 200 Deviation from Linear Phase (°) AVMAX = +40V/V VG = +1V 0.1 Magnitude (dB) OUTPUT VOLTAGE NOISE DENSITY 0.15 Output Voltage Noise Density (nV/ÖHz) GAIN FLATNESS, DEVIATION FROM LINEAR PHASE 0.2 1000 VG = +1V VG = 0V 100 VG = -1V 10 100 Frequency (MHz) 1k 10k 100k 1M 10M Frequency (Hz) Figure 59. Figure 60. Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): VCA824 15 VCA824 SBOS394C – NOVEMBER 2007 – REVISED DECEMBER 2008....................................................................................................................................... www.ti.com TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = +40V/V (continued) At TA = +25°C, RL = 100Ω, RF = 402Ω, RG = 18Ω, VG = +1V, VIN = single-ended input on +VIN with –VIN at ground, and SO-14 package, unless otherwise noted. HARMONIC DISTORTION vs FREQUENCY -35 -50 AVMAX = +40V/V VG = +1V VO = 2VPP RL = 100W -45 -55 Harmonic Distortion (dBc) -40 Harmonic Distortion (dBc) HARMONIC DISTORTION vs LOAD RESISTANCE -50 -55 -60 2nd-Harmonic -65 -60 3rd-Harmonic -65 -70 -75 -80 3rd-Harmonic -70 -85 0.1 -30 100 100 Figure 61. Figure 62. HARMONIC DISTORTION vs OUTPUT VOLTAGE HARMONIC DISTORTION vs GAIN CONTROL VOLTAGE -10 AVMAX = +40V/V VO = 2VPP RL = 100W f = 20MHz Maximum Current Through RG Limited -15 Maximum Current Through RG Limited 2nd-Harmonic -60 3rd-Harmonic -70 -20 -25 -30 -35 -40 3rd-Harmonic 2nd-Harmonic -45 -50 -80 0.1 1 -55 -0.6 10 -0.4 -0.2 0 0.2 0.6 0.8 1.0 Gain Control Voltage (V) Figure 63. Figure 64. TWO-TONE, 3RD-ORDER INTERMODULATION INTERCEPT TWO-TONE, 3RD-ORDER INTERMODULATION INTERCEPT vs GAIN CONTROL VOLTAGE 35 32 Intercept Point (+dBm) 30 30 28 26 Constant Input Voltage 25 Constant Output Voltage 20 15 24 f = 20MHz At 50W Matched Load At 50W Matched Load 22 0 16 0.4 Output Voltage Swing (VPP) 34 Intercept Point (+dBm) 1k Resistance (W) -40 -50 2nd-Harmonic Frequency (MHz) AVMAX = +40V/V VG = +1V RL = 100W f = 20MHz -20 Harmonic Distortion (dBc) 10 Harmonic Distortion (dBc) -10 1 AVMAX = +40V/V VG = +1V VO = 1VPP f = 20MHz 10 20 30 40 50 60 70 80 90 100 10 -0.6 -0.4 -0.2 0 0.2 0.4 Frequency (MHz) Gain Control Voltage (V) Figure 65. Figure 66. Submit Documentation Feedback 0.6 0.8 1.0 Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): VCA824 VCA824 www.ti.com....................................................................................................................................... SBOS394C – NOVEMBER 2007 – REVISED DECEMBER 2008 TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = +40V/V (continued) At TA = +25°C, RL = 100Ω, RF = 402Ω, RG = 18Ω, VG = +1V, VIN = single-ended input on +VIN with –VIN at ground, and SO-14 package, unless otherwise noted. GAIN vs GAIN CONTROL VOLTAGE GAIN CONTROL FREQUENCY RESPONSE 45 3 40 0 Normalized Gain (dB) Intercept Point (+dBm) 35 30 25 20 15 10 -3 -6 -9 -12 5 -15 0 -5 -1.2 VG = 0VDC + 10mVPP VIN = 10mVDC -18 -0.8 -0.4 0 0.4 0.8 1.2 1M 10M Frequency (Hz) Figure 67. Figure 68. 1G FULLY ATTENUATED RESPONSE VIN = 50mVDC 2 1 0 -1 40 30 VG = +1V 20 10 0 Gain (dB) 3 Output Voltage (V) GAIN CONTROL PULSE RESPONSE 1.5 Input Voltage (V) 100M Gain Control Voltage (V) 1.0 -10 -20 -30 -40 0.5 VG = -1V -50 0 Input Referred -60 -0.5 -70 -1.0 -80 VO = 2VPP 1M Time (10ns/div) 10M 100M 1G Frequency (Hz) Figure 69. Figure 70. IRG LIMITED OVERDRIVE RECOVERY 0.4 1.2 0.8 0.1 0.4 0 0 -0.1 -0.4 -0.2 -0.8 -0.3 Output Voltage Right Scale -0.4 -1.2 -1.6 6 AVMAX = +40V/V VG = +1V Output Voltage Right Scale 4 0.1 2 0 0 -0.1 -0.2 -2 Input Voltage Left Scale -0.3 Output Voltage (V) 0.2 0.2 Input Voltage (V) AVMAX = +40V/V VG = -0.3V Input Voltage Left Scale Output Voltage (V) Input Voltage (V) 0.3 OUTPUT LIMITED OVERDRIVE RECOVERY 0.3 1.6 -4 -6 Time (40ns/div) Time (40ns/div) Figure 71. Figure 72. Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): VCA824 17 VCA824 SBOS394C – NOVEMBER 2007 – REVISED DECEMBER 2008....................................................................................................................................... www.ti.com TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = +40V/V (continued) At TA = +25°C, RL = 100Ω, RF = 402Ω, RG = 18Ω, VG = +1V, VIN = single-ended input on +VIN with –VIN at ground, and SO-14 package, unless otherwise noted. GROUP DELAY vs GAIN CONTROL VOLTAGE GROUP DELAY vs FREQUENCY 2.5 2.15 10MHz 2.10 2.0 Group Delay (ns) Group Delay (ns) 20MHz 2.05 2.00 1MHz 1.95 1.90 1.5 1.0 0.5 VG = +1V VO = 1VPP 1.85 1.80 -1.0 -0.8 -0.6 -0.4 -0.2 18 0 0 0.2 0.4 0.6 0.8 1.0 0 20 40 60 Gain Control Voltage (V) Frequency (MHz) Figure 73. Figure 74. Submit Documentation Feedback 80 100 Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): VCA824 VCA824 www.ti.com....................................................................................................................................... SBOS394C – NOVEMBER 2007 – REVISED DECEMBER 2008 APPLICATION INFORMATION WIDEBAND VARIABLE GAIN AMPLIFIER OPERATION For test purposes, the input impedance is set to 50Ω with a resistor to ground and the output impedance is set to 50Ω with a series output resistor. Voltage swings reported in the Electrical Characteristics table are taken directly at the input and output pins, while output power (dBm) is at the matched 50Ω load. For the circuit in Figure 75, the total effective load is 100Ω 1kΩ. Note that for the SO-14 package, there is a voltage reference pin, VREF (pin 9). For the SO-14 package, this pin must be connected to ground through a 20Ω resistor in order to avoid possible oscillations of the output stage. In the MSOP-10 package, this pin is internally connected and does not require such precaution. An X2Y® capacitor has been used for power-supply bypassing. The combination of low inductance, high resonance frequency, and integration of three capacitors in one package (two capacitors to ground and one across the supplies) enables the VCA824 to achieve the low second-harmonic distortion reported in the Electrical Characteristics table. More information on how the VCA824 operates can be found in the Operating Suggestions section. The VCA824 provides an exceptional combination of high output power capability with a wideband, greater than 40dB gain adjust range, linear in V/V variable gain amplifier. The VCA824 input stage places the transconductance element between two input buffers, using the output currents as the forward signal. As the differential input voltage rises, a signal current is generated through the gain element. This current is then mirrored and gained by a factor of two before reaching the multiplier. The other input of the multiplier is the voltage gain control pin, VG. Depending on the voltage present on VG, up to two times the gain current is provided to the transimpedance output stage. The transimpedance output stage is a current-feedback amplifier providing high output current capability and high slew rate, 2500V/µs. This exceptional full-power performance comes at the price of relatively high quiescent current (36.5mA), but low input voltage noise for this type of architecture (6nV/√Hz). Figure 75 shows the dc-coupled, gain of +10V/V, dual power-supply circuit used as the basis of the ±5V Electrical Characteristics and Typical Characteristics. ® 0.1mF +5V X2Y Capacitor Detail X2Yâ Capacitor (see detail) +VS -5V A G1 + 2.2mF VG B -VS +VIN VIN 20W x1 FB IRG RG+ RG 200W G2 + 2.2mF RF 1kW x2 RG- VOUT VOUT x1 20W -VIN VREF SO-14 VCA824 20W Figure 75. DC-Coupled, AVMAX = +10V/V, Bipolar Supply Specification and Test Circuit Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): VCA824 19 VCA824 SBOS394C – NOVEMBER 2007 – REVISED DECEMBER 2008....................................................................................................................................... www.ti.com FOUR-QUADRANT MULTIPLIER DIFFERENCE AMPLIFIER A four-quadrant multiplier can easily be implemented using the VCA824. By placing a resistor between FB and VIN, the transfer function depends upon both VIN and VG, as shown in Equation 1. Because both inputs of the VCA824 are high-impedance, a difference amplifier can be implemented without any major problem. Figure 78 shows this implementation. This circuit provides excellent common-mode rejection ratio (CMRR) as long as the input is within the CMRR range of –2.1V to +1.6V. Note that this circuit does not make use of the gain control pin, VG. Also, it is recommended to choose RS such that the pole formed by RS and the parasitic input capacitance does not limit the bandwidth of the circuit. Figure 79 shows the common-mode rejection ratio for this circuit implemented in a gain of +10V/V for VG = +1V. Note that because the gain control voltage is fixed and is normally set to +1V, the feedback element can be reduced in order to increase the bandwidth. When reducing the feedback element, make sure that the VCA824 is not limited by common-mode input voltage, the current flowing through RG, or any other limitation described in this data sheet. RF VOUT = RG RF ´ VG ´ VIN + - RG RF ´ VIN R1 (1) Setting R1 to equal RG, the term that depends only on VIN drops out of the equation, leaving only the term that depends on both VG and VIN. VOUT then follows Equation 2. RF VOUT = ´ VIN ´ VG RG (2) R1 VG RF VIN +VIN RG+ RS Source Impedance RF FB VCA824 R2 RG VIN+ +VIN RG+ RS RG-VIN RG RG-VIN 20W R3 FB VCA824 VIN- 20W RS Figure 76. Four-Quadrant Multiplier Circuit Figure 78. Difference Amplifier 1.5 fIN = 1MHz fVG = 0.1MHz Amplitude (V) 1.0 0.5 0 85 Common-Mode Rejection Ratio (dB) Figure 77 illustrates the behavior of this circuit. Keeping the input amplitude of a 1MHz signal constant and varying the VG voltage (100kHz, 2VPP) gives the modulated output voltage shown in Figure 77. 80 Input Referred 75 70 65 60 55 50 45 40 -0.5 VIN 10k VOUT 100k 1M 10M 100M Frequency (Hz) -1.0 VG Figure 79. Common-Mode Rejection Ratio -1.5 0 1 2 3 4 5 6 7 8 9 10 Time (ms) Figure 77. Modulated Output Signal of the 4-Quadrant Multiplexer Circuit 20 Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): VCA824 VCA824 www.ti.com....................................................................................................................................... SBOS394C – NOVEMBER 2007 – REVISED DECEMBER 2008 DIFFERENTIAL EQUALIZER 9 Equalized Frequency Response 6 3 0 Gain (dB) If the application requires frequency shaping (the transition from one gain to another), the VCA824 can be used advantageously because its architecture allows the application to isolate the input from the gain setting elements. Figure 80 shows an implementation of such a configuration. The transfer function is shown in Equation 3. RF 1 + sRGC1 ´ G=2´ RG 1 + sR1C1 (3) Initial Frequency Response of the VCA824 with RC Load -3 -6 -9 -12 -15 -18 -21 -24 1M +VIN RG+ RS R1 1G VCA824 C1 DIFFERENTIAL CABLE EQUALIZER RGVIN2 100M Figure 81. Differential Equalization of an RC Load FB RG 10M Frequency (Hz) -VIN 20W RS Figure 80. Differential Equalizer This transfer function has one pole, P1 (located at RGC1), and one zero, Z1 (located at R1C1). When equalizing an RC load, RL and CL, compensate the pole added by the load located at RLCL with the zero Z1. Knowing RL, CL, and RG allows the user to select C1 as a first step and then calculate R1. Using RL = 75Ω, CL = 100pF and wanting the VCA824 to operate at a gain of +2V/V, which gives RF = RG = 453kΩ, allows the user to select C1 = 15.5pF to ensure a positive value for the resistor R1. With all these values known, to achieve greater than 300MHz bandwidth, R1 can be calculated to be 20Ω. Figure 81 shows the frequency response for both the initial, unequalized frequency response and the resulting equalized frequency response. A differential cable equalizer can easily be implemented using the VCA824. An example of a cable equalization for 100 feet of Belden Cable 1694F is illustrated in Figure 83, with Figure 82 showing the result for this implementation. This implementation has a maximum error of 0.2dB from dc to 70MHz. 2.0 1694F Cable Attenuation (dB) Equalizer Gain (dB) VIN1 RF 1.5 1.0 Cable Attenuation 0.5 VCA824 Equalization 0 -0.5 -1.0 1 10 100 Frequency (MHz) Figure 82. Cable Attenuation versus Equalizer Gain Note that this implementation shows the cable attenuation side-by-side with the equalization in the same plot. For a given frequency, the equalization function realized with the VCA824 matches the cable attenuation. The circuit in Figure 83 is a driver circuit. To implement a receiver circuit, the signal is received differentially between the +VIN and –VIN inputs. Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): VCA824 21 VCA824 SBOS394C – NOVEMBER 2007 – REVISED DECEMBER 2008....................................................................................................................................... www.ti.com VIN R2 453W +VIN R8 50W RG+ R18 13.6kW R17 6kW R21 3kW R9 432W FB VREF VCA824 C7 300mF RG- GND R1 20W VG -VIN C6 320mF VOUT R10 75W VOUT 75W Load R5 50W C5 4pF VG = +1VDC C9 10mF Figure 83. Differential Cable Equalizer VOLTAGE-CONTROLLED LOW-PASS FILTER In the circuit of Figure 84, the VCA824 serves as the variable-gain element of a voltage-controlled low-pass filter. This section discusses how this implementation expands the circuit voltage swing capability over that normally achieved with the equivalent multiplier implementation. The circuit control voltage, VG, is calculated as according to the simplified relationship described in Equation 4: VOUT R2 1 =´ R2 C VIN R1 1+s G (4) R2 332W 24pF C R1 332W RF 1kW VIN 24pF +VIN RG+ OPA690 RG 200W FB VCA824 Out VOUT RG-VIN 20W 50W VG Figure 84. Voltage-Control Low-Pass Filter The response control results from amplification of the feedback voltage applied to R2. First, consider the case where the VCA824 produces G = 1V/V. Then this circuit performs as if the amplifier were replaced 22 by a short circuit. Visually replacing the amplifier by a short leaves a simple voltage-feedback amplifier with a feedback resistor bypassed by a capacitor. Replacing this gain with a variable gain, G, the pole can be written as shown in Equation 5: G f8 = 2pR2C (5) Because the VCA824 is most linear in the midrange, the median of the adjustable pole should be set at VG = 0V (see Figure 24, Figure 44, Figure 65, and Equation 6). Selecting R1 = R2 = 332Ω, and targeting a median frequency of 10MHz, the capacitance (C) is 24pF. Because the OPA690 was selected for the circuit of Figure 84, and in order to limit peaking in the OPA690 frequency response, a capacitor equal to C was added on the inverting mode to ground. This architecture has the effect of setting the high-frequency noise gain of the OPA690 to +2V/V, ensuring stability and providing flat frequency response. -0.8V £ VG £ 0.8V (6) Once the median frequency is set, the maximum and minimum frequencies can be determined by using VG = –0.8V and VG = +0.8V in the gain equation of Equation 7. Note that this is a first-order analysis and does not take into consideration the open-loop gain limitation of the OPA690. RF VG + 1 G=2´ ´ RG 2 (7) With the components shown, the circuit provides a linear variation of the low-pass cutoff from 2MHz to 20MHz, using –1V ≤ VG ≤ +1V. Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): VCA824 VCA824 www.ti.com....................................................................................................................................... SBOS394C – NOVEMBER 2007 – REVISED DECEMBER 2008 DESIGN-IN TOOLS DEMONSTRATION BOARDS Two printed circuit boards (PCBs) are available to assist in the initial evaluation of circuit performance using the VCA824 in its two package options. Both of these are offered free of charge as unpopulated PCBs, delivered with a user's guide. The summary information for these fixtures is shown in Table 1. Table 1. EVM Ordering Information PRODUCT PACKAGE BOARD PART NUMBER LITERATURE REQUEST NUMBER VCA824ID SO-14 DEM-VCA-SO-1B SBOU050 VCA824IDGS MSOP-10 DEM-VCA-MSOP-1A SBOU051 The demonstration fixtures can be requested at the Texas Instruments web site (www.ti.com) through the VCA824 product folder. MACROMODELS AND APPLICATIONS SUPPORT Computer simulation of circuit performance using SPICE is often useful when analyzing the performance of analog circuits and systems. This principle is particularly true for video and RF amplifier circuits where parasitic capacitance and inductance can play a major role in circuit performance. A SPICE model for the VCA824 is available through the TI web page. The applications group is also available for design assistance. The models available from TI predict typical small-signal ac performance, transient steps, dc performance, and noise under a wide variety of operating conditions. The models include the noise terms found in the electrical specifications of the relevant product data sheet. OPERATING SUGGESTIONS Operating the VCA824 optimally for a specific application requires trade-offs between bandwidth, input dynamic range and the maximum input voltage, the maximum gain of operation and gain, output dynamic range and the maximum input voltage, the package used, loading, and layout and bypass recommendations. The Typical Characteristics have been defined to cover as much ground as possible to describe the VCA824 operation. There are four sections in the Typical Characteristics: • VS = ±5V DC Parameters and VS = ±5V DC and Power-Supply Parameters, which include dc operation and the intrinsic limitation of a VCA824 design • VS = ±5V, AVMAX = +2V/V Gain of +2V/V Operation • VS = ±5V, AVMAX = +10V/V Gain of +10V/V Operation • VS = ±5V, AVMAX = +40V/V Gain of +40V/V Operation Where the Typical Characteristics describe the actual performance that can be achieved by using the amplifier properly, the following sections describe in detail the trade-offs needed to achieve this level of performance. Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): VCA824 23 VCA824 SBOS394C – NOVEMBER 2007 – REVISED DECEMBER 2008....................................................................................................................................... www.ti.com PACKAGE CONSIDERATIONS The VCA824 is available in both SO-14 and MSOP-10 packages. Each package has, for the different gains used in the typical characteristics, different values of RF and RG in order to achieve the same performance detailed in the Electrical Characteristics table. Figure 85 shows a test gain circuit for the VCA824. Table 2 lists the recommended configuration for the SO-14 and MSOP-10 packages. There are no differences between the packages in the recommended values for the gain and feedback resistors. However, the bandwidth for the VCA824IDGS (MSOP-10 package) is lower than the bandwidth for the VCA824ID (SO-14 package). This difference is true for all gains, but especially true for gains greater than 5V/V, as can be seen in Figure 86 and Figure 87. Note that the scale must be changed to a linear scale to view the details. 3 AVMAX = 2V/V +VIN VIN R1 50W Source RF RG+ 50W RG VOUT RGR3 R2 50W Load Normalized Gain (dB) 0 AVMAX = 5V/V -3 -6 -9 AVMAX = 10V/V -12 AVMAX = 20V/V -15 -VIN 50W AVMAX = 40V/V -18 0 200 400 600 800 1000 Frequency (MHz) VG Figure 86. SO-14 Recommended RF and RG versus AVMAX Figure 85. Test Circuit Table 2. SO-14 and MSOP-10 RF and RG Configurations 3 AVMAX = 2V/V G=2 G = 10 G = 100 RF 453Ω 402Ω 402Ω RG 453Ω 80Ω 18Ω Normalized Gain (dB) 0 AVMAX = 5V/V -3 -6 -9 AVMAX = 10V/V -12 AVMAX = 20V/V -15 AVMAX = 40V/V -18 0 200 400 600 800 1000 Frequency (MHz) Figure 87. MSOP-10 Recommended RF and RG versus AVMAX 24 Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): VCA824 VCA824 www.ti.com....................................................................................................................................... SBOS394C – NOVEMBER 2007 – REVISED DECEMBER 2008 MAXIMUM GAIN OF OPERATION This section describes the use of the VCA824 in a fixed-gain application in which the VG control pin is set at VG = +1V. The tradeoffs described here are with bandwidth, gain, and output voltage range. In the case of an application that does not make use of the VGAIN, but requires some other characteristic of the VCA824, the RG resistor must be set such that the maximum current flowing through the resistance IRG is less than ±2.6mA typical, or 5.2mAPP as defined in the Electrical Characteristics table, and must follow Equation 8. VOUT IRG = AVMAX ´ RG (8) As Equation 8 illustrates, once the output dynamic range and maximum gain are defined, the gain resistor is set. This gain setting in turn affects the bandwidth, because in order to achieve the gain (and with a set gain element), the feedback element of the output stage amplifier is set as well. Keeping in mind that the output amplifier of the VCA824 is a current-feedback amplifier, the larger the feedback element, the lower the bandwidth because the feedback resistor is the compensation element. Limiting the discussion to the input voltage only and ignoring the output voltage and gain, Figure 1 illustrates the tradeoff between the input voltage and the current flowing through the gain resistor. OUTPUT CURRENT AND VOLTAGE The VCA824 provides output voltage and current capabilities that are unsurpassed in a low-cost monolithic VCA. Under no-load conditions at +25°C, the output voltage typically swings closer than 1V to either supply rails; the +25°C swing limit is within 1.2V of either rails. Into a 15Ω load (the minimum tested load), it is tested to deliver more than ±160mA. The specifications described above, though familiar in the industry, consider voltage and current limits separately. In many applications, it is the voltage × current, or V-I product, that is more relevant to circuit operation. Refer to the Output Voltage and Current Limitations plot (Figure 49) in the Typical Characteristics. The X- and Y-axes of this graph show the zero-voltage output current limit and the zero-current output voltage limit, respectively. The four quadrants give a more detailed view of the VCA824 output drive capabilities, noting that the graph is bounded by a Safe Operating Area of 1W maximum internal power dissipation. Superimposing resistor load lines onto the plot shows that the VCA824 can drive ±2.5V into 25Ω or ±3.5V into 50Ω without exceeding the output capabilities or the 1W dissipation limit. A 100Ω load line (the standard test circuit load) shows the full ±3.9V output swing capability, as shown in the Typical Characteristics. The minimum specified output voltage and current over-temperature are set by worst-case simulations at the cold temperature extreme. Only at cold startup do the output current and voltage decrease to the numbers shown in the Electrical Characteristic tables. As the output transistors deliver power, the respective junction temperatures increase, thereby increasing the available output voltage swing and output current. In steady-state operation, the available output voltage and current are always greater than the temperature shown in the over-temperature specifications because the output stage junction temperatures are higher than the specified operating ambient. INPUT VOLTAGE DYNAMIC RANGE The VCA824 has a input dynamic range limited to +1.6V and –2.1V. Increasing the input voltage dynamic range can be done by using an attenuator network on the input. If the VCA824 is trying to regulate the amplitude at the output, such as in an AGC application, the input voltage dynamic range is directly proportional to Equation 9. VIN(PP) = RG ´ IRG(PP) (9) As such, for unity-gain or under-attenuated conditions, the input voltage must be limited to the CMIR of ±1.6V (3.2VPP) and the current (IRQ) must flow through the gain resistor, ±2.6mA (5.2mAPP). This configuration sets a minimum value for RE such that the gain resistor must be greater than Equation 10. 3.2VPP RGMIN = = 615.4W 5.2mAPP (10) Values lower than 615.4Ω are gain elements that result in reduced input range, as the dynamic input range is limited by the current flowing through the gain resistor RG (IRG). If the IRG current limits the performance of the circuit, the input stage of the VCA824 goes into overdrive, resulting in limited output voltage range. Such IRG-limited overdrive conditions are shown in Figure 51 for the gain of +10V/V and Figure 71 for the +40V/V gain. Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): VCA824 25 VCA824 SBOS394C – NOVEMBER 2007 – REVISED DECEMBER 2008....................................................................................................................................... www.ti.com OUTPUT VOLTAGE DYNAMIC RANGE OFFSET ADJUSTMENT With its large output current capability and its wide output voltage swing of ±3.9V typical on 100Ω load, it is easy to forget other types of limitations that the VCA824 can encounter. For these limitations, careful analysis must be done to avoid input stage limitation: either voltage or IRG current. Note that if control pin VG varies, the gain limitation may affect other aspects of the circuit. As a result of the internal architecture used on the VCA824, the output offset voltage originates from the output stage and from the input stage and multiplier core. Figure 88 shows how to compensate both sources of the output offset voltage. Use this procedure to compensate the output offset voltage: starting with the output stage compensation, set VG = –1V to eliminate all offset contribution of the input stage and multiplier core. Adjust the output stage offset compensation potentiometer. Finally, set VG = +1V to the maximum gain and adjust the input stage and multiplier core potentiometer. This procedure effectively eliminates all offset contribution at the maximum gain. Because adjusting the gain modifies the contribution of the input stage and the multiplier core, some residual output offset voltage remains. BANDWIDTH The output stage of the VCA824 is a wideband current-feedback amplifier. As such, the feedback resistance is the compensation of the last stage. Reducing the feedback element and maintaining the gain constant limits the useful range of IRG, and therefore, reduces the gain adjust range. For a given gain, reducing the gain element limits the maximum achievable output voltage swing. +5V Output Stage Offset Compensation Circuit 10kW 4kW 0.1mF -5V RF VIN +VIN RG+ 50W RG FB VOUT VCA824 RG-VIN +5V 1kW 50W 10kW 0.1mF -5V Input Stage and Multiplexer Core Offset Compensation Circuit Figure 88. Adjusting the Input and Output Voltage Sources 26 Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): VCA824 VCA824 www.ti.com....................................................................................................................................... SBOS394C – NOVEMBER 2007 – REVISED DECEMBER 2008 NOISE This model is formulated in Equation 11 and Figure 89. The VCA824 offers 6nV/√Hz input-referred voltage noise density at a gain of +10V/V and 2.6pA/√Hz input-referred current noise density. The input-referred voltage noise density considers that all noise terms (except the input current noise but including the thermal noise of both the feedback resistor and the gain resistor) are expressed as one term. eO = AVMAX ´ 2 ´ (RS ´ in)2 + en2 + 2 ´ 4kTRS (11) A more complete model is shown in Figure 90. For additional information on this model and the actual modeled noise terms, please contact the High-Speed Product Application Support team at www.ti.com. RF in RS +VIN RG+ eO RG FB VCA824 eO RG-VIN * 4kTRS in RS * 4kTRS NOTE: RF and RG are noiseless. Figure 89. Simple Noise Model VG inINPUT VG +VIN V+ RS1 * * enINPUT 4kTRS1 FB x1 RF +RG * inINPUT VOUT RG (Noiseless) ICORE 4kTRF * eO iinOUTPUT -RG VREF x1 RF enOUTPUT * enINPUT iniOUTPUT * -VIN 4kTRF VRS2 inINPUT GND * 4kTRS2 Figure 90. Full Noise Model Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): VCA824 27 VCA824 SBOS394C – NOVEMBER 2007 – REVISED DECEMBER 2008....................................................................................................................................... www.ti.com THERMAL ANALYSIS The VCA824 does not require heatsinking or airflow in most applications. The maximum desired junction temperature sets the maximum allowed internal power dissipation as described in this section. In no case should the maximum junction temperature be allowed to exceed +150°C. Operating junction temperature (TJ) is given by Equation 12: TJ = TA + PD ´ qJA (12) The total internal power dissipation (PD) is the sum of quiescent power (PDQ) and additional power dissipated in the output stage (PDL) to deliver load power. Quiescent power is simply the specified no-load supply current times the total supply voltage across the part. PDL depends on the required output signal and load; for a grounded resistive load, however, it is at a maximum when the output is fixed at a voltage equal to one-half of either supply voltage (for equal bipolar supplies). Under this worst-case condition, PDL = VS2/(4 × RL), where RL is the resistive load. Note that it is the power in the output stage and not in the load that determines internal power dissipation. As a worst-case example, compute the maximum TJ using a VCA824ID (SO-14 package) in the circuit of Figure 75 operating at maximum gain and at the maximum specified ambient temperature of +85°C. PD = 10V(38.5mA) + 52/(4 ´ 100W) = 447.5mW (13) Maximum TJ = +85°C + (0.449W ´ 80°C/W) = 120.8°C (14) This maximum operating junction temperature is well below most system level targets. Most applications should be lower because an absolute worst-case output stage power was assumed in this calculation of VCC/2, which is beyond the output voltage range for the VCA824. BOARD LAYOUT Achieving optimum performance with a high-frequency amplifier such as the VCA824 requires careful attention to printed circuit board (PCB) layout parasitics and external component types. Recommendations to optimize performance include: a) Minimize parasitic capacitance to any ac ground for all of the signal I/O pins. This recommendation includes the ground pin (pin 2). Parasitic capacitance on the output can cause instability: on both the inverting input and the noninverting input, it can react with the source impedance to cause unintentional 28 band limiting. To reduce unwanted capacitance, a window around the signal I/O pins should be opened in all of the ground and power planes around those pins. Otherwise, ground and power planes should be unbroken elsewhere on the board. Place a small series resistance (greater than 25Ω) with the input pin connected to ground to help decouple package parasitics. b) Minimize the distance (less than 0.25 inches) from the power-supply pins to high-frequency 0.1µF decoupling capacitors. At the device pins, the ground and power plane layout should not be in close proximity to the signal I/O pins. Avoid narrow power and ground traces to minimize inductance between the pins and the decoupling capacitors. The power-supply connections should always be decoupled with these capacitors. Larger (2.2µF to 6.8µF) decoupling capacitors, effective at lower frequencies, should also be used on the main supply pins. These capacitors may be placed somewhat farther from the device and may be shared among several devices in the same area of the PCB. c) Careful selection and placement of external components preserve the high-frequency performance of the VCA824. Resistors should be a very low reactance type. Surface-mount resistors work best and allow a tighter overall layout. Metal-film and carbon composition, axially-leaded resistors can also provide good high-frequency performance. Again, keep the leads and PCB trace length as short as possible. Never use wire-wound type resistors in a high-frequency application. Because the output pin is the most sensitive to parasitic capacitance, always position the series output resistor, if any, as close as possible to the output pin. Other network components, such as inverting or non-inverting input termination resistors, should also be placed close to the package. d) Connections to other wideband devices on the board may be made with short direct traces or through onboard transmission lines. For short connections, consider the trace and the input to the next device as a lumped capacitive load. Relatively wide traces (50mils to 100mils, or 1.27mm to 2.54mm) should be used, preferably with ground and power planes opened up around them. e) Socketing a high-speed part like the VCA824 is not recommended. The additional lead length and pin-to-pin capacitance introduced by the socket can create an extremely troublesome parasitic network, which can make it almost impossible to achieve a smooth, stable frequency response. Best results are obtained by soldering the VCA824 onto the board. Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): VCA824 VCA824 www.ti.com....................................................................................................................................... SBOS394C – NOVEMBER 2007 – REVISED DECEMBER 2008 INPUT AND ESD PROTECTION The VCA824 is built using a very high-speed complementary bipolar process. The internal junction breakdown voltages are relatively low for these very small geometry devices. These breakdowns are reflected in the Absolute Maximum Ratings table. All pins on the VCA824 are internally protected from ESD by means of a pair of back-to-back reverse-biased diodes to either power supply, as shown in Figure 91. These diodes begin to conduct when the pin voltage exceeds either power supply by about 0.7V. This situation can occur with loss of the amplifier power supplies while a signal source is still present. The diodes can typically withstand a continuous current of 30mA without destruction. To ensure long-term reliability, however, diode current should be externally limited to 10mA whenever possible. +VS External Pin ESD protection diodes internally connected to all pins. Internal Circuitry -VS Figure 91. Internal ESD Protection Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): VCA824 29 VCA824 SBOS394C – NOVEMBER 2007 – REVISED DECEMBER 2008....................................................................................................................................... www.ti.com Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision B (August 2008) to Revision C ................................................................................................ Page • Revised second paragraph in the Wideband Variable Gain Amplifier Operation section describing pin 9 ......................... 19 Changes from Revision A (December 2007) to Revision B ........................................................................................... Page • 30 Changed storage temperature range rating in Absolute Maximum Ratings table from –40°C to +125°C to –65°C to +125°C ................................................................................................................................................................................... 2 Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): VCA824 PACKAGE OPTION ADDENDUM www.ti.com 19-Nov-2008 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty VCA824ID ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR VCA824IDG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR VCA824IDGSR ACTIVE MSOP DGS 10 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR VCA824IDGSRG4 ACTIVE MSOP DGS 10 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR VCA824IDGST ACTIVE MSOP DGS 10 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR VCA824IDGSTG4 ACTIVE MSOP DGS 10 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR VCA824IDR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR VCA824IDRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 19-Nov-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing VCA824IDGSR MSOP DGS 10 VCA824IDGST MSOP DGS VCA824IDR SOIC D SPQ Reel Reel Diameter Width (mm) W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 10 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 19-Nov-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) VCA824IDGSR MSOP DGS 10 2500 346.0 346.0 29.0 VCA824IDGST MSOP DGS 10 250 190.5 212.7 31.8 VCA824IDR SOIC D 14 2500 346.0 346.0 33.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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