TI OPA354AQDBVRQ1

OPA354-Q1
OPA2354-Q1
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250 MHz, RAIL-TO-RAIL I/O, CMOS OPERATIONAL AMPLIFIERS
FEATURES
APPLICATIONS
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Qualified for Automotive Applications
Unity-Gain Bandwidth: 250 MHz
Wide Bandwidth: 100-MHz GBW
High Slew Rate: 150 V/μs
Low Noise: 6.5 nV/√Hz
Rail-to-Rail I/O
High Output Current: >100 mA
Excellent Video Performance
– Differential Gain Error: 0.02%
– Differential Phase Error: 0.09°
– 0.1-dB Gain Flatness: 40 MHz
Low Input Bias Current: 3 pA
Quiescent Current: 4.9 mA
Thermal Shutdown
Supply Range: 2.5 V to 5.5 V
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Video Processing
Ultrasound
Optical Networking, Tunable Lasers
Photodiode Transimpedance Amplifiers
Active Filters
High-Speed Integrators
Analog-to-Digital (A/D) Converter Input Buffers
Digital-to-Analog (D/A) Converter Output
Amplifiers
Barcode Scanners
Communications
V+
−In
OPA354
VOUT
+In
V−
DESCRIPTION
The OPA354 series of high-speed, voltage-feedback CMOS operational amplifiers are designed for video and
other applications requiring wide bandwidth. They are unity-gain stable and can drive large output currents.
Differential gain is 0.02% and differential phase is 0.09°. Quiescent current is only 4.9 mA per channel.
The OPA354 series op amps are optimized for operation on single or dual supplies as low as 2.5 V (±1.25 V)
and up to 5.5 V (±2.75 V). Common-mode input range extends beyond the supplies. The output swing is within
100 mV of the rails, supporting wide dynamic range.
The single version (OPA354), is available in the tiny SOT23-5 (DBV) package. The dual version (OPA2354)
comes in the miniature MSOP-8 (DGK) package and features completely independent circuitry for lowest
crosstalk and freedom from interaction. The devices are specified over the automotive temperature range of
–40°C to 125°C.
Table 1. OPAx354 RELATED PRODUCTS
FEATURES
PRODUCT
Shutdown Version of OPA354 Family
OPAx357
200-MHz GBW, Rail-to-Rail Output, CMOS, Shutdown
OPAx355
200-MHz GBW, Rail-to-Rail Output, CMOS
OPAx356
38-MHz GBW, Rail-to-Rail Input/Output, CMOS
OPAx350/3
75-MHz BW, G = 2, Rail-to-Rail Output
OPAx631
150-MHz BW, G = 2, Rail-to-Rail Output
OPAx634
100-MHz BW, Differential Input/Output, 3.3-V Supply
THS412x
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2009, Texas Instruments Incorporated
OPA354-Q1
OPA2354-Q1
SBOS492A – JUNE 2009 – REVISED AUGUST 2009 ....................................................................................................................................................... www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION (1)
TA
–40°C to 125°C
(1)
(2)
PACKAGE
(2)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
SOT-23 – DBV
Reel of 3000
OPA354AQDBVRQ1
OSFQ
MSOP – DGK
Reel of 2500
OPA2354AQDGKRQ1
OSLQ
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
OPA354
DBV PACKAGE
(TOP VIEW)
Out
1
V–
2
+In
3
5
4
OPA2354
DGK PACKAGE
(TOP VIEW)
V+
–In
Out A
1
8
V+
–In A
2
7
Out B
+In A
3
6
–In B
V–
4
5
+In B
ABSOLUTE MAXIMUM RATINGS (1)
over operating free-air temperature range (unless otherwise noted)
VS
Supply voltage, V+ to V–
VIN
Signal input terminals voltage
7.5 V
(V– – 0.5 V) to (V+ + 0.5 V)
Output short-circuit duration
Continuous
DBV package
150°C/W
θJA
Thermal impedance, junction to free air
TOP
Operating temperature
–55°C to 150°C
TSTG
Storage temperature
–65°C to 150°C
TJ
Junction temperature
150°C
TLEAD
Lead temperature (soldering, 10 s)
300°C
(1)
DGK package
150°C/W
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
MIN
MAX
UNIT
VS
Supply voltage, V– to V+
2.5
5.5
V
TA
Operating free-air temperature
–40
125
°C
2
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OPA2354-Q1
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ELECTRICAL CHARACTERISTICS
VS = 2.5 V to 5.5 V, RF = 0 Ω, RL = 1 kΩ connected to VS/2 (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VS = 5 V, VCM = (V–) + 0.8 V
TA
(1)
MIN
25°C
TYP
MAX
±2
±8
UNIT
VOS
Input offset voltage
ΔVOS/ΔT
Offset voltage drift over
temperature
PSRR
Offset voltage drift vs
power supply
IB
Input bias current
25°C
3
±50
pA
IOS
Input offset current
25°C
±1
±50
pA
Vn
Input voltage noise
density
f = 1 MHz
25°C
6.5
nV/√Hz
In
Input current noise
density
f = 1 MHz
25°C
50
fA/√Hz
VCM
Input common-mode
voltage range
VS = 2.7 V to 5.5 V,
VCM = VS/2 – 0.15 V
Input common-mode
rejection ratio
VS = 5.5 V, –0.1 V < VCM < 5.6 V
mV
±10
Full range
VS = 5.5 V, –0.1 V < VCM < 3.5 V
CMRR
Full range
μV/°C
±4
25°C
±200
Full range
±800
±900
25°C
V– – 0.1
25°C
66
Full range
64
25°C
56
Full range
55
μV/V
V+ + 0.1
V
80
dB
68
ZID
Differential input
impedance
25°C
1013 || 2
Ω || pF
ZICM
Common-mode input
impedance
25°C
1013 || 2
Ω || pF
AOL
Open-loop gain
f–3dB
Small-signal bandwidth
GBW
Gain-bandwidth product
G = +10
25°C
100
MHz
f0.1dB
Bandwidth for 0.1-dB
gain flatness
G = +2, VO = 100 mVp-p
25°C
40
MHz
VS = 5 V, G = +1, 4-V step
25°C
150
SR
Slew rate
trf
Rise-and-fall time
VS = 5 V, 0.3 V < VO < 4.7 V
25°C
94
VS = 5 V, 0.4 V < VO < 4.6 V
Full range
90
G = +1, VO = 100 mVp-p, RF = 25 Ω
G = +2, VO = 100 mVp-p
25°C
130
110
25°C
Settling time
0.1%
V/μs
2
ns
11
30
VS = 5 V, G = +1, 2-V output step
25°C
Overload recovery time
VIN × Gain = VS
25°C
5
Second-order harmonic
distortion
G = +1, f = 1 MHz, VO = 2 Vp-p,
RL = 200 Ω, VCM = 1.5 V
25°C
–75
dBc
Third-order harmonic
distortion
G = +1, f = 1 MHz, VO = 2 Vp-p,
RL = 200 Ω, VCM = 1.5 V
25°C
–83
dBc
Differential gain error
NTSC, RL = 150 Ω
25°C
0.02
%
Differential phase error
NTSC, RL = 150 Ω
25°C
0.09
°
Channel-to-channel
crosstalk (OPA2354)
f = 5 MHz
25°C
–100
dB
VS = 5 V, RL = 1 kΩ, AOL > 94 dB
25°C
0.1
VS = 5 V, RL = 1 kΩ, AOL > 90 dB
Full range
0.01%
Voltage output swing
from rail
(1)
MHz
90
VS = 3 V, G = +1, 2-V step
G = +1, VO = 200 mVp-p, 10% to
90%
dB
250
VS = 5 V, G = +1, 2-V step
G = +1, VO = 2 Vp-p, 10% to 90%
tsettle
110
ns
60
ns
0.3
0.4
V
Full range TA = –40°C to 125°C
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ELECTRICAL CHARACTERISTICS (continued)
VS = 2.5 V to 5.5 V, RF = 0 Ω, RL = 1 kΩ connected to VS/2 (unless otherwise noted)
PARAMETER
IO
Output current (2)
TEST CONDITIONS
(3)
Closed-loop output
impedance
RO
Open-loop output
resistance
IQ
Quiescent current
(per amplifier)
Thermal shutdown
junction temperature
(2)
(3)
4
TA
(1)
VS = 5 V
TYP
MAX
100
VS = 3 V
25°C
UNIT
mA
50
f < 100 kHz
VS = 5 V, IO = 0, Enabled
MIN
0.05
Ω
35
Ω
4.9
Full range
6
7.5
Shutdown
160
Reset from shutdown
140
mA
°C
See typical characteristic graph Output Voltage Swing vs Output Current.
Not production tested
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TYPICAL CHARACTERISTICS
TA = 25°C, VS = 5 V, RF = 0 Ω, RL = 1 kΩ connected to VS/2 (unless otherwise noted)
NONINVERTING SMALL−SIGNAL
FREQUENCY RESPONSE
3
3
G = +1
RF = 25Ω
VO = 0.1VPP
VO = 0.1VPP, RF = 604Ω
0
Normalized Gain (dB)
0
Normalized Gain (dB)
INVERTING SMALL−SIGNAL
FREQUENCY RESPONSE
G = +2, RF = 604Ω
−3
G = +5, RF = 604Ω
−6
G = +10, RF = 604Ω
−9
−12
−3
G = −1
−6
G = −5
G = −10
−12
−15
100k
1M
10M
Frequency (Hz)
100M
−15
100k
1G
1M
10M
Frequency (Hz)
100M
1G
NONINVERTING LARGE−SIGNAL STEP RESPONSE
Output Voltage (40mV/div)
Output Voltage (500mV/div)
NONINVERTING SMALL−SIGNAL STEP RESPONSE
Time (20ns/div)
Time (20ns/div)
0.1dB GAIN FLATNESS
0.5
0.4
VO = 0.1VPP
0.3
G = +1
RF = 25Ω
0.2
0.1
0
−0.1
−0.2
G = +2
RF = 604Ω
−0.3
−0.4
−0.5
100k
HARMONIC DISTORTION vs OUTPUT VOLTAGE
−50
Harmonic Distortion (dBc)
Normalized Gain (dB)
G = −2
−9
G = −1
f = 1MHz
RL = 200Ω
−60
−70
2nd−Harmonic
−80
−90
3rd−Harmonic
−100
1M
10M
Frequency (Hz)
Copyright © 2009, Texas Instruments Incorporated
100M
1G
0
1
2
Output Voltage (VPP)
3
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4
5
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OPA2354-Q1
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TYPICAL CHARACTERISTICS (continued)
TA = 25°C, VS = 5 V, RF = 0 Ω, RL = 1 kΩ connected to VS/2 (unless otherwise noted)
HARMONIC DISTORTION vs NONINVERTING GAIN
−50
−70
2nd−Harmonic
−80
−90
VO = 2VPP
f = 1MHz
RL = 200Ω
−60
Harmonic Distortion (dBc)
−60
Harmonic Distortion (dBc)
HARMONIC DISTORTION vs INVERTING GAIN
−50
VO = 2VPP
f = 1MHz
RL = 200Ω
−70
2nd−Harmonic
−80
3rd−Harmonic
−90
3rd−Harmonic
−100
−100
1
10
1
10
Gain (V/V)
HARMONIC DISTORTION vs FREQUENCY
−50
HARMONIC DISTORTION vs LOAD RESISTANCE
−50
G = +1
VO = 2VPP
RL = 200Ω
VCM = 1.5V
−70
2nd−Harmonic
−80
3rd−Harmonic
−90
−100
100k
G = +1
VO = 2VPP
f = 1MHz
VCM = 1.5V
−60
Harmonic Distortion (dBc)
Harmonic Distortion (dBc)
−60
Gain (V/V)
−70
2nd−Harmonic
−80
3rd−Harmonic
−90
−100
1M
Frequency (Hz)
10M
100
1k
RL (Ω)
FREQUENCY RESPONSE FOR VARIOUS RL
INPUT VOLTAGE AND CURRENT NOISE
SPECTRAL DENSITY vs FREQUENCY
3
10k
RL = 10kΩ
Normalized Gain (dB)
Voltage Noise (nV/√Hz),
Current Noise (fA/√Hz)
0
1k
Current Noise
Voltage Noise
100
−3
−6
G = +1
R F = 0Ω
VO = 0.1VPP
C L = 0pF
RL = 1kΩ
RL = 100Ω
−9
RL = 50Ω
−12
10
−15
100k
1
10
100
1k
10k
100k
1M
10M
100M
1M
10M
Frequency (Hz)
100M
1G
Frequency (Hz)
6
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OPA2354-Q1
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TYPICAL CHARACTERISTICS (continued)
TA = 25°C, VS = 5 V, RF = 0 Ω, RL = 1 kΩ connected to VS/2 (unless otherwise noted)
FREQUENCY RESPONSE FOR VARIOUS CL
RECOMMENDED RS vs CAPACITIVE LOAD
9
160
G = +1
VO = 0.1VPP
R S = 0Ω
Normalized Gain (dB)
6
3
For 0.1dB
Flatness
140
CL = 100pF
120
0
RS (Ω)
100
−3
CL = 47pF
−6
80
60
VIN
−9
CL
1kΩ
20
−15
100k
0
1M
10M
Frequency (Hz)
100M
1G
1
G = +1
VO = 0.1VPP
0
1k
10
100
Capacitive Load (pF)
COMMON−MODE REJECTION RATIO AND
POWER−SUPPLY REJECTION RATIO vs FREQUENCY
FREQUENCY RESPONSE vs CAPACITIVE LOAD
3
CL = 5.6pF, RS = 0Ω
100
CMRR
80
CL = 47pF, RS = 140Ω
−3
CMRR, PSRR (dB)
Normalized Gain (dB)
VO
OPA354
CL = 5.6pF
−12
CL = 100pF, RS = 120Ω
−6
−9
VIN
RS
VO
OPA354
−12
CL
PSRR+
60
PSRR−
40
1kΩ
20
−15
100k
1M
10M
Frequency (Hz)
0
1G
100M
10k
100k
1M
10M
Frequency (Hz)
100M
1G
COMPOSITE VIDEO
DIFFERENTIAL GAIN AND PHASE
OPEN−LOOP GAIN AND PHASE
180
0.8
160
140
0.7
120
Phase
100
dG/dP (%/degrees)
Open−Loop Phase (degrees)
Open−Loop Gain (dB)
RS
40
80
60
40
Gain
20
0
−20
0.6
0.5
dP
0.4
0.3
0.2
0.1
−40
10
100
1k
10k 100k
1M
Frequency (Hz)
10M
100M
1G
dG
0
1
2
3
4
Number of 150Ω Loads
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TYPICAL CHARACTERISTICS (continued)
TA = 25°C, VS = 5 V, RF = 0 Ω, RL = 1 kΩ connected to VS/2 (unless otherwise noted)
INPUT BIAS CURRENT vs TEMPERATURE
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
FOR VS = 3V
10k
1k
Output Voltage (V)
Input Bias Current (pA)
3
100
10
2
+125_ C
+25_ C
−55_ C
1
1
−55
−35
−15
5
25
45
65
Temperature (_C)
85
105 125 135
0
0
20
40
60
80
100
120
Output Current (mA)
SUPPLY CURRENT vs TEMPERATURE
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
FOR VS = 5V
7
5
VS = 5V
4
5
Output Voltage (V)
Supply Current (mA)
6
4
VS = 2.5V
3
2
1
3
−55_C
+25_ C
+125_ C
2
1
0
−55
−35
−15
5
25
45
65
Temperature (_ C)
85
105 125 135
0
0
25
50
75
100
125
150
175
200
Output Current (mA)
CLOSED−LOOP OUTPUT IMPEDANCE vs FREQUENCY
MAXIMUM OUTPUT VOLTAGE vs FREQUENCY
100
6
VS = 5.5V
10
Output Voltage (VPP)
Output Impedance (Ω)
5
1
0.1
Maximum Output
Voltage without
Slew−Rate
Induced Distortion
4
3
VS = 2.7V
2
OPA354
1
ZO
0.01
100k
8
0
1M
10M
Frequency (Hz)
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100M
1G
1
10
100
Frequency (MHz)
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TYPICAL CHARACTERISTICS (continued)
TA = 25°C, VS = 5 V, RF = 0 Ω, RL = 1 kΩ connected to VS/2 (unless otherwise noted)
OUTPUT SETTLING TIME TO 0.1%
OPEN−LOOP GAIN vs TEMPERATURE
120
0.5
0.4
Open−Loop Gain (dB)
Output Error (%)
RL = 1kΩ
VO = 2VPP
0.3
0.2
0.1
0
−0.1
−0.2
−0.3
110
100
90
80
−0.4
−0.5
70
0
10
20
30
40
50
60
70
80
90
−55
100
−35
−15
5
Time (ns)
25
45
65
Temperature (_ C)
85
105 125 135
COMMON−MODE REJECTION RATIO AND
POWER−SUPPLY REJECTION RATIO vs TEMPERATURE
OFFSET VOLTAGE PRODUCTION DISTRIBUTION
100
Population
CMRR, PSRR (dB)
90
Common−Mode Rejection Ratio
80
Power−Supply Rejection Ratio
70
60
−8 −7 −6 −5 −4 −3 −2 −1 0 1 2 3
Offset Voltage (mV)
4 5 6
50
7 8
−55
−35
−15
5
25
45
65
85
105 125 135
Temperature (_ C)
CHANNEL−TO−CHANNEL CROSSTALK
Crosstalk, Input−Referred (dB)
0
−20
−40
−60
OPA2354
−80
−100
−120
100k
1M
10M
100M
1G
Frequency (Hz)
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APPLICATION INFORMATION
The OPA354 is a CMOS, rail-to-rail I/O, high-speed, voltage-feedback operational amplifier designed for video,
high-speed, and other applications. It is available as a single or dual op amp.
The amplifier features a 100-MHz gain bandwidth, and 150 V/μs slew rate, but it is unity-gain stable and can be
operated as a +1-V/V voltage follower.
Operating Voltage
The OPA354 is specified over a power-supply range of 2.7 V to 5.5 V (±1.35 V to ±2.75 V). However, the supply
voltage may range from 2.5 V to 5.5 V (±1.25 V to ±2.75 V). Supply voltages higher than 7.5 V (absolute
maximum) can permanently damage the amplifier.
Parameters that vary over supply voltage or temperature are shown in the typical characteristics section of this
data sheet.
Rail-to-Rail Input
The specified input common-mode voltage range of the OPA354 extends 100 mV beyond the supply rails. This is
achieved with a complementary input stage—an N-channel input differential pair in parallel with a P-channel
differential pair, as shown in Figure 1. The N-channel pair is active for input voltages close to the positive rail,
typically (V+) – 1.2 V to 100 mV above the positive supply, while the P-channel pair is on for inputs from 100 mV
below the negative supply to approximately (V+) – 1.2 V. There is a small transition region, typically (V+) – 1.5 V
to (V+) – 0.9 V, in which both pairs are on. This 600-mV transition region can vary ±500 mV with process
variation. Thus, the transition region (both input stages on) can range from (V+) – 2.0 V to (V+) – 1.5 V on the
low end, up to (V+) – 0.9 V to (V+) – 0.4 V on the high end.
A double-folded cascode adds the signal from the two input pairs and presents a differential signal to the class
AB output stage.
V+
Reference
Current
VIN+
VIN−
VBIAS1
Class AB
Control
Circuitry
VO
VBIAS2
V−
(Ground)
Figure 1. Simplified Schematic
Rail-to-Rail Output
A class AB output stage with common-source transistors is used to achieve rail-to-rail output. For
high-impedance loads (> 200 Ω), the output voltage swing is typically 100 mV from the supply rails. With 10-Ω
loads, a useful output swing can be achieved while maintaining high open-loop gain. See the typical
characteristic curve Output Voltage Swing vs Output Current.
10
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Output Drive
The OPA354's output stage can supply a continuous output current of ±100 mA and still provide approximately
2.7-V output swing on a 5-V supply, as shown in Figure 2.
R2
1kΩ
+
−
C1
50pF
V1
5V
1µF
R1
10kΩ
V+
OPA354
+
VIN
R3
10kΩ
V−
RSHUNT
1Ω
R4
1kΩ
−
1V In = 100mA
Out, as Shown
Laser Diode
Figure 2. Laser Diode Driver
For maximum reliability, it is not recommended to run a continuous dc current in excess of ±100 mA. See the
typical characteristic curve Output Voltage Swing vs Output Current. For supplying continuous output currents
greater than ±100 mA, the OPA354 may be operated in parallel, as shown in Figure 3.
R2
10kΩ
C1
200pF
+5V
1µF
R1
100kΩ
R5
1Ω
OPA2354
R3
100kΩ
+
−
R6
1Ω
2V In = 200mA
Out, as Shown
RSHUNT
1Ω
OPA2354
R4
10kΩ
Laser Diode
Figure 3. Parallel Operation
The OPA354 provides peak currents up to 200 mA, which corresponds to the typical short-circuit current.
Therefore, an on-chip thermal shutdown circuit is provided to protect the OPA354 from dangerously high junction
temperatures. At 160°C, the protection circuit shuts down the amplifier. Normal operation resumes when the
junction temperature cools to below 140°C.
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OPA354-Q1
OPA2354-Q1
SBOS492A – JUNE 2009 – REVISED AUGUST 2009 ....................................................................................................................................................... www.ti.com
Video
The OPA354 output stage is capable of driving standard back-terminated 75-Ω video cables (see Figure 4). By
back-terminating a transmission line, it does not exhibit a capacitive load to its driver. A properly back-terminated
75-Ω cable does not appear as capacitance; it presents only a 150-Ω resistive load to the OPA354 output.
+5V
Video
In
75Ω
OPA354
75Ω
Video
Output
+2.5V
604Ω
604Ω
+2.5V
Figure 4. Single-Supply Video Line Driver
The OPA354 can be used as an amplifier for RGB graphic signals, which have a voltage of zero at the video
black level, by offsetting and ac-coupling the signal (see Figure 5).
604Ω
+3V
+
V+
10nF
604Ω
75Ω
1/2
OPA2354
R1
Red(1)
1µF
Red
75Ω
R2
V+
R1
Green(1)
R2
604Ω
75Ω
1/2
OPA2354
Green
75Ω
604Ω
NOTE: (1) Source video signal offset
300mV above ground to accomodate
op amp swing−to−ground capability.
604Ω
+3V
+
V+
1µF
10nF
604Ω
75Ω
Blue(1)
R1
OPA354
Blue
75Ω
R2
Figure 5. RGB Cable Driver
12
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OPA354-Q1
OPA2354-Q1
www.ti.com ....................................................................................................................................................... SBOS492A – JUNE 2009 – REVISED AUGUST 2009
Driving Analog-to-Digital Converters
The OPA354 series op amps offer 60-ns settling time to 0.01%, making them a good choice for driving high- and
medium-speed sampling A/D converters and reference circuits. The OPA354 series provide an effective means
of buffering the A/D converter's input capacitance and resulting charge injection while providing signal gain. For
applications requiring high DC accuracy, the OPA350 series is recommended.
Figure 6 shows the OPA354 driving an A/D converter. With the OPA354 in an inverting configuration, a capacitor
across the feedback resistor can be used to filter high-frequency noise in the signal.
+5V
330pF
5kΩ
5kΩ
VIN
VREF
V+
ADS7816, ADS7861,
or ADS7864
12−Bit A/D Converter
+In
OPA354
+2.5V
−In
GND
VIN = 0V to −5V for 0V to 5V output.
NOTE: A/D Converter Input = 0V to VREF
Figure 6. OPA354 Inverting Configuration Driving the ADS7816
Capacitive Load and Stability
The OPA354 series op amps can drive a wide range of capacitive loads. However, all op amps under certain
conditions may become unstable. Op amp configuration, gain, and load value are just a few of the factors to
consider when determining stability. An op amp in unity-gain configuration is most susceptible to the effects of
capacitive loading. The capacitive load reacts with the op amp's output resistance, along with any additional load
resistance, to create a pole in the small-signal response that degrades the phase margin. See the typical
characteristic curve Frequency Response vs Capacitive Load for details.
The OPA354's topology enhances its ability to drive capacitive loads. In unity gain, these op amps perform well
with large capacitive loads. Refer to the typical characteristic curve Recommended RS vs Capacitive Load and
Frequency Response vs Capacitive Load for details.
One method of improving capacitive load drive in the unity-gain configuration is to insert a 10-Ω to 20-Ω resistor
in series with the output, as shown in Figure 7. This significantly reduces ringing with large capacitive loads—see
the typical characteristic curve Frequency Response vs Capacitive Load. However, if there is a resistive load in
parallel with the capacitive load, RS creates a voltage divider. This introduces a DC error at the output and
slightly reduces output swing. This error may be insignificant. For instance, with RL = 10 kΩ and RS = 20 Ω, there
is only about a 0.2% error at the output.
V+
RS
VOUT
OPA354
VIN
RL
CL
Figure 7. Series Resistor in Unity-Gain Configuration Improves Capacitive Load Drive
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OPA354-Q1
OPA2354-Q1
SBOS492A – JUNE 2009 – REVISED AUGUST 2009 ....................................................................................................................................................... www.ti.com
Wideband Transimpedance Amplifier
Wide bandwidth, low input bias current, and low input voltage and current noise make the OPA354 an ideal
wideband photodiode transimpedance amplifier for low-voltage single-supply applications. Low-voltage noise is
important because photodiode capacitance causes the effective noise gain of the circuit to increase at high
frequency.
The key elements to a transimpedance design, as shown in Figure 8, are the expected diode capacitance
(including the parasitic input common-mode and differential-mode input capacitance (2 + 2) pF for the OPA354),
the desired transimpedance gain (RF), and the gain-bandwidth product (GBW) for the OPA354 (100 MHz). With
these three variables set, the feedback capacitor value (CF) may be set to control the frequency response.
CF
< 1pF
(prevents gain peaking)
RF
10MΩ
+V
λ
CD OPA354
VOUT
Figure 8. Transimpedance Amplifier
To achieve a maximally flat second-order Butterworth frequency response, the feedback pole should be set as
shown in Equation 1.
1
+
2pR FCF
GBP
Ǹ4pR
C
F
D
(1)
Typical surface-mount resistors have a parasitic capacitance of around 0.2 pF that must be deducted from the
calculated feedback capacitance value.
Bandwidth is calculated as shown in Equation 2.
f *3dB +
GBP Hz
Ǹ2pR
C
F
D
(2)
For even higher transimpedance bandwidth, the high-speed CMOS OPA355 (200-MHz GBW) or the OPA655
(400-MHz GBW) may be used.
PCB Layout
Good high-frequency printed circuit board (PCB) layout techniques should be employed for the OPA354.
Generous use of ground planes, short and direct signal traces, and a suitable bypass capacitor located at the V+
pin assures clean stable operation. Large areas of copper also provides a means of dissipating heat that is
generated in normal operation.
Sockets are not recommended for use with any high-speed amplifier.
A 10-nF ceramic bypass capacitor is the minimum recommended value; adding a 1-μF or larger tantalum
capacitor in parallel can be beneficial when driving a low-resistance load. Providing adequate bypass
capacitance is essential to achieving very low harmonic and intermodulation distortion.
14
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OPA354-Q1
OPA2354-Q1
www.ti.com ....................................................................................................................................................... SBOS492A – JUNE 2009 – REVISED AUGUST 2009
Power Dissipation
Power dissipation depends on power-supply voltage, signal and load conditions. With dc signals, power
dissipation is equal to the product of output current times the voltage across the conducting output transistor,
VS – VO. Power dissipation can be minimized by using the lowest possible power-supply voltage necessary to
assure the required output voltage swing.
For resistive loads, the maximum power dissipation occurs at a dc output voltage of one-half the power-supply
voltage. Dissipation with ac signals is lower. Application bulletin AB-039 (SBOA022), Power Amplifier Stress and
Power Handling Limitations, explains how to calculate or measure power dissipation with unusual signals and
loads, and can be found at www.ti.com.
Any tendency to activate the thermal protection circuit indicates excessive power dissipation or an inadequate
heatsink. For reliable operation, junction temperature should be limited to 150°C, maximum. To estimate the
margin of safety in a complete design, increase the ambient temperature until the thermal protection is triggered
at 160°C. The thermal protection should trigger more than 35°C above the maximum expected ambient condition
of the application.
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PACKAGE OPTION ADDENDUM
www.ti.com
16-Aug-2012
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package
Drawing
Pins
Package Qty
Eco Plan
(2)
Lead/
Ball Finish
MSL Peak Temp
(3)
OPA2354AQDGKRQ1
ACTIVE
VSSOP
DGK
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
OPA354AQDBVRQ1
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
Samples
(Requires Login)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF OPA2354-Q1 :
• Catalog: OPA2354
NOTE: Qualified Version Definitions:
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
16-Aug-2012
• Catalog - TI's standard catalog product
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
16-Aug-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
OPA2354AQDGKRQ1
VSSOP
DGK
8
2500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
OPA354AQDBVRQ1
SOT-23
DBV
5
3000
179.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
16-Aug-2012
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
OPA2354AQDGKRQ1
VSSOP
DGK
8
2500
367.0
367.0
35.0
OPA354AQDBVRQ1
SOT-23
DBV
5
3000
195.0
200.0
45.0
Pack Materials-Page 2
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