X9313 ® Terminal Voltages ±5V, 32 Taps Data Sheet September 9, 2005 Digitally Controlled Potentiometer (XDCP™) FN8177.2 Features • Solid-state potentiometer The Intersil X9313 is a digitally controlled potentiometer (XDCP). The device consists of a resistor array, wiper switches, a control section, and nonvolatile memory. The wiper position is controlled by a 3-wire interface. The potentiometer is implemented by a resistor array composed of 31 resistive elements and a wiper switching network. Between each element and at either end are tap points accessible to the wiper terminal. The position of the wiper element is controlled by the CS, U/D, and INC inputs. The position of the wiper can be stored in nonvolatile memory and then be recalled upon a subsequent power-up operation. The device can be used as a three-terminal potentiometer or as a two-terminal variable resistor in a wide variety of applications including: • Control • 3-wire serial interface • 32 wiper tap points - Wiper position stored in nonvolatile memory and recalled on power-up • 31 resistive elements - Temperature compensated - End to end resistance range ± 20% - Terminal voltages, -5V to +5V • Low power CMOS - VCC = 3V or 5V - Active current, 3mA max. - Standby current, 500µA max. • High reliability - Endurance, 100,000 data changes per bit - Register data retention, 100 years • Parameter adjustments • RTOTAL values = 1kΩ, 10kΩ, 50kΩ • Signal processing • Packages - 8 Ld SOIC, MSOP and DIP • Pb-free plus anneal available (RoHS compliant) Block Diagrams U/D INC CS VCC (SUPPLY VOLTAGE) CONTROL AND MEMORY 29 5-BIT NONVOLATILE MEMORY RW/VW DEVICE SELECT (CS) RH/VH 31 30 RH/VH UP/DOWN (U/D) INCREMENT (INC) 5-BIT UP/DOWN COUNTER RL/VL 28 ONE OF THIRTY TWO DECODER TRANSFER GATES RESISTOR ARRAY 2 VSS (GROUND) VCC VSS GENERAL STORE AND RECALL CONTROL CIRCUITRY 1 0 RL/VL RW/VW DETAILED 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved All other trademarks mentioned are the property of their respective owners. X9313 Ordering Information PART MARKING VCC RANGE (V) RTOTAL (kΩ) TEMPERATURE RANGE (°C) X9313UM* 313U 4.5 to 5.5 50 0 to 70 8 Ld MSOP X9313UMZ* (Note) DDC 0 to 70 8 Ld MSOP (Pb-free) X9313UMI* 13UI -40 to 85 8 Ld MSOP X9313UMIZ* (Note) DDB -40 to 85 8 Ld MSOP (Pb-free) X9313UP X9313UP 0 to 70 8 Ld PDIP X9313UPI X9313UP I -40 to 85 8 Ld PDIP X9313US* X9313U 0 to 70 8 Ld SOIC X9313USZ* (Note) X9313U Z 0 to 70 8 Ld SOIC (Pb-free) X9313USI* X9313U I -40 to 85 8 Ld SOIC X9313U Z I -40 to 85 8 Ld SOIC (Pb-free) PART NUMBER X9313USIZ* (Note) X9313USM 10 PACKAGE 0 to 70 8 Ld SOIC 0 to 70 8 Ld MSOP 8 Ld MSOP (Pb-free) X9313WM* 313W X9313WMZ* (Note) DDF 0 to 70 X9313WMI* 13WI -40 to 85 8 Ld MSOP X9313WMIZ* (Note) DDE -40 to 85 8 Ld MSOP (Pb-free) X9313WP X9313WP 0 to 70 8 Ld PDIP X9313WPI X9313XP I -40 to 85 8 Ld PDIP X9313WS* X9313WS 0 to 70 8 Ld SOIC X9313WSZ* (Note) X9313W Z 0 to 70 8 Ld SOIC (Pb-free) X9313WSI* X9313WS I -40 to 85 8 Ld SOIC X9313WSIZ* (Note) X9313WS Z I -40 to 85 8 Ld SOIC (Pb-free) X9313WSMT2 X9313WS M 0 to 70 8 Ld SOIC Tape and Reel X9313ZM* 313Z 0 to 70 8 Ld MSOP X9313ZMZ* (Note) DDJ 0 to 70 8 Ld MSOP (Pb-free) X9313ZMI* 13ZI X9313ZMIZ* (Note) -40 to 85 8 Ld MSOP DDH -40 to 85 8 Ld MSOP (Pb-free) X9313ZP X9313ZP 0 to 70 8 Ld PDIP X9313ZPI X9313ZP I -40 to 85 8 Ld PDIP X9313ZS* X9313ZS 0 to 70 8 Ld SOIC X9313ZSZ* (Note) X9313 Z 0 to 70 8 Ld SOIC (Pb-free) X9313ZS I -40 to 85 8 Ld SOIC X9313ZS Z I -40 to 85 8 Ld SOIC (Pb-free) X9313ZSI* X9313ZSIZ* (Note) 2 1 FN8177.2 September 9, 2005 X9313 Ordering Information (Continued) PART MARKING VCC RANGE (V) RTOTAL (kΩ) TEMPERATURE RANGE (°C) X9313UM-3* 13UD 3 to 5.5 50 0 to 70 8 Ld MSOP X9313UMZ-3* (Note) DDD 0 to 70 8 Ld MSOP (Pb-free) X9313UMI-3* 13UE -40 to 85 8 Ld MSOP 13UE Z -40 to 85 8 Ld MSOP (Pb-free) X9313UP-3 X9313UP D 0 to 70 8 Ld PDIP X9313US-3* X9313U D 0 to 70 8 Ld SOIC X9313U Z D 0 to 70 8 Ld SOIC (Pb-free) 0 to 70 8 Ld MSOP 8 Ld MSOP (Pb-free) PART NUMBER X9313UMIZ-3* (Note) X9313USZ-3* (Note) X9313WM-3* 13WD X9313WMZ-3* (Note) DDG 0 to 70 X9313WMI-3* 13WE -40 to 85 8 Ld MSOP 13WE Z -40 to 85 8 Ld MSOP (Pb-free) X9313WP-3 X9313WP D 0 to 70 8 Ld PDIP X9313WS-3* X9313W D 0 to 70 8 Ld SOIC X9313W Z D 0 to 70 8 Ld SOIC (Pb-free) 0 to 70 8 Ld MSOP 8 Ld MSOP (Pb-free) X9313WMIZ-3* (Note) X9313WSZ-3* (Note) 10 PACKAGE X9313ZM-3* 13ZD X9313ZMZ-3* (Note) DDK 0 to 70 X9313ZMI-3* 13ZE -40 to 85 8 Ld MSOP 13ZE Z -40 to 85 8 Ld MSOP (Pb-free) X9313ZP-3 X9313ZP D 0 to 70 8 Ld PDIP X9313ZS-3* X9313Z D 0 to 70 8 Ld SOIC X9313Z Z D 0 to 70 8 Ld SOIC (Pb-free) X9313Z E -40 to 85 8 Ld SOIC X9313Z Z E -40 to 85 8 Ld SOIC (Pb-free) X9313ZMIZ-3* (Note) X9313ZSZ-3* (Note) X9313ZSI-3* X9313ZSIZ-3* (Note) 1 NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. *Add "T1" suffix for tape and reel. 3 FN8177.2 September 9, 2005 X9313 Pin Descriptions TABLE 1. PIN NAMES SYMBOL RH/VH and RL/VL The high (RH/VH) and low (RL/VL) terminals of the X9313 are equivalent to the fixed terminals of a mechanical potentiometer. The terminology of RL/VL and RH/VH references the relative position of the terminal in relation to wiper movement direction selected by the U/D input and not the voltage potential on the terminal. DESCRIPTION RH/VH High terminal RW/VW Wiper terminal RL/VL Low terminal VSS Ground VCC Supply voltage RW/VW U/D Up/Down control input RW/Vw is the wiper terminal and is equivalent to the movable terminal of a mechanical potentiometer. The position of the wiper within the array is determined by the control inputs. The wiper terminal series resistance is typically 40Ω at VCC = 5V. INC Increment control input CS Chip Select control input Up/Down (U/D) The U/D input controls the direction of the wiper movement and whether the counter is incremented or decremented. Increment (INC) The INC input is negative-edge triggered. Toggling INC will move the wiper and either increment or decrement the counter in the direction indicated by the logic level on the U/D input. Chip Select (CS) The device is selected when the CS input is LOW. The current counter value is stored in nonvolatile memory when CS is returned HIGH while the INC input is also HIGH. After the store operation is complete the X9313 will be placed in the low power standby mode until the device is selected once again. Pin Configuration 8-Lead DIP/SOIC INC 1 U/D 2 RH/VH 3 VSS 4 X9313 8 VCC 7 6 CS RL/VL 5 RW/VW 1 VSS 2 RW/VW 3 RL/VL 4 X9313 There are three sections of the X9313: the input control, counter and decode section; the nonvolatile memory; and the resistor array. The input control section operates just like an up/down counter. The output of this counter is decoded to turn on a single electronic switch connecting a point on the resistor array to the wiper output. Under the proper conditions the contents of the counter can be stored in nonvolatile memory and retained for future use. The resistor array is comprised of 31 individual resistors connected in series. At either end of the array and between each resistor is an electronic switch that transfers the potential at that point to the wiper. The wiper, when at either fixed terminal, acts like its mechanical equivalent and does not move beyond the last position. That is, the counter does not wrap around when clocked to either extreme. The electronic switches on the device operate in a “make before break” mode when the wiper changes tap positions. If the wiper is moved several positions, multiple taps are connected to the wiper for tIW (INC to VW change). The RTOTAL value for the device can temporarily be reduced by a significant amount if the wiper is moved several positions. When the device is powered-down, the last wiper position stored will be maintained in the nonvolatile memory. When power is restored, the contents of the memory are recalled and the wiper is set to the value last stored. Instructions and Programming 8-Lead MSOP RH/VH Principles of Operation 8 U/D 7 INC 6 VCC 5 CS The INC, U/D and CS inputs control the movement of the wiper along the resistor array. With CS set LOW the device is selected and enabled to respond to the U/D and INC inputs. HIGH to LOW transitions on INC will increment or decrement (depending on the state of the U/D input) a seven bit counter. The output of this counter is decoded to select one of thirty two wiper positions along the resistive array. The value of the counter is stored in nonvolatile memory whenever CS transitions HIGH while the INC input is also HIGH. 4 FN8177.2 September 9, 2005 X9313 The system may select the X9313, move the wiper and deselect the device without having to store the latest wiper position in nonvolatile memory. After the wiper movement is performed as described above and once the new position is reached, the system must keep INC LOW while taking CS HIGH. The new wiper position will be maintained until changed by the system or until a power-up/down cycle recalled the previously stored data. This procedure allows the system to always power-up to a preset value stored in nonvolatile memory; then during system operation minor adjustments could be made. The adjustments might be based on user preference, system parameter changes due to temperature drift, etc. The state of U/D may be changed while CS remains LOW. This allows the host system to enable the device and then move the wiper up and down until the proper trim is attained. TABLE 2. MODE SELECTION CS INC U/D MODE L H Wiper up L L Wiper down H X Store wiper position X X Standby current L X No store, return to standby L H Wiper up (not recommended) L L Wiper down (not recommended) H Symbol Table WAVEFORM INPUTS OUTPUTS Must be steady Will be steady May change from Low to High Will change from Low to High May change from High to Low Will change from High to Low Don’t Care: Changes Allowed Changing: State Not Known N/A Center Line is High Impedance 5 FN8177.2 September 9, 2005 X9313 Absolute Maximum Ratings Recommended Operating Conditions Temperature Under Bias . . . . . . . . . . . . . . . . . . . . .-65°C to +135°C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Voltage on CS, INC, U/D, and VCC with respect to VSS . . . . . . . . . . . . . . . . . . . . . . . . -1V to +7V Voltage on VH, VL, VW with respect to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . -6V to +7V ∆V = |VH - VL|: X9313Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4V X9313W, X9313U . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10V Lead Temperature (soldering 10 seconds) . . . . . . . . . . . . . . . 300°C IW (10 seconds) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±8.8mA Temperature: Commercial. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C Industrial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C Supply Voltage (VCC): X9313 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5V ±10% X9313-3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3V to 5.5V CAUTION: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only; functional operation of the device (at these or any other conditions above those listed in the operational sections of this specification) is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Potentiometer Characteristics Over recommended operating conditions unless otherwise stated. LIMITS SYMBOL PARAMETER TEST CONDITIONS/NOTES MIN TYP End-to-end resistance tolerance MAX UNIT ±20 % VVH VH terminal voltage -5 +5 V VVL VL terminal voltage -5 +5 V RTOTAL ≥ 10kΩ 10 mW RTOTAL ≥ 1kΩ 16 mW 100 W ±4.4 mA Power rating RW Wiper resistance IW Wiper current IW = 1mA, VCC = 5V Noise Ref: 1kHz Resolution Absolute linearity (Note 1) RW(n)(actual) - RW(n)(expected) Relative linearity (Note 2) RW(n+1) - (RW(n)+MI) RTOTAL temperature coefficient 40 -120 dBV 3 % Potentiometer capacitances MI (Note 3) ±0.2 MI (Note 3) ±300 Ratiometric temperature coefficient CH/CL/CW ±1 ppm/°C ±20 See Circuit #3 10/10/25 ppm/°C pF NOTES: 1. Absolute linearity is utilized to determine actual wiper voltage versus expected voltage = (VW(n)(actual) - VW(n)(expected)) = ±1 MI maximum. 2. Relative linearity is a measure of the error in step size between taps = RW(n+1) - (RW(n) + MI) = ±0.2 MI. 3. 1 MI = minimum increment = RTOT / 31. 6 FN8177.2 September 9, 2005 X9313 DC Operating Characteristics Over recommended operating conditions unless otherwise stated. LIMITS SYMBOL PARAMETER TEST CONDITIONS/NOTES MIN TYP (Note 4) MAX UNIT 1 3 mA 200 500 µA ±10 µA ICC VCC active current CS = VIL, U/D = VIL or VIH and INC = 0.42 / 2.4V @ max tCYC ISB Standby supply current CS = VCC - 0.3V, U/D and INC = VSS or VCC - 0.3V ILI CS, INC, U/D input leakage current VIN = VSS to VCC VIH CS, INC, U/D input HIGH current 2 VCC + 1 V VIL CS, INC, U/D input LOW current -1 +0.8 V CIN CS, INC, U/D input capacitance 10 pF VCC = 5V, VIN = VSS, TA = 25°C, f = 1MHz NOTES: 4. Typical values are for TA = 25°C and nominal supply voltage. 5. This parameter is periodically sampled and not 100% tested. Endurance and Data Retention PARAMETER MIN UNIT Minimum endurance 100,000 Data changes per bit per register Data retention 100 Years VH/RH VH/RH RTOTAL TEST POINT RH CW CH VS TEST POINT VW/RW VL/RL VL/RL VW/RW VW FORCE CURRENT CL RL 10pF 25pF 10pF RW FIGURE 1. TEST CIRCUIT #1 FIGURE 2. TEST CIRCUIT #2 FIGURE 3. CIRCUIT #3 SPICE MACRO MODEL AC Conditions of Test Input pulse levels 0V to 3V Input rise and fall times 10ns Input reference levels 1.5V 7 FN8177.2 September 9, 2005 X9313 AC Operating Characteristics Over recommended operating conditions unless otherwise stated. LIMITS SYMBOL PARAMETER TYP (Note 6) MIN MAX UNIT tCI CS to INC setup 100 ns tID INC HIGH to U/D change 100 ns tDI U/D to INC setup 2.9 µs tIL INC LOW period 1 µs tIH INC HIGH period 1 µs tIC INC inactive to CS inactive 1 µs tCPH CS deselect time (STORE) 20 ms tCPH CS deselect time (NO STORE) 100 ns INC to VW change tIW tCYC 1 INC cycle time tR, tF (Note 7) tPU (Note 7) 5 4 µs INC input rise and fall time Power-up to wiper stable tR VCC (Note 7) tWR µs VCC power-up rate 0.2 Store cycle 5 500 µs 5 µs 50 V/ms 10 ms NOTES: 6. Typical values are for TA = 25°C and nominal supply voltage. 7. This parameter is not 100% tested. Power-Up and -Down Requirements spec is always in effect. In order to prevent unwanted tap position changes, or an inadvertent store, bring the CS and INC high before or concurrently with the VCC pin on powerup. The recommended power-up sequence is to apply VCC/VSS first, then the potentiometer voltages. During power-up, the data sheet parameters for the DCP do not fully apply until 1 millisecond after VCC reaches its final value. The VCC ramp AC Timing CS tCYC tCI tIL tIC tIH tCPH 90% INC 90% 10% tID tDI tF tR U/D tIW MI (SEE NOTE) VW NOTE: MI IN THE AC TIMING DIAGRAM REFERS TO THE MINIMUM INCREMENTAL CHANGE IN THE VW OUTPUT DUE TO A CHANGE IN THE WIPER POSITION. 8 FN8177.2 September 9, 2005 X9313 Applications Information computer-based digital controls, and (3) the retentivity of nonvolatile memory used for the storage of multiple potentiometer settings or data. Electronic digitally controlled potentiometers (XDCP) provide three powerful application advantages; (1) the variability and reliability of a solid-state potentiometer, (2) the flexibility of Basic Configurations of Electronic Potentiometers VR VR VH VW/RW VL I THREE-TERMINAL POTENTIOMETER; VARIABLE VOLTAGE DIVIDER TWO-TERMINAL VARIABLE RESISTOR; VARIABLE CURRENT Basic Circuits BUFFERED REFERENCE VOLTAGE CASCADING TECHNIQUES R1 +V NONINVERTING AMPLIFIER +5V +V VS +V LM308A + +5V VW VREF VO – OP-07 + – X VW/RW VOUT -5V R2 +V -5V R1 VW VOUT = VW/RW (a) (b) VO = (1 + R2 / R1)VS OFFSET VOLTAGE ADJUSTMENT VOLTAGE REGULATOR R1 VIN VO (REG) 317 COMPARATOR WITH HYSTERESIS R2 VS VS LT311A – R1 – VO + 10kΩ +12V 10kΩ } 10kΩ R2 } TL072 Iadj VO (REG) = 1.25V (1 + R2 / R1) + IADJ R2 VO + 100kΩ R1 R2 VUL = [R1 / (R1 + R2)] VO(max) VLL = [R1 / (R1 + R2)] VO(min) -12V (for additional circuits see AN115) 9 FN8177.2 September 9, 2005 X9313 Packaging Information 8-LEAD MINIATURE SMALL OUTLINE GULL WING PACKAGE TYPE M 0.118 ± 0.002 (3.00 ± 0.05) 0.012 + 0.006 / -0.002 (0.30 + 0.15 / -0.05) 0.0256 (0.65) Typ. R 0.014 (0.36) 0.118 ± 0.002 (3.00 ± 0.05) 0.030 (0.76) 0.0216 (0.55) 0.036 (0.91) 0.032 (0.81) 0.040 ± 0.002 (1.02 ± 0.05) 7° Typ. 0.008 (0.20) 0.004 (0.10) 0.0256" Typical 0.150 (3.81) Ref. 0.193 (4.90) Ref. 0.007 (0.18) 0.005 (0.13) 0.025" Typical 0.220" FOOTPRINT 0.020" Typical 8 Places NOTE ALL DIMENSIONS IN INCHES AND (MILLIMETERS 10 FN8177.2 September 9, 2005 X9313 Packaging Information 8-LEAD PLASTIC SMALL OUTLINE GULL WING PACKAGE TYPE S 0.150 (3.80) 0.228 (5.80) 0.158 (4.00) 0.244 (6.20) Pin 1 Index Pin 1 0.014 (0.35) 0.019 (0.49) 0.188 (4.78) 0.197 (5.00) (4X) 7° 0.053 (1.35) 0.069 (1.75) 0.004 (0.19) 0.010 (0.25) 0.050 (1.27) 0.010 (0.25) X 45° 0.020 (0.50) 0.050"Typical 0.050" Typical 0° - 8° 0.0075 (0.19) 0.010 (0.25) 0.250" 0.016 (0.410) 0.037 (0.937) FOOTPRINT 0.030" Typical 8 Places NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 11 FN8177.2 September 9, 2005