ETC ZVNL120C

N-CHANNEL ENHANCEMENT
MODE VERTICAL DMOS FET
ZVNL120C
ISSUE 2 – MARCH 94
FEATURES
* 200 Volt VDS
* RDS(on)=10Ω
* Low threshold
APPLICATIONS
* Telephone handsets
G
D
S
E-Line
TO92 Compatible
REFER TO ZVNL120A FOR GRAPHS
ABSOLUTE MAXIMUM RATINGS.
PARAMETER
SYMBOL
Drain-Source Voltage
VDS
VALUE
200
UNIT
V
Continuous Drain Current at Tamb=25°C
ID
180
mA
Pulsed Drain Current
IDM
2
A
Gate Source Voltage
VGS
± 20
V
Power Dissipation at Tamb=25°C
Ptot
700
mW
Operating and Storage Temperature Range
Tj:Tstg
-55 to +150
°C
ELECTRICAL CHARACTERISTICS (at Tamb = 25°C unless otherwise stated).
PARAMETER
SYMBOL MIN.
Drain-Source Breakdown
Voltage
BVDSS
200
Gate-Source Threshold
Voltage
VGS(th)
0.5
MAX. UNIT CONDITIONS.
V
ID=1mA, VGS=0V
1.5
V
ID=1mA, VDS= VGS
Gate-Body Leakage
IGSS
100
nA
VGS=± 20V, VDS=0V
Zero Gate Voltage Drain
Current
IDSS
10
100
µA
µA
VDS=200 V, VGS=0
VDS=160 V, VGS=0V,
T=125°C(2)
mA
VDS=25 V, VGS=5V
10
10
Ω
Ω
VGS=5V,ID=250mA
VGS=3V, ID=125mA
mS
VDS=25V,ID=250mA
On-State Drain Current(1)
ID(on)
Static Drain-Source On-State
Resistance (1)
RDS(on)
Forward Transconductance
(1)(2)
gfs
500
200
Input Capacitance (2)
Ciss
85
pF
Common Source Output
Capacitance (2)
Coss
20
pF
Reverse Transfer
Capacitance (2)
Crss
7
pF
Turn-On Delay Time (2)(3)
td(on)
8
ns
Rise Time (2)(3)
tr
8
ns
Turn-Off Delay Time (2)(3)
td(off)
20
ns
Fall Time (2)(3)
tf
12
ns
VDS=25 V, VGS=0V, f=1MHz
VDD ≈ 25V, ID=250mA
(1) Measured under pulsed conditions. Width=300µs. Duty cycle ≤2%
(2) Sample test.
3-404
3) Switching times measured with 50Ω source impedance and <5ns rise time on a pulse generator
(