INTEGRATED CIRCUITS DATA SHEET 74HC1G125; 74HCT1G125 Bus buffer/line driver; 3-state Product specification File under Integrated Circuits, IC06 1998 Nov 10 Philips Semiconductors Product specification Bus buffer/line driver; 3-state FEATURES 74HC1G125; 74HCT1G125 QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf ≤ 6.0 ns. • Wide operating voltage: 2.0 to 6.0 V TYP. • Symmetrical output impedance • High noise immunity SYMBOL PARAMETER UNIT HC1G tPHL/tPLH propagation delay inA to outY • Balanced propagation delays CI input capacitance • Very small 5 pins package CPD power dissipation capacitance • Low power dissipation CONDITIONS • Output capability: bus driver. CL = 15 pF; VCC = 5 V notes 1 and 2 HCT1G 9 10 ns 1.5 1.5 pF 30 27 pF Notes DESCRIPTION 1. CPD is used to determine the dynamic power dissipation (PD in µW). The 74HC1G/HCT1G125 is a high-speed Si-gate CMOS device. The 74HC1G/HCT1G125 provides one non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input (OE). A HIGH at OE causes the output as assume a high-impedance OFF-state. The bus driver output currents are equal compared to the 74HC/HCT125. PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; ∑ (CL × VCC2 × fo) = sum of outputs. 2. For HC1G the condition is VI = GND to VCC. For HCT1G the condition is VI = GND to VCC − 1.5 V. PINNING PIN FUNCTION TABLE See note 1. INPUTS SYMBOL DESCRIPTION 1 OE output enable input 2 inA data input OUTPUT 3 GND ground (0 V) OE inA outY 4 outY data output L L L 5 VCC DC supply voltage L H H H X Z Note 1. H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF state. 1998 Nov 10 2 Philips Semiconductors Product specification Bus buffer/line driver; 3-state 74HC1G125; 74HCT1G125 ORDERING INFORMATION PACKAGES OUTSIDE NORTH AMERICA 74HC1G125GW TEMPERATURE RANGE PINS PACKAGE MATERIAL CODE MARKING −40 to +125 °C 5 SC-88A plastic SOT353 HM 5 SC-88A plastic SOT353 TM 74HCT1G125GW handbook, halfpage handbook, halfpage OE 1 5 VCC inA 2 GND 125 3 4 2 inA 1 OE outY 4 outY MNA118 MNA117 Fig.1 Pin configuration. handbook, halfpage Fig.2 Logic symbol. handbook, halfpage outY inA 2 4 1 OE OE MNA119 MNA120 Fig.3 IEC logic symbol. 1998 Nov 10 Fig.4 Logic diagram. 3 Philips Semiconductors Product specification Bus buffer/line driver; 3-state 74HC1G125; 74HCT1G125 RECOMMENDED OPERATING CONDITIONS 74HC1G04 SYMBOL 74HCT1G04 PARAMETER UNIT MIN. TYP. MAX. MIN. TYP. CONDITIONS MAX. VCC DC supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V VI input voltage 0 − VCC 0 − VCC V VO output voltage 0 − VCC 0 − VCC V Tamb operating ambient temperature −40 +25 +125 −40 +25 +125 °C see DC and AC characteristics per device tr, tf input rise and fall times except for Schmitt trigger inputs − − 1000 − − − ns VCC = 2.0 V − − 500 − − 500 ns VCC = 4.5 V − − 400 − − − ns VCC = 6.0 V LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134); voltages are referenced to GND (ground = 0 V). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VCC DC supply voltage −0.5 +7.0 V ±IIK DC input diode current VI < −0.5 V or VI > VCC + 0.5 V; note 1 − 20 mA ±IOK DC output diode current VO < −0.5V or VO > VCC + 0.5 V; note 1 − 20 mA ±IO DC output source or sink current standard outputs −0.5V < VO < VCC + 0.5 V; note 1 − 12.5 mA ±ICC DC VCC or GND current for types with standard outputs note 1 − 25 mA Tstg storage temperature −65 +150 °C PD power dissipation per package 200 mW temperature range: −40 to +125 °C; note 2 − Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. Above 55 °C the value of PD derates linearly with 2.5 mW/K. 1998 Nov 10 4 Philips Semiconductors Product specification Bus buffer/line driver; 3-state 74HC1G125; 74HCT1G125 DC CHARACTERISTICS Family 74HC1G Additional type data to the recommended operating conditions; voltages are referenced to GND (ground = 0 V). Tamb (°C) SYMBOL −40 to +85 PARAMETER MIN. VIH HIGH-level input voltage VOH VOH VOL TYP.(1) −40 to +125 MAX. MIN. 1.2 − 1.5 − 3.15 2.4 − 3.15 − 3.2 − 4.2 − LOW-level input voltage − 0.8 0.5 − 0.5 − 2.1 1.35 − 1.35 − 2.8 1.8 − 1.8 HIGH-level output voltage; all outputs 1.9 2.0 − 1.9 − 4.4 4.5 − 4.4 − 5.9 6.0 − 5.9 − HIGH-level output voltage; standard outputs 4.13 4.32 − 3.7 − 5.63 5.81 − 5.2 − LOW-level output voltage; all outputs V 4.5 6.0 V 2.0 4.5 6.0 V 2.0 4.5 4.5 VI = VIH or VIL; −IO = 2.0 mA 6.0 VI = VIH or VIL; −IO = 2.6 mA 2.0 VI = VIH or VIL; IO = 20 µA 0 0.1 − 0.1 0.1 − 0.1 4.5 − 0 0.1 − 0.1 6.0 0.33 − 0.4 − 0.16 0.33 − 0.4 II input leakage current − − 1.0 − 1.0 ICC quiescent supply current − − 10 − 20 Note 1. All typical values are measured at Tamb = 25 °C. 5 VI = VIH or VIL: −IO = 20 µA 6.0 V 0 0.15 OTHER 2.0 − − 1998 Nov 10 VCC (V) − LOW-level output voltage; standard outputs VOL UNIT MAX. 1.5 4.2 VIL TEST CONDITIONS V V 4.5 VI = VIH or VIL; IO = 2.0 mA 6.0 VI = VIH or VIL; IO = 2.6 mA µA 6.0 VI = VCC or GND µA 6.0 VI = VCC or GND; IO = 0 Philips Semiconductors Product specification Bus buffer/line driver; 3-state 74HC1G125; 74HCT1G125 Family 74HCT1G Additional type data to the recommended operating conditions; voltages are referenced to GND (ground = 0 V). Tamb (°C) SYMBOL TEST CONDITIONS −40 to +85 PARAMETER MIN. TYP.(1) −40 to +125 MAX. MIN. UNIT VCC (V) MAX. OTHER VIH HIGH-level input voltage 2.0 1.6 − 2.0 − V 4.5 to 5.5 VIL LOW-level input voltage − 1.2 0.8 − 0.8 V 4.5 to 5.5 VOH HIGH-level output voltage; all outputs 4.4 4.5 − 4.4 − V 4.5 VI = VIH or VIL; −IO = 20 µA VOH HIGH-level output voltage; standard outputs 4.13 4.32 − 3.7 − V 4.5 VI = VIH or VIL; −IO = 2.0 mA VOL LOW-level output voltage; all outputs − 0 0.1 − 0.1 V 4.5 VI = VIH or VIL; IO = 20 µA VOL LOW-level output voltage; standard outputs − 0.15 0.33 − 0.4 V 4.5 VI = VIH or VIL; IO = 2.0 mA II input leakage current − − 1.0 − 1.0 µA 5.5 VI = VCC or GND ICC quiescent supply current − − 10.0 − 20 µA 5.5 VI = VCC or GND; IO = 0 ∆ICC additional supply current per input − − 500 − 850 µA 4.5 to 5.5 VI = VCC − 2.1; IO = 0 Note 1. All typical values are measured at Tamb = 25 °C. 1998 Nov 10 6 Philips Semiconductors Product specification Bus buffer/line driver; 3-state 74HC1G125; 74HCT1G125 AC CHARACTERISTICS Type 74HC1G125 GND = 0 V; tr = tf ≤ 6.0 ns; CL = 50 pF. Tamb (°C) SYMBOL −40 to +85 PARAMETER MIN. TYP.(1) tPHL/tPLH tPZH/tPZL tPHZ/tPLZ TEST CONDITIONS −40 to +125 MAX. MIN. UNIT VCC (V) MAX. − 24 125 − 150 ns 2.0 − 10 25 − 30 ns 4.5 − 8 21 − 26 ns 6.0 3-state output enable time OE to outY − 19 155 − 190 ns 2.0 − 9 31 − 38 ns 4.5 − 7 26 − 32 ns 6.0 3-state output disable time OE to outY − 18 155 − 190 ns 2.0 − 12 31 − 38 ns 4.5 − 11 26 − 32 ns 6.0 propagation delay inA to outY WAVEFORMS see Figs 5 and 7 see Figs 6 and 7 see Figs 6 and 7 Note 1. All typical values are measured at Tamb = 25 °C. Type 74HCT1G125 GND = 0 V; tr = tf ≤ 6.0 ns; CL = 50 pF. Tamb (°C) SYMBOL −40 to +85 PARAMETER MIN. TYP.(1) TEST CONDITIONS −40 to +125 MAX. MIN. UNIT VCC (V) MAX. WAVEFORMS tPHL/tPLH propagation delay inA to outY − 11 30 − 36 ns 4.5 see Figs 5 and 7 tPZH/tPZL 3-state output enable time OE to outY − 10 35 − 42 ns 4.5 see Figs 6 and 7 tPHZ/tPLZ 3-state output disable time OE to outY − 11 31 − 38 ns 4.5 see Figs 6 and 7 Note 1. All typical values are measured at Tamb = 25 °C. 1998 Nov 10 7 Philips Semiconductors Product specification Bus buffer/line driver; 3-state 74HC1G125; 74HCT1G125 AC WAVEFORMS handbook, halfpage VI inA INPUT VM(1) GND tPLH tPHL outY OUTPUT VM(1) MNA121 (1) HC1G VM = 50%; VI = GND to VCC; HCT1G VM = 1.3 V; VI = GND to 3.0 V. Fig.5 The input (inA) to output (outY) propagation delays. VI handbook, full pagewidth VM(1) OE INPUT GND tPLZ tPZL VCC OUTPUT LOW-to-OFF OFF-to-LOW VM(1) VOL +0.3 V tPHZ tPZH VOH −0.3 V OUTPUT HIGH-to-OFF OFF-to-HIGH VM(1) GND output enabled output disabled output enabled MNA122 (1) HC1G VM = 50%; VI = GND to VCC; HCT1G VM = 1.3 V; VI = GND to 3.0 V. Fig.6 The 3-state enable and disable times. 1998 Nov 10 8 Philips Semiconductors Product specification Bus buffer/line driver; 3-state 74HC1G125; 74HCT1G125 VCC handbook, halfpage PULSE GENERATOR VI VO RL = 1 kΩ S1 D.U.T. VCC open CL 50 pF RT MNA123 Definitions for test circuit; CL = load capacitance including jig and probe capacitance. (See “AC characteristics”) RT = termination resistance should be equal to the output impedance Zo of the pulse generator. RT = termination resistance should be equal to the output impedance Zo of the pulse generator. TEST tPLH/tPHL open tPLZ/tPZL VCC tPHZ/tPZH GND Fig.7 Load circuitry for switching times. 1998 Nov 10 9 S1 Philips Semiconductors Product specification Bus buffer/line driver; 3-state 74HC1G125; 74HCT1G125 PACKAGE OUTLINE Plastic surface mounted package; 5 leads SOT353 D E B y X A HE 5 v M A 4 Q A A1 1 2 e1 3 bp c Lp w M B e detail X 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 max bp c D E (2) e e1 HE Lp Q v w y mm 1.1 0.8 0.1 0.30 0.20 0.25 0.10 2.2 1.8 1.35 1.15 1.3 0.65 2.2 2.0 0.45 0.15 0.25 0.15 0.2 0.2 0.1 OUTLINE VERSION SOT353 1998 Nov 10 REFERENCES IEC JEDEC EIAJ SC-88A 10 EUROPEAN PROJECTION ISSUE DATE 97-02-28 Philips Semiconductors Product specification Bus buffer/line driver; 3-state 74HC1G125; 74HCT1G125 SOLDERING Wave soldering Introduction Wave soldering techniques can be used for all SO packages if the following conditions are observed: There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted IC’s, or for printed-circuits with high population densities. In these situations reflow soldering is often used. • A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. • The longitudinal axis of the package footprint must be parallel to the solder flow. • The package footprint must incorporate solder thieves at the downstream end. This text gives a very brief insight to a complex technology. A more in-depth account of soldering IC’s can be found in our “Data Handbook IC26; Integrated Circuit Packages” (order code 9398 652 90011). During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Reflow soldering Reflow soldering techniques are suitable for all SO packages. Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 °C within 6 seconds. Typical dwell time is 4 seconds at 250 °C. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 °C. Repairing soldered joints Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 °C. 1998 Nov 10 11 Philips Semiconductors Product specification Bus buffer/line driver; 3-state 74HC1G125; 74HCT1G125 DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 1998 Nov 10 12 Philips Semiconductors Product specification Bus buffer/line driver; 3-state 74HC1G125; 74HCT1G125 NOTES 1998 Nov 10 13 Philips Semiconductors Product specification Bus buffer/line driver; 3-state 74HC1G125; 74HCT1G125 NOTES 1998 Nov 10 14 Philips Semiconductors Product specification Bus buffer/line driver; 3-state 74HC1G125; 74HCT1G125 NOTES 1998 Nov 10 15 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 245106/00/01/pp16 Date of release: 1998 Nov 10 Document order number: 9397 750 03693