Low Noise, Low Input Bias Current, Rail-to-Rail Output, JFET Dual Operational Amplifier ADA4001-2 Data Sheet Low TCVOS: ±5 µV/°C typical Low input bias current: 20 pA typical at VSY = ±15 V Low noise 7.7 nV/√Hz typical at f = 1 kHz 1.2 µV rms at 20 Hz to 20 kHz Low distortion: 0.00006% No phase reversal Rail-to-rail output Unity-gain stable PIN CONFIGURATION OUT A 1 –IN A 2 +IN A 3 V– 4 ADA4001-2 TOP VIEW (Not to Scale) 8 V+ 7 OUT B 6 –IN B 5 +IN B 10375-002 FEATURES Figure 1. 8-Lead SOIC_N (R Suffix) APPLICATIONS Instrumentation Medical instruments Multipole filters Precision current measurement Photodiode amplifiers Sensors Audio GENERAL DESCRIPTION The ADA4001-2 is a dual channel JFET amplifier that features low input voltage noise and current noise, input bias current, and rail-to-rail output. The combination of low noise and low input bias current makes this amplifier especially suitable for high impedance sensor amplification. With low noise and fast settling times, the ADA4001-2 provides good accuracy for medical instruments, electronic measurement, and automated test equipment. Unlike many competitive amplifiers, the ADA4001-2 maintains fast settling performance even with substantial capacitive loads, and, unlike many older JFET amplifiers, the ADA4001-2 does not suffer from output phase reversal when input voltages exceed the maximum common-mode voltage range. With fast slew rate and great stability under capacitive loads, the ADA4001-2 is a good fit for filter applications. With low input bias currents and noise, it offers a wide dynamic range for photodiode amplifier circuits. Low noise and distortion, along with high output current and excellent speed, make the ADA4001-2 a great choice for audio applications. The ADA4001-2 is specified over the −40°C to +125°C extended industrial temperature range. The ADA4001-2 is available in an 8-lead narrow SOIC package. Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2012 Analog Devices, Inc. All rights reserved. ADA4001-2 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Typical Performance Characteristics ..............................................5 Applications ....................................................................................... 1 Applications Information .............................................................. 10 Pin Configuration ............................................................................. 1 Total Noise Including Source Resistors ................................... 10 General Description ......................................................................... 1 I-V Conversion Applications .................................................... 10 Revision History ............................................................................... 2 Input Bias Current ...................................................................... 11 Specifications..................................................................................... 3 Noise Considerations ................................................................. 11 Electrical Characteristics ............................................................. 3 Outline Dimensions ....................................................................... 12 Absolute Maximum Ratings ............................................................ 4 Ordering Guide .......................................................................... 12 Thermal Resistance ...................................................................... 4 ESD Caution .................................................................................. 4 REVISION HISTORY 5/12—Rev. A to Rev B Changes to General Description Section ...................................... 1 Changed Input Impedance to Input Capacitance Throughout .. 3 Added Input Resistance Parameter, Table 1 .................................. 3 Change to Figure 5 Caption ............................................................ 5 2/12—Rev. 0 to Rev. A Changes to Figure 27 ........................................................................ 9 2/12—Revision 0: Initial Version Rev. B | Page 2 of 12 Data Sheet ADA4001-2 SPECIFICATIONS ELECTRICAL CHARACTERISTICS VSY = ±15 V, VCM = 0 V, TA = 25°C, unless otherwise noted. Table 1. Parameter INPUT CHARACTERISTICS Offset Voltage Symbol Test Conditions/Comments Min VOS Typ Max Unit ±0.5 ±1.5 ±2.5 93 3.1 4.8 >1 × 1013 mV mV µV/°C pA nA pA nA V dB dB dB dB dB dB pF pF Ω ±50 V V V V V V mA −40°C < TA < +125°C Offset Voltage Drift Input Bias Current ΔVOS/ΔT IB ±5 20 −40°C < TA < +125°C Input Offset Current IOS −40°C < TA < +125°C Input Voltage Range Common-Mode Rejection Ratio CMRR Large Signal Voltage Gain AVO Input Capacitance, Differential Input Capacitance, Common-Mode Input Resistance OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Short-Circuit Current POWER SUPPLY Power Supply Rejection Ratio Operating Voltage Range Supply Current/Amplifier DYNAMIC PERFORMANCE Slew Rate Gain Bandwidth Product Unity-Gain Crossover Phase Margin −3 dB Closed-Loop Bandwidth Settling Time Total Harmonic Distortion (THD) + Noise NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density 1 CDM CCM VOH VOL VCM = −12.5 V to +12.5 V −40°C < TA < +125°C RL = 10 kΩ, VO = −13.5 V to +13.5 V RL = 2 kΩ, VO = −13.5 V to +13.5 V −40°C < TA < +125°C RL = 600 Ω, VO = −13.0 V to +13.0 V VCM = 0 V VCM = 0 V VCM = 0 V RL = 10 kΩ RL = 2 kΩ RL = 600 Ω RL = 10 kΩ RL = 2 kΩ RL = 600 Ω −12.5 96 90 104 104 90 90 VS = ±4.5 V to ±18 V −40°C < TA < +125°C ISY VO = 0 V SR GBP UGC φM −3 dB tS THD + N RL = 2 kΩ VIN = 5 mV p-p, RL = 10 kΩ, AV = 100 VIN = 5 mV p-p, RL = 10 kΩ, AV = 1 en rms en in 105 112 112 14.8 14.5 13.5 −14.8 −14.5 −13.5 ISC PSRR 30 4 20 2 +12.5 96 93 ±5 110 2 ±15 1 ±18 3 4 dB dB V mA mA AV = 1, VIN = 5 mV p-p To 0.01%, 10 V step, G = +1 1 kHz, G = +1, RL = 2 kΩ ±25 16.7 10.2 76 10.3 1.2 0.00006 V/µs MHz MHz Degrees MHz µs % 20 Hz to 20 kHz f = 100 Hz f = 1 kHz f = 1 kHz 1.2 8.8 7.7 3 μV rms nV/√Hz nV/√Hz fA/√Hz Guaranteed by design and characterization. Rev. B | Page 3 of 12 ADA4001-2 Data Sheet ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 2. Parameter Supply Voltage Input Voltage Output Short-Circuit Duration to GND Storage Temperature Range Operating Temperature Range Junction Temperature Range Lead Temperature (Soldering, 10 sec) Electrostatic Discharge (Human Body Model) Rating ±18 V ±VSY Observe derating curves −65°C to +150°C −40°C to +125°C −65°C to +150°C 300°C 3000 V Table 3. Package Type 8-Lead SOIC_N (R-8) 1 θJA1 130 θJC 45 Unit °C/W θJA is specified for worst-case conditions, that is, θJA is specified for a device soldered in a circuit board for surface-mount packages. ESD CAUTION Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. B | Page 4 of 12 Data Sheet ADA4001-2 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted. 200 INPUT BIAS CURRENT (pA) 160 140 120 100 80 60 40 0 –5 800 10375-003 700 600 500 400 300 200 0 100 –100 –200 –300 –400 –500 –600 –700 –800 OFFSET VOLTAGE (µV) –15 –15 Figure 2. Input Offset Voltage Distribution ADA4001-2 SOIC VSY = ±15V RL = ∞ 75 INPUT BIAS CURRENT (pA) 100 80 60 40 20 +125°C 50 +25°C 25 +85°C 0 –40°C TCVOS (µV/°C) –50 –15 10375-004 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 10.0 10.5 –25 Figure 3. TCVOS Distribution ADA4001-2 VSY = ±15V TA = –40°C TO +125°C 100 10 VDD – VOUT (V) UNIT 3 0 UNIT 2 –100 15 ADA4001-2 VSY = ±15V TA = 25°C 1 0.1 UNIT 1 –10 –5 0 5 10 COMMON-MODE INPUT VOLTAGE (V) 15 0.01 0.1 10375-005 –200 –300 –15 0 5 10 –5 COMMON-MODE INPUT VOLTAGE (V) Figure 6. Input Bias Current vs. VCM and Temperature 300 200 –10 10375-007 NUMBER OF AMPLIFIERS 15 100 ADA4001-2 VSY = ±15V TA = –40°C TO +125°C 120 INPUT OFFSET VOLTAGE (µV) –5 0 5 10 COMMON-MODE INPUT VOLTAGE (V) Figure 5. Input Bias Current vs. Common-Mode Voltage 140 0 –10 10375-006 –10 20 0 ADA4001-2 SOIC VSY = ±15V 10 TA = 25°C RL = ∞ THREE UNITS 5 1 10 IOUT SOURCE (mA) Figure 7. Dropout Voltage vs. Source Current Figure 4. Input Offset Voltage vs. Common-Mode Voltage Rev. B | Page 5 of 12 100 10375-008 NUMBER OF CHANNELS 15 ADA4001-2 SOIC VSY = ±15V TA = 25°C 180 ADA4001-2 Data Sheet 1k 10 ADA4001-2 VSY = ±15V TA = 25°C ADA4001-2 VSY = ±15V TA = 25°C ZOUT (Ω) 1 10 AV = +100 1 AV = +10 0.1 0.1 1 IOUT SINK (mA) 10 100 0.01 0.1 Figure 8. Dropout Voltage vs. Sink Current 270 ADA4001-2 VSY = ±15V TA = 25°C 225 RL = 2kΩ 180 60 135 40 90 20 45 0 80 –20 10 100 FREQUENCY (kHz) 1k 10k 40 PSRR+ 0 –45 1 PSRR– 60 20 0 0.1 –90 100k –20 0.1 1 10 100 FREQUENCY (kHz) Figure 9. Open-Loop Gain and Phase vs. Frequency 50 AV = +100 1k 10k Figure 12. PSRR vs. Frequency 140 ADA4001-2 VSY = ±15V TA = 25°C RL = 2kΩ ADA4001-2 VSY = ±15V TA = 25°C 120 30 100 CMRR (dB) AV = +10 10 AV = +1 80 60 40 –10 –30 1 10 100 1k FREQUENCY (kHz) 10k 100k 0 0.1 Figure 10. Closed-Loop Gain vs. Frequency 1 10 100 FREQUENCY (kHz) Figure 13. CMRR vs. Frequency Rev. B | Page 6 of 12 1k 10k 10375-016 20 10375-013 GAIN (dB) 100k ADA4001-2 VSY = ±15V TA = 25°C 100 PSRR (dB) 80 –40 0.01 10k 120 10375-012 GAIN (dB) 100 10 100 1k FREQUENCY (kHz) Figure 11. Closed-Loop Output Impedance vs. Frequency PHASE (Degrees) 120 1 10375-014 0.1 10375-009 0.01 0.01 AV = +1 10375-015 VOUT – VSS (V) 100 Data Sheet ADA4001-2 12 12 ADA4001-2 VSY = ±15V TA = 25°C 10 8 0.1% 6 0.01% 6 0.1% 0.01% 4 4 2 2 0 0 0.2 0.4 0.6 0.8 SETTLING TIME (µs) 1.0 1.2 0 0 0.2 Figure 14. Settling Time Positive Step 0.4 0.6 0.8 SETTLING TIME (µs) 100 ADA4001-2 VSY = ±15V TA = 25°C 10 VOLTAGE NOISE DENSITY (nV/ Hz) 8 6 VOLTS (V) 4 ADA4001-2 VSY = ±15V TA = 25°C AV = +1 RL = 2kΩ CL = 100pF 0 –2 –4 1.2 Figure 17. Settling Time Negative Step 12 2 1.0 10375-018 STEP SIZE (V) 8 10375-029 STEP SIZE (V) ADA4001-2 VSY = ±15V TA = 25°C 10 –6 –8 10 0 1 2 3 4 5 6 TIME (µs) 7 8 9 10 1 0.001 10375-030 –12 Figure 15. Large Signal Transient Response 0.1 1 FREQUENCY (kHz) 10 100 Figure 18. Voltage Noise Density 75 50 45 50 40 ADA4001-2 VSY = ±15V TA = 25°C AV = +1 35 OVERSHOOT (%) 25 ADA4001-2 VSY = ±15V TA = 25°C AV = +1 RL = 2kΩ CL = 100pF 0 –25 OS+ 30 25 20 15 OS– 10 –50 –75 0 2 4 6 8 TIME (µs) 10 0 0.01 Figure 16. Small Signal Transient Response 0.1 CAPACITANCE (nF) 1 Figure 19. Overshoot vs. Load Capacitance Rev. B | Page 7 of 12 10375-022 5 10375-017 VOLTAGE (mV) 0.01 10375-021 –10 ADA4001-2 Data Sheet 20 –40 ADA4001-2 VSY = ±15V TA = 25°C RL = 2kΩ 10 –80 5 VOLTS (V) –100 0 –5 –120 –10 –140 OUTPUT INPUT –15 0.1 1 FREQUENCY (kHz) 10 100 –20 10375-031 –160 0.01 0 0.1 0.2 Figure 20. Channel Separation 0.4 0.5 0.6 TIME (ms) 0.7 0.8 0.9 1.0 1.6 1.8 2.0 Figure 23. No Phase Reversal 1 12 ADA4001-2 VSY = ±15V FIN = 1kHz TA = 25°C RL = 2kΩ 0.1 ADA4001-2 VSY = ±15V TA = 25°C AV = +1 RL = 2kΩ CL = 100pF 10 8 6 4 0.01 VOLTS (V) THD + N (%) 0.3 10375-026 CHANNEL SEPARATION (dB) –60 ADA4001-2 VSY = ±15V TA = 25°C AV = +1 RL = 2kΩ CL = 100pF 15 0.001 2 0 –2 –4 –6 0.0001 –8 0.01 0.1 AMPLITUDE (V rms) 1 10 –12 10375-024 0.00001 0.001 0 0.2 0.4 Figure 21. THD + N vs. Amplitude 0.01 0.6 0.8 1.0 1.2 TIME (µs) 1.4 Figure 24. Positive Slew Rate 12 ADA4001-2 VSY = ±15V TA = 25°C RL = 2kΩ ADA4001-2 VSY = ±15V TA = 25°C AV = +1 RL = 2kΩ CL = 100pF 10 8 6 4 VOLTS (V) THD + N (%) 0.001 500kHz FILTER 0.0001 10375-032 –10 2 0 –2 –4 80kHz FILTER –6 –8 0.1 1 FREQUENCY (kHz) 10 100 Figure 22. THD + N vs. Frequency –12 0 0.2 0.4 0.6 0.8 1.0 1.2 TIME (µs) 1.4 Figure 25. Negative Slew Rate Rev. B | Page 8 of 12 1.6 1.8 2.0 10375-033 0.00001 0.01 10375-025 –10 Data Sheet ADA4001-2 3.5 300 ADA4001-2 VSY = ±15V TA = 25°C 3.0 0 –100 –200 2.0 1.5 1.0 +125°C +85°C +25°C –40°C 0.5 –300 0 1 2 3 4 5 6 TIME (sec) 7 8 9 10 0 10375-027 VOLTAGE (nV) 100 ADA4001-2 NO LOAD AV = +1 VCM = 0V 2.5 0 Figure 26. Peak-to-Peak Voltage Noise ±2 ±4 ±6 ±8 ±10 VSY (V) ±12 ±14 ±16 ±18 Figure 27. Supply Current vs. Supply Voltage and Temperature Rev. B | Page 9 of 12 10375-028 ISY FOR BOTH AMPLIFIERS (mA) 200 ADA4001-2 Data Sheet APPLICATIONS INFORMATION Cf TOTAL NOISE INCLUDING SOURCE RESISTORS R2 The low input current noise and input bias current of the ADA4001-2 makes it the ideal amplifier for circuits with substantial input source resistance. Input offset voltage increases by less than 15 nV per 500 Ω of source resistance at room temperature. The total noise density of the circuit is VEE ADA4001-2 e nTOTAL e n 2 i n R S 2 4kTR S Rd Ct 3 1 8 VCC where: en is the input voltage noise density of the part. in is the input current noise density of the part. RS is the source resistance at the noninverting terminal. k is Boltzmann’s constant (1.38 × 10–23 J/K). T is the ambient temperature in Kelvin (T = 273 + °C). Figure 28. Equivalent Preamplifier Photodiode Circuit A larger signal bandwidth can be attained at the expense of additional output noise. The total input capacitance (Ct) consists of the sum of the diode capacitance and the amplifier’s input capacitance (8 pF), which includes external parasitic capacitance. Ct creates a pole in the frequency response that can lead to an unstable system. To ensure stability and optimize the bandwidth of the signal, a capacitor is placed in the feedback loop of the circuit shown in Figure 28. It creates a zero and yields a bandwidth whose corner frequency is 1/(2π(R2Cf)). For RS < 4 kΩ, en dominates and enTOTAL ≈ en. The current noise of the ADA4001-2 is so low that its total density does not become a significant term unless RS is greater than 100 MΩ, an impractical value for most applications. The total equivalent rms noise over a specific bandwidth is expressed as The value of R2 can be determined by the ratio enTOTAL enTOTAL BW V/ID where: V is the desired output voltage of the op amp. ID is the diode current. where BW is the bandwidth in hertz. Note that the previous analysis is valid for frequencies larger than 150 Hz and assumes flat noise above 10 kHz. For lower frequencies, flicker noise (1/f) must be considered. For example, if ID is 100 μA and a 10 V output voltage is desired, R2 should be 100 kΩ. Rd (see Figure 28) is a junction resistance that drops typically by a factor of 2 for every 10°C increase in temperature. I-V CONVERSION APPLICATIONS Photodiode Circuits Common applications for I-V conversion include photodiode circuits where the amplifier is used to convert a current emitted by a diode placed at the positive input terminal into an output voltage. The ADA4001-2 low input bias current, wide bandwidth, and low noise makes it an excellent choice for various photodiode applications, including fax machines, fiber optic controls, motion sensors, and bar code readers. The circuit shown in Figure 28 uses a silicon diode with zero bias voltage. This is known as a photovoltaic mode; this configuration limits the overall noise and is suitable for instrumentation applications. 4 10375-034 2 A typical value for Rd is 1000 MΩ. Because Rd >> R2, the circuit behavior is not impacted by the effect of the junction resistance. The maximum signal bandwidth is f MAX ft 2R2Ct where ft is the unity gain frequency of the amplifier. Cf can be calculated by Cf Ct 2R2 ft where ft is the unity gain frequency of the op amp, and it achieves a phase margin, φM, of approximately 45°. A higher phase margin can be obtained by increasing the value of Cf. Setting Cf to twice the previous value yields approximately φM = 65° and a maximal flat frequency response, but it reduces the maximum signal bandwidth by 50%. Rev. B | Page 10 of 12 Data Sheet ADA4001-2 INPUT BIAS CURRENT NOISE CONSIDERATIONS Because the ADA4001-2 has a JFET input stage, the input bias current, due to the reverse-biased junction, has a leakage current that approximately doubles every 10°C. The power dissipation of the part, combined with the thermal resistance of the package, results in the junction temperature increasing 30°C above ambient. This parameter is tested with high speed ATE equipment, which does not result in the die temperature reaching equilibrium. This is correlated with bench measurements to match the guaranteed maximum at room temperature in Table 1. The JFET input stage offers very low input voltage noise and input current noise. The thermal noise of a 1 kΩ resistor at room temperature is 4 nV/√Hz, thus low values of resistance should be used for dc-coupled inverting and noninverting amplifier configurations. In the case of transimpedance amplifiers (TIAs), current noise is more important. The input current can be reduced by keeping the temperature as low as possible and using a light load on the output. The ADA4001-2 is an excellent choice for both of these applications. Analog Devices, Inc., offers a wide variety of low voltage noise and low current noise op amps in a variety of processes optimized for different supply voltage ranges. Refer to the AN-940 Application Note for a complete discussion of noise, calculations, and selection tables for more than three dozen low noise, op amp families. Rev. B | Page 11 of 12 ADA4001-2 Data Sheet OUTLINE DIMENSIONS 5.00 (0.1968) 4.80 (0.1890) 1 5 6.20 (0.2441) 5.80 (0.2284) 4 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) COPLANARITY 0.10 SEATING PLANE 1.75 (0.0688) 1.35 (0.0532) 0.51 (0.0201) 0.31 (0.0122) 0.50 (0.0196) 0.25 (0.0099) 45° 8° 0° 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) COMPLIANT TO JEDEC STANDARDS MS-012-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. 012407-A 8 4.00 (0.1574) 3.80 (0.1497) Figure 29. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) ORDERING GUIDE Model 1 ADA4001-2ARZ ADA4001-2ARZ-R7 ADA4001-2ARZ-RL 1 Temperature Range −40°C to +125°C −40°C to +125°C −40°C to +125°C Package Description 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N Z = RoHS Compliant Part. ©2012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D10375-0-5/12(B) Rev. B | Page 12 of 12 Package Option R-8 R-8 R-8