Ultralow Quiescent Current,
150 mA, CMOS Linear Regulators
ADP160/ADP161/ADP162/ADP163
Data Sheet
TYPICAL APPLICATION CIRCUITS
ADP160/ADP162
VIN = 2.3V
VIN
2
GND
3
EN
VOUT 5
VOUT = 1.8V
1µF
NC 4
08628-001
ON
OFF
NC = NO CONNECT
Figure 1. 5-Lead TSOT ADP160/ADP162 with Fixed Output Voltage, 1.8 V
ADP161/ADP163
VIN = 4.2V
1
VIN
2
GND
VOUT 5
VOUT = 3.2V
1µF
1µF
R1
ON
3
EN
ADJ 4
OFF
R2
Figure 2. 5-Lead TSOT ADP161/ADP163 with Adjustable Output Voltage, 3.2 V
ADP160/ADP162
1µF
2
VIN
VOUT
TOP VIEW
(Not to Scale)
APPLICATIONS
ON
OFF
1
VOUT = 2.8V
VIN = 3.3V
A
Mobile phones
Digital cameras and audio devices
Portable and battery-powered equipment
Post dc-to-dc regulation
Portable medical devices
1
1µF
08628-002
Ultralow quiescent current
IQ = 560 nA with 0 μA load
IQ = 860 nA with 1 μA load
Stable with 1 μF ceramic input and output capacitors
Maximum output current: 150 mA
Input voltage range: 2.2 V to 5.5 V
Low shutdown current: <50 nA typical
Low dropout voltage: 195 mV @ 150 mA load
Initial accuracy: ±1%
Accuracy over line, load, and temperature: ±3.5%
15 fixed output voltage options: 1.2 V to 4.2 V
Adjustable output available
PSRR performance of 72 dB @ 100 Hz
Current limit and thermal overload protection
Logic-control enable
Integrated output discharge resistor
5-lead TSOT package
4-ball, 0.5 mm pitch WLCSP
B
EN
GND
1µF
08628-003
FEATURES
Figure 3. 4-Ball WLCSP ADP160/ADP162 with Fixed Output Voltage, 2.8 V
GENERAL DESCRIPTION
The ADP160/ADP161/ADP162/ADP163 are ultralow quiescent
current, low dropout, linear regulators that operate from 2.2 V
to 5.5 V and provide up to 150 mA of output current. The low
195 mV dropout voltage at 150 mA load improves efficiency and
allows operation over a wide input voltage range.
The ADP16x are specifically designed for stable operation with a
tiny 1 μF ± 30% ceramic input and output capacitors to meet
the requirements of high performance, space-constrained
applications.
The ADP160 is available in 15 fixed output voltage options,
ranging from 1.2 V to 4.2 V. The ADP160/ADP161 also include
a switched resistor to discharge the output automatically when
Rev. G
the LDO is disabled. The ADP162 is identical to the ADP160
but does not include the output discharge function.
The ADP161and ADP163 are available as adjustable output voltage
regulators. They are only available in a 5-lead TSOT package.
The ADP163 is identical to the ADP161 but does not include
the output discharge function.
Short-circuit and thermal overload protection circuits prevent
damage in adverse conditions. The ADP160 and ADP162 are
available in a tiny 5-lead TSOT and a 4-ball, 0.5 mm pitch
WLCSP package for the smallest footprint solution to meet a
variety of portable power applications.
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ADP160/ADP161/ADP162/ADP163
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Typical Performance Characteristics ..............................................8
Applications ....................................................................................... 1
Theory of Operation ...................................................................... 12
Typical Application Circuits............................................................ 1
Applications Information .............................................................. 14
General Description ......................................................................... 1
Capacitor Selection .................................................................... 14
Revision History ............................................................................... 2
Enable Feature ............................................................................ 15
Specifications..................................................................................... 3
Current Limit and Thermal Overload Protection ................. 15
Input and Output Capacitor, Recommended Specifications .. 4
Thermal Considerations............................................................ 16
Absolute Maximum Ratings ............................................................ 5
PCB Layout Considerations ...................................................... 18
Thermal Data ................................................................................ 5
Light Sensitivity of WLCSPs ..................................................... 18
Thermal Resistance ...................................................................... 5
Outline Dimensions ....................................................................... 20
ESD Caution .................................................................................. 5
Ordering Guide .......................................................................... 21
Pin Configurations and Function Descriptions ........................... 6
REVISION HISTORY
12/12—Rev. F to Rev. G
Changes to Table 3 ............................................................................ 5
Changes to Pin 4 Description ......................................................... 6
Changes to Figure 22 ...................................................................... 10
Changes to Figure 32 and Figure 33 Captions ............................ 12
Added Light Sensitivity of WLCSPs Section............................... 18
9/12—Rev. E to Rev. F
Changes to Ordering Guide ...........................................................21
4/12—Rev. D to Rev. E
Updated Outline Dimensions ........................................................20
Changes to Ordering Guide ...........................................................21
1/12—Rev. C to Rev. D
Changes to Ordering Guide .......................................................... 21
1/11—Rev. B to Rev. C
Changes to Figure 15 and Figure 16............................................... 9
11/10—Rev. A to Rev. B
Changes to Theory of Operation .................................................. 13
Changes to Ordering Guide .......................................................... 20
8/10—Rev. 0 to Rev. A
Added ADP162/ADP163.............................................. Throughout
Changes to Figure 17 and Figure 18............................................... 9
Changes to Figure 19, Figure 20, and Figure 23 ......................... 10
Added Figure 21 and Figure 22 (Renumbered Sequentially) ... 10
Added Figure 32 and Figure 33..................................................... 12
Changes to Ordering Guide .......................................................... 20
6/10—Revision 0: Initial Version
Rev. G | Page 2 of 24
Data Sheet
ADP160/ADP161/ADP162/ADP163
SPECIFICATIONS
VIN = (VOUT + 0.5 V) or 2.2 V, whichever is greater; EN = VIN, IOUT = 10 mA, CIN = COUT = 1 µF, TA = 25°C, unless otherwise noted.
Table 1.
Parameter
INPUT VOLTAGE RANGE
OPERATING SUPPLY CURRENT
SHUTDOWN CURRENT
Symbol
VIN
IGND
IGND-SD
Conditions
TJ = −40°C to +125°C
IOUT = 0 µA
IOUT = 0 µA, TJ = −40°C to +125°C
IOUT = 1 µA
IOUT = 1 µA, TJ = −40°C to +125°C
IOUT = 100 µA
IOUT = 100 µA, TJ = −40°C to +125°C
IOUT = 10 mA
IOUT = 10 mA, TJ = −40°C to +125°C
IOUT = 150 mA
IOUT = 150 mA, TJ = −40°C to +125°C
EN = GND
EN = GND, TJ = −40°C to +125°C
Min
2.2
IOUT = 10 mA
0 µA < IOUT < 150 mA, VIN = (VOUT + 0.5 V) to 5.5 V
0 µA < IOUT < 150 mA, VIN = (VOUT + 0.5 V) to 5.5 V,
TJ = −40°C to +125°C
IOUT = 10 mA
−1
−2
−3.5
Typ
560
860
2.6
Max
5.5
1250
2.3
1800
2.8
4.5
5.8
1
Unit
V
nA
µA
nA
µA
µA
µA
µA
µA
µA
µA
nA
µA
+1
+2
+3.5
%
%
%
1.01
V
1.02
1.03
V
V
+0.1
%/V
%/mA
%/mA
11
19
42
65
50
OUTPUT VOLTAGE ACCURACY
VOUT
ADJUSTABLE-OUTPUT VOLTAGE
ACCURACY (ADP161/ADP163) 1
REGULATION
Line Regulation
Load Regulation 2
DROPOUT VOLTAGE 3
4-Ball WLCSP
VADJ
∆VOUT/∆VIN
∆VOUT/∆IOUT
VDROPOUT
5-Lead TSOT
ADJ INPUT BIAS CURRENT (ADP161/ADP163)
ACTIVE PULL-DOWN RESISTANCE
(ADP160/ADP161)
START-UP TIME 4
CURRENT LIMIT THRESHOLD 5
THERMAL SHUTDOWN
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
EN INPUT
En Input Logic High
EN Input Logic Low
EN Input Leakage Current
ADJI-BIAS
TSHUTDOWN
0.99
0 µA < IOUT < 150 mA, VIN = (VOUT + 0.5 V) to 5.5 V
0 µA < IOUT < 150 mA, VIN = (VOUT + 0.5 V) to 5.5 V,
TJ = −40°C to +125°C
0.98
0.97
VIN = (VOUT + 0.5 V) to 5.5 V, TJ = −40°C to +125°C
IOUT = 100 μA to 150 mA
IOUT = 100 μA to 150 mA, TJ = −40°C to +125°C
VOUT = 3.3 V
IOUT = 10 mA
IOUT = 10 mA, TJ = −40°C to +125°C
IOUT = 150 mA
IOUT = 150 mA, TJ = −40°C to +125°C
IOUT = 10 mA
IOUT = 10 mA, TJ = −40°C to +125°C
IOUT = 150 mA
IOUT = 150 mA, TJ = −40°C to +125°C
2.2 V ≤ VIN ≤ 5.5 V, ADJ connected to VOUT
VOUT = 2.8 V, RLOAD = ∞
−0.1
TSTART-UP
ILIMIT
VOUT = 3.3 V
TSSD
TSSD-HYS
TJ rising
VIH
VIL
VI-LEAKAGE
2.2 V ≤ VIN ≤ 5.5 V
2.2 V ≤ VIN ≤ 5.5 V
EN = VIN or GND
EN = VIN or GND, TJ = −40°C to +125°C
0.004
0.01
7
10
300
600
mV
mV
mV
mV
mV
mV
mV
mV
nA
Ω
1100
320
500
µs
mA
13
105
195
8
15
120
225
220
Rev. G | Page 3 of 24
1.0
150
15
°C
°C
1.2
0.4
0.1
1
V
V
µA
µA
ADP160/ADP161/ADP162/ADP163
Parameter
UNDERVOLTAGE LOCKOUT
Input Voltage Rising
Input Voltage Falling
Hysteresis
OUTPUT NOISE
POWER SUPPLY REJECTION RATIO
Symbol
UVLO
UVLORISE
UVLOFALL
UVLOHYS
OUTNOISE
PSRR
Data Sheet
Conditions
Min
Typ
Max
Unit
2.19
V
V
mV
µV
rms
µV
rms
µV
rms
dB
dB
dB
dB
dB
dB
1.60
10 Hz to 100 kHz, VIN = 5 V, VOUT = 3.3 V
100
105
10 Hz to 100 kHz, VIN = 5 V, VOUT = 2.5 V
100
10 Hz to 100 kHz, VIN = 5 V, VOUT = 1.2 V
80
100 Hz, VIN = 5 V, VOUT = 3.3 V
100 Hz, VIN = 5 V, VOUT = 2.5 V
100 Hz, VIN = 5 V, VOUT = 1.2 V
1 kHz, VIN = 5 V, VOUT = 3.3 V
1 kHz, VIN = 5 V, VOUT = 2.5 V
1 kHz, VIN = 5 V, VOUT = 1.2 V
60
65
72
50
50
62
1
Accuracy when VOUT is connected directly to ADJ. When the VOUT voltage is set by external feedback resistors, the absolute accuracy in adjust mode depends on the
tolerances of resistors used.
Based on an end-point calculation using 0 μA and 150 mA loads.
3
Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output
voltages above 2.2 V.
4
Start-up time is defined as the time between the rising edge of EN to VOUT being at 90% of its nominal value.
5
Current limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 3.0 V
output voltage is defined as the current that causes the output voltage to drop to 90% of 3.0 V or 2.7 V.
2
INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS
Table 2.
Parameter
MINIMUM INPUT AND OUTPUT CAPACITANCE 1
CAPACITOR ESR
1
Symbol
CMIN
RESR
Conditions
TA = −40°C to +125°C
TA = −40°C to +125°C
Min
0.7
0.001
Typ
Max
0.2
Unit
µF
Ω
The minimum input and output capacitance should be greater than 0.7 µF over the full range of operating conditions. The full range of operating conditions in the
application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended;
however, Y5V and Z5U capacitors are not recommended for use with any LDO.
Rev. G | Page 4 of 24
Data Sheet
ADP160/ADP161/ADP162/ADP163
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
VIN to GND
VOUT to GND
EN to GND
ADJ to GND
NC to GND
Storage Temperature Range
Operating Junction Temperature Range
Operating Ambient Temperature Range
Soldering Conditions
Rating
−0.3 V to +6.5 V
−0.3 V to VIN
−0.3 V to VIN
−0.3 V to VIN
−0.3 V to VIN
−65°C to +150°C
−40°C to +125°C
−40°C to +125°C
JEDEC J-STD-020
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL DATA
Absolute maximum ratings only apply individually; they do not
apply in combination. The ADP16x can be damaged when the
junction temperature limits are exceeded. Monitoring ambient
temperature does not guarantee that TJ is within the specified
temperature limits. In applications with high power dissipation
and poor thermal resistance, the maximum ambient temperature
may have to be derated.
In applications with moderate power dissipation and low PCB
thermal resistance, the maximum ambient temperature can
exceed the maximum limit as long as the junction temperature
is within specification limits. The junction temperature (TJ) of
the device is dependent on the ambient temperature (TA), the
power dissipation of the device (PD), and the junction-to-ambient
thermal resistance of the package (θJA).
Maximum junction temperature (TJ) is calculated from the ambient
temperature (TA) and power dissipation (PD) using the formula
TJ = TA + (PD × θJA)
Junction-to-ambient thermal resistance (θJA) of the package is
based on modeling and calculation using a 4-layer board. The
junction-to-ambient thermal resistance is highly dependent on the
application and board layout. In applications where high maximum
power dissipation exists, close attention to thermal board design
is required. The value of θJA may vary, depending on PCB material,
layout, and environmental conditions. The specified values of
θJA are based on a 4-layer, 4 inches × 3 inches, circuit board. Refer
to JESD 51-7 and JESD 51-9 for detailed information on the
board construction. For additional information, see the AN-617
Application Note, MicroCSP™ Wafer Level Chip Scale Package.
ΨJB is the junction to board thermal characterization parameter
with units of °C/W. ΨJB of the package is based on modeling and
calculation using a 4-layer board. The JESD51-12, Guidelines for
Reporting and Using Electronic Package Thermal Information,
states that thermal characterization parameters are not the same
as thermal resistances. ΨJB measures the component power flowing
through multiple thermal paths rather than a single path as in
thermal resistance, θJB. Therefore, ΨJB thermal paths include
convection from the top of the package as well as radiation from
the package, factors that make ΨJB more useful in real-world
applications. Maximum junction temperature (TJ) is calculated
from the board temperature (TB) and power dissipation (PD)
using the formula
TJ = TB + (PD × ΨJB)
Refer to JESD51-8 and JESD51-12 for more detailed information
about ΨJB.
THERMAL RESISTANCE
θJA and ΨJB are specified for the worst-case conditions, that is, a
device soldered in a circuit board for surface-mount packages.
Table 4. Thermal Resistance
Package Type
5-Lead TSOT
4-Ball, 0.4 mm Pitch WLCSP
ESD CAUTION
Rev. G | Page 5 of 24
θJA
170
260
ΨJB
43
58
Unit
°C/W
°C/W
ADP160/ADP161/ADP162/ADP163
Data Sheet
VIN 1
ADP160/
ADP162
GND 2
TOP VIEW
(Not to Scale)
EN 3
5
VOUT
4
NC
NC = NO CONNECT
08628-004
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Figure 4. 5-Lead TSOT, Fixed Output Pin Configuration, ADP160/ADP162
Table 5. 5-Lead TSOT Pin Function Descriptions, ADP160/ADP162
Mnemonic
VIN
GND
EN
4
5
NC
VOUT
Description
Regulator Input Supply. Bypass VIN to GND with a 1 μF or greater capacitor.
Ground.
Enable Input. Drive EN high to turn on the regulator; drive EN low to turn off the regulator. For automatic startup,
connect EN to VIN.
No Connect. This pin is not connected internally. Connect this pin to GND or leave open.
Regulated Output Voltage. Bypass VOUT to GND with a 1 μF or greater capacitor.
VIN 1
ADP161/
ADP163
GND 2
TOP VIEW
(Not to Scale)
5 VOUT
4 ADJ
EN 3
08628-005
Pin No.
1
2
3
Figure 5. 5-Lead TSOT, Adjustable Output Pin Configuration, ADP161/ADP163
Table 6. 5-Lead TSOT Pin Function Descriptions, ADP161/ADP163
Pin No.
1
2
3
Mnemonic
VIN
GND
EN
4
ADJ
5
VOUT
Description
Regulator Input Supply. Bypass VIN to GND with a 1 μF or greater capacitor.
Ground.
Enable Input. Drive EN high to turn on the regulator; drive EN low to turn off the regulator. For automatic startup,
connect EN to VIN.
Output Voltage Adjust Pin. Connect the midpoint of the voltage divider between VOUT and GND to this pin to set
the output voltage.
Regulated Output Voltage. Bypass VOUT to GND with a 1 μF or greater capacitor.
Rev. G | Page 6 of 24
Data Sheet
ADP160/ADP161/ADP162/ADP163
A
1
2
VIN
VOUT
ADP160/
ADP162
EN
GND
TOP VIEW
(Not to Scale)
08628-006
B
Figure 6. 4-Ball WLCSP Pin Configuration, ADP160/ADP162
Table 7. 4-Ball WLCSP Pin Function Descriptions, ADP160/ADP162
Pin No.
A1
B1
Mnemonic
VIN
EN
A2
B2
VOUT
GND
Description
Regulator Input Supply. Bypass VIN to GND with a 1 μF or greater capacitor.
Enable Input. Drive EN high to turn on the regulator; drive EN low to turn off the regulator. For automatic
startup, connect EN to VIN.
Regulated Output Voltage. Bypass VOUT to GND with a 1 μF or greater capacitor.
Ground.
Rev. G | Page 7 of 24
ADP160/ADP161/ADP162/ADP163
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 3.8 V, VOUT = 3.3 V, IOUT = 1 mA, CIN = COUT = 1 µF, TA = 25°C, unless otherwise noted.
3.35
100
3.34
VOUT (V)
3.32
3.31
3.30
3.29
3.28
LOAD = 1µA
LOAD = 100µA
LOAD = 1mA
LOAD = 10mA
LOAD = 100mA
LOAD = 150mA
3.26
3.25
–40
–5
25
85
125
JUNCTION TEMPERATURE (°C)
1
LOAD = 10mA
LOAD = 100mA
LOAD = 150mA
NO LOAD
LOAD = 1µA
LOAD = 100µA
LOAD = 1mA
0.1
08628-007
3.27
10
–40
–5
25
85
08628-010
GROUND CURRENT (µA)
3.33
125
JUNCTION TEMPERATURE (°C)
Figure 7. Output Voltage (VOUT) vs. Junction Temperature
Figure 10. Ground Current vs. Junction Temperature
100
3.35
3.34
GROUND CURRENT (µA)
3.33
VOUT (V)
3.32
3.31
3.30
3.29
3.28
10
1
3.27
1
0.1
0.01
10
100
1000
ILOAD (mA)
0.1
0.001
08628-008
3.25
0.001
0.01
0.1
10
1
1000
100
ILOAD (mA)
08628-011
3.26
Figure 11. Ground Current vs. Load Current (ILOAD)
Figure 8. Output Voltage (VOUT) vs. Load Current (ILOAD)
3.35
100
3.34
3.31
3.30
3.29
3.28
LOAD = 1µA
LOAD = 100µA
LOAD = 1mA
LOAD = 10mA
LOAD = 100mA
LOAD = 150mA
3.27
3.26
3.25
3.7
3.9
4.1
4.3
4.5
4.7
4.9
5.1
5.3
VIN (V)
5.5
08628-009
VOUT (V)
3.32
Figure 9. Output Voltage (VOUT) vs. Input Voltage (VIN)
10
1
0.1
3.7
LOAD = 10mA
LOAD = 100mA
LOAD = 150mA
NO LOAD
LOAD = 1µA
LOAD = 100µA
LOAD = 1mA
3.9
4.1
4.3
4.5
4.7
4.9
5.1
5.3
VIN (V)
Figure 12. Ground Current vs. Input Voltage (VIN)
Rev. G | Page 8 of 24
5.5
08628-012
GROUND CURRENT (µA)
3.33
Data Sheet
0.14
120
GROUND CURRENT (µA)
0.16
SHUTDOWN CURRENT (µA)
140
VIN = 2.9V
VIN = 3.2V
VIN = 3.8V
VIN = 4.1V
VIN = 4.7V
VIN = 5.5V
0.12
0.10
0.08
0.06
80
60
40
0.04
20
0.02
–40
–5
25
85
0
3.1
08628-013
0
125
TEMPERATURE (°C)
LOAD = 1mA
LOAD = 5mA
LOAD = 10mA
LOAD = 50mA
LOAD = 100mA
LOAD = 150mA
3.2
3.3
3.4
3.5
3.6
VIN (V)
Figure 16. Ground Current vs. Input Voltage (VIN) in Dropout
Figure 13. Shutdown Current vs. Temperature at Various Input Voltages
0
250
VOUT = 2V
–10
–20
200
DROPOUT VOLTAGE (mV)
100
08628-016
0.18
ADP160/ADP161/ADP162/ADP163
LOAD = 150mA
LOAD = 100mA
LOAD = 10mA
LOAD = 1mA
LOAD = 100µA
–30
PSRR (dB)
150
100
–40
–50
–60
–70
VOUT = 3.3V
–80
50
1
10
100
1000
ILOAD (mA)
–100
10
08628-014
0
10k
100k
1M
10M
FREQUENCY (Hz)
0
3.35
–10
3.30
–20
3.25
LOAD = 150mA
LOAD = 100mA
LOAD = 10mA
LOAD = 1mA
LOAD = 100µA
PSRR (dB)
–30
3.20
3.15
LOAD = 1mA
LOAD = 5mA
LOAD = 10mA
LOAD = 50mA
LOAD = 100mA
LOAD = 250mA
3.05
3.2
3.3
3.4
3.5
–40
–50
–60
–70
–80
–90
3.6
VIN (V)
Figure 15. Output Voltage (VOUT) vs. Input Voltage (VIN) in Dropout
–100
10
100
1k
10k
100k
FREQUENCY (Hz)
1M
10M
08628-018
3.10
08628-015
VOUT (V)
1k
Figure 17. Power Supply Rejection Ratio vs. Frequency, VOUT = 1.2 V, VIN = 2.2 V
Figure 14. Dropout Voltage vs. Load Current (ILOAD)
3.00
3.1
100
08628-017
–90
Figure 18. Power Supply Rejection Ratio vs. Frequency, VOUT = 2.5 V, VIN = 3.5 V
Rev. G | Page 9 of 24
ADP160/ADP161/ADP162/ADP163
Data Sheet
0
0
–10
–20
LOAD = 150mA
LOAD = 100mA
LOAD = 10mA
LOAD = 1mA
LOAD = 100µA
–10
–20
–30
PSRR (dB)
–40
–50
–40
–50
–60
–60
–80
–80
–90
–90
1k
10k
100k
1M
10M
FREQUENCY (Hz)
0
–20
0
LOAD = 3.3V/150mA
LOAD = 2.5V/150mA
LOAD = 1.2V/150mA
LOAD = 3.3V/1mA
LOAD = 2.5V/1mA
LOAD = 1.2V/1mA
–10
–20
PSRR (dB)
–50
–60
–80
–90
–90
–100
10
–100
10
10k
100k
1M
10M
FREQUENCY (Hz)
Figure 20. Power Supply Rejection Ratio vs. Frequency
Various Output Voltages and Load Currents, VIN − VOUT = 1 V
1k
10k
100k
1M
10M
Figure 23. Adjustable ADP161 Power Supply Rejection Ratio vs. Frequency,
VOUT = 3.3 V, VIN = 4.3 V
1k
–10
–20
NOISE (µV rms)
–30
–40
–50
–60
–70
VOUT = 3.3V
VOUT = 2.5V
VOUT = 1.2V
ADJ 3.3V
100
10
LOAD = 150mA
LOAD = 100mA
LOAD = 10mA
LOAD = 1mA
LOAD = 100µA
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
08628-051
PSRR (dB)
100
FREQUENCY (Hz)
0
–90
LOAD = 150mA
LOAD = 100mA
LOAD = 10mA
LOAD = 1mA
LOAD = 100µA
–60
–70
–100
10
10M
–50
–80
–80
1M
–40
–70
1k
100k
–30
–40
100
10k
Figure 22. Power Supply Rejection Ratio vs. Frequency
Various Output Voltages and Load Currents, VOUT = 3.3 V, VIN = 3.8 V
08628-020
PSRR (dB)
–30
1k
FREQUENCY (Hz)
Figure 19. Power Supply Rejection Ratio vs. Frequency, VOUT = 3.3 V, VIN = 4.3 V
–10
100
08628-021
100
08628-019
–100
10
–100
10
LOAD = 150mA
LOAD = 100mA
LOAD = 10mA
LOAD = 1mA
LOAD = 100µA
08628-052
–70
–70
Figure 21. Power Supply Rejection Ratio vs. Frequency
Various Output Voltages and Load Currents, VOUT = 2.5 V, VIN = 3.0 V
1
0.001
0.01
0.1
1
10
100
1000
LOAD CURRENT (mA)
Figure 24. Output Noise vs. Load Current and Output Voltage,
VIN = 5 V, COUT = 1 µF
Rev. G | Page 10 of 24
08628-022
PSRR (dB)
–30
Data Sheet
ADP160/ADP161/ADP162/ADP163
T
10
VOUT = 1.2V
VOUT = 3.3V
VOUT = 2.5V
NOISE (µV/ Hz)
VIN
1
VOUT
2
100
1k
10k
100k
FREQUENCY (Hz)
CH1 1V Ω
08628-023
0.1
10
Figure 25. Output Noise Spectral Density, VIN = 5 V, ILOAD = 10 mA, COUT = 1 µF
CH2 20mV
M200µs
T 10.20%
A CH1
4.34V
08628-026
1
Figure 28. Line Transient Response, VIN = 4 V to 5 V, CIN = COUT = 1 μF,
ILOAD = 150 mA, CH1 = VIN, CH2 = VOUT
T
T
LOAD CURRENT
VIN
1
2
VOUT
VOUT
2
M200µs
T 10.40%
A CH1
62mA
CH1 1V Ω
Figure 26. Load Transient Response, CIN, COUT = 1 µF, ILOAD = 1 mA to 150 mA,
200 ns Rise Time, CH1 = Load Current, CH2 = VOUT
T
1
CH2 5mV
M200µs
T 10.40%
A CH1
24mA
08628-025
VOUT
CH1 20mA Ω
M200µs
T 10.20%
A CH1
4.56V
Figure 29. Line Transient Response, VIN = 4 V to 5 V, CIN, = 1 μF, COUT = 10 μF,
ILOAD = 150 mA, CH1 = VIN, CH2 = VOUT
LOAD CURRENT
2
CH2 20mV
08628-027
CH1 100mA Ω CH2 200mV
08628-024
1
Figure 27. Load Transient Response, CIN, COUT = 1 μF, ILOAD = 1 mA to 50 mA,
200 ns Rise Time, CH1 = Load Current, CH2 = VOUT
Rev. G | Page 11 of 24
ADP160/ADP161/ADP162/ADP163
Data Sheet
THEORY OF OPERATION
Using new innovative design techniques, the ADP16x provide
ultralow quiescent current and superior transient performance
for digital and RF applications. The ADP16x are also optimized
for use with small 1 µF ceramic capacitors.
VIN
VOUT
SHORT CIRCUIT,
UVLO, AND
THERMAL
PROTECT
GND
EN
SHUTDOWN
R2
08628-028
REFERENCE
R3
R1
ADP160
Figure 30. Internal Block Diagram, Fixed Output with Output Discharge Function
VIN
VOUT
SHORT CIRCUIT,
UVLO, AND
THERMAL
PROTECT
GND
EN
R1
ADJ
SHUTDOWN
08628-030
REFERENCE
ADP161
Figure 31. Internal Block Diagram, Adjustable Output with Output Discharge
Function
VIN
SHORT CIRCUIT,
UVLO, AND
THERMAL
PROTECT
R1
SHUTDOWN
REFERENCE
SHORT CIRCUIT,
UVLO, AND
THERMAL
PROTECT
GND
EN
ADJ
SHUTDOWN
REFERENCE
ADP163
Figure 33. Internal Block Diagram, Adjustable Output without Output
Discharge Function
Internally, the ADP16x consists of a reference, an error amplifier, a
feedback voltage divider, and a PMOS pass transistor. Output
current is delivered via the PMOS pass device, which is controlled
by the error amplifier. The error amplifier compares the reference
voltage with the feedback voltage from the output and amplifies
the difference. If the feedback voltage is lower than the reference
voltage, the gate of the PMOS device is pulled lower, allowing
more current to pass and increasing the output voltage. If the
feedback voltage is higher than the reference voltage, the gate
of the PMOS device is pulled higher, allowing less current to pass
and decreasing the output voltage.
The adjustable ADP161/ADP163 have an output voltage range
of 1.0 V to 4.2 V. The output voltage is set by the ratio of two
external resistors, as shown in Figure 2. The device servos the
output to maintain the voltage at the ADJ pin at 1.0 V referenced to ground. The current in R1 is then equal to 1.0 V/R2,
and the current in R1 is the current in R2 plus the ADJ pin bias
current. The ADJ pin bias current, 10 nA at 25°C, flows through
R1 into the ADJ pin.
The output voltage can be calculated using the equation:
VOUT = 1.0 V(1 + R1/R2) + (ADJI-BIAS)(R1)
R2
08628-053
EN
VOUT
The value of R1 should be less than 200 kΩ to minimize errors in
the output voltage caused by the ADJ pin bias current. For example,
when R1 and R2 each equal 200 kΩ, the output voltage is 2.0 V.
The output voltage error introduced by the ADJ pin bias current
is 2 mV or 0.05%, assuming a typical ADJ pin bias current of
10 nA at 25°C.
VOUT
GND
VIN
08628-054
The ADP16x are ultralow quiescent current, low dropout linear
regulators that operate from 2.2 V to 5.5 V and can provide up to
150 mA of output current. Drawing only 560 nA (typical) at no
load and a low 42 µA of quiescent current (typical) at full load
makes the ADP16x ideal for battery-operated portable equipment. Shutdown current consumption is typically 50 nA.
ADP162
Figure 32. Internal Block Diagram, Fixed Output without Output Discharge
Function
Rev. G | Page 12 of 24
Data Sheet
ADP160/ADP161/ADP162/ADP163
To minimize quiescent current in the ADP161 and ADP163
Analog Devices, Inc., recommends using high values of
resistance for R1 and R2. Using a value of 1 MΩ for R2 keeps
the total, no load quiescent current below 2 µA. Note however,
that high value of resistance introduces a small output voltage
error. For example, assuming R1 and R2 are 1 MΩ, the output
voltage is 2 V. Taking into account the nominal ADJ pin bias
current of 10 nA, the output voltage error is 0.25%.
Note that in shutdown, the output is turned off and the divider
current is zero.
The ADP160/ADP161 also include an output discharge resistor to
force the output voltage to zero when the LDO is disabled. This
ensures that the output of the LDO is always in a well-defined state,
whether it is enabled or not. The ADP162/ADP163 do not
include the output discharge function.
The ADP160/ADP162 are available in 15 output voltage options,
ranging from 1.2 V to 4.2 V. The ADP16x use the EN pin to enable
and disable the VOUT pin under normal operating conditions.
When EN is high, VOUT turns on, and when EN is low, VOUT
turns off. For automatic startup, EN can be tied to VIN.
Rev. G | Page 13 of 24
ADP160/ADP161/ADP162/ADP163
Data Sheet
APPLICATIONS INFORMATION
Input and Output Capacitor Properties
CAPACITOR SELECTION
Output Capacitor
The ADP16x are designed for operation with small, spacesaving ceramic capacitors, but function with most commonly
used capacitors as long as care is taken with regard to the
effective series resistance (ESR) value. The ESR of the output
capacitor affects stability of the LDO control loop. A minimum
of 1 µF capacitance with an ESR of 1 Ω or less is recommended
to ensure stability of the ADP16x. Transient response to
changes in load current is also affected by output capacitance.
Using a larger value of output capacitance improves the transient
response of the ADP16x to large changes in load current. Figure 34
and Figure 35 show the transient responses for output
capacitance values of 1 µF and 10 µF, respectively.
T
LOAD CURRENT
1
Any good quality ceramic capacitors can be used with the
ADP16x, as long as they meet the minimum capacitance and
maximum ESR requirements. Ceramic capacitors are manufactured
with a variety of dielectrics, each with different behavior over
temperature and applied voltage. Capacitors must have a dielectric
adequate to ensure the minimum capacitance over the necessary
temperature range and dc bias conditions. X5R or X7R dielectrics
with a voltage rating of 6.3 V or 10 V are recommended. Y5V
and Z5U dielectrics are not recommended due to their poor
temperature and dc bias characteristics.
Figure 36 depicts the capacitance vs. voltage bias characteristic
of a 0402, 1 µF, 10 V, X5R capacitor. The voltage stability of a
capacitor is strongly influenced by the capacitor size and voltage
rating. In general, a capacitor in a larger package or higher voltage
rating exhibits better stability. The temperature variation of the X5R
dielectric is about ±15% over the −40°C to +85°C temperature
range and is not a function of package or voltage rating.
1.2
1.0
CAPACITANCE (µF)
2
M200µs
T 10.40%
A CH1
62mA
Figure 34. Output Transient Response, COUT = 1 µF,
CH1 = Load Current, CH2 = VOUT
0.8
0.6
0.4
0.2
0
T
0
LOAD CURRENT
2
4
6
8
VOLTAGE
10
08628-034
CH1 100mA Ω CH2 200mV
08628-032
VOUT
Figure 36. Capacitance vs. Voltage Characteristic
1
Use Equation 1 to determine the worst-case capacitance accounting
for capacitor variation over temperature, component tolerance,
and voltage.
CEFF = CBIAS × (1 − TEMPCO) × (1 − TOL)
(1)
where:
CBIAS is the effective capacitance at the operating voltage.
TEMPCO is the worst-case capacitor temperature coefficient.
TOL is the worst-case component tolerance.
2
VOUT
M200µs
T 10.00%
A CH1
74mA
In this example, the worst-case temperature coefficient (TEMPCO)
over −40°C to +85°C is assumed to be 15% for an X5R dielectric.
The tolerance of the capacitor (TOL) is assumed to be 10%, and
CBIAS is 0.94 µF at 1.8 V, as shown in Figure 36.
08628-033
CH1 100mA Ω CH2 200mV
Figure 35. Output Transient Response, COUT = 10 µF,
CH1 = Load Current, CH2 = VOUT
Input Bypass Capacitor
Connecting a 1 µF capacitor from VIN to GND reduces the circuit
sensitivity to the printed circuit board (PCB) layout, especially
when long input traces or high source impedance are encountered.
If greater than 1 µF of output capacitance is required, the input
capacitor should be increased to match it.
Substituting these values in Equation 1 yields
CEFF = 0.94 μF × (1 − 0.15) × (1 − 0.1) = 0.719 µF
Therefore, the capacitor chosen in this example meets
the minimum capacitance requirement of the LDO over
temperature and tolerance at the chosen output voltage.
Rev. G | Page 14 of 24
Data Sheet
ADP160/ADP161/ADP162/ADP163
To guarantee the performance of the ADP16x, it is imperative
that the effects of dc bias, temperature, and tolerances on the
behavior of the capacitors are evaluated for each.
The start-up behavior of the ADP16x is shown in Figure 39.
The shutdown behavior of the ADP160/ADP161 is shown in
Figure 40.
ENABLE FEATURE
3.5
4.5
4.0
3.3V
3.0
EN VOLTAGE/VOUT (V)
The ADP16x use the EN pin to enable and disable the VOUT
pin under normal operating conditions. As shown in Figure 37,
when a rising voltage on EN crosses the active threshold, VOUT
turns on. When a falling voltage on EN crosses the inactive
threshold, VOUT turns off.
2.5
2.5V
2.0
EN
1.5
1.2V
1.0
0.5
2.5
0
0
1000
1500
2000
2500
3000
3500
4000
4500
TIME (µs)
Figure 39. Typical Start-Up Behavior (ADP16x)
1.5
4.5
1.0
4.0
0.5
COUT = 1µF
0.9
1.1
1.3
1.5
EN VOLTAGE (V)
Figure 37. Typical EN Pin Operation
As shown in Figure 37, the EN pin has hysteresis built in. This
prevents on/off oscillations that can occur due to noise on the
EN pin as it passes through the threshold points.
EN VOLTAGE/VOUT (V)
3.5
0.7
08628-035
0
0.5
3.0
2.5
4.2V
EN
2.0
1.5
1.0
The EN pin active/inactive thresholds are derived from the VIN
voltage. Therefore, these thresholds vary with changing input
voltage. Figure 38 shows typical EN active/inactive thresholds
when the input voltage varies from 2.2 V to 5.5 V.
1.2V
0.5
0
0
200
400
600
800
1000
TIME (µs)
Figure 40. Typical Shutdown Behavior, No Load (ADP160/ADP161)
1.1
CURRENT LIMIT AND THERMAL OVERLOAD
PROTECTION
1.0
The ADP16x are protected against damage due to excessive
power dissipation by current and thermal overload protection
circuits. The ADP16x are designed to current limit when the
output load reaches 320 mA (typical). When the output load
exceeds 320 mA, the output voltage is reduced to maintain a
constant current limit.
0.9
EN RISE
0.8
EN FALL
0.7
0.6
0.5
2.0
2.5
3.0
3.5
4.0
4.5
INPUT VOLTAGE (V)
Figure 38. Typical EN Pin Thresholds vs. Input Voltage
5.0
08628-036
EN VOLTAGE (V)
500
2.0
08628-037
3.0
08628-038
VOUT (V)
3.5
Thermal overload protection is included, which limits the junction
temperature to a maximum of 150°C (typical). Under extreme
conditions (that is, high ambient temperature and power dissipation),
when the junction temperature starts to rise above 150°C, the
output is turned off, reducing the output current to zero. When
the junction temperature drops below 135°C, the output is turned
on again and the output current is restored to its nominal value.
Rev. G | Page 15 of 24
ADP160/ADP161/ADP162/ADP163
Data Sheet
THERMAL CONSIDERATIONS
In most applications, the ADP16x do not dissipate much heat due
to their high efficiency. However, in applications with high ambient
temperature and high supply voltage to output voltage differential,
the heat dissipated in the package is large enough that it can cause
the junction temperature of the die to exceed the maximum
junction temperature of 125°C.
When the junction temperature exceeds 150°C, the converter enters
thermal shutdown. It recovers only after the junction temperature
has decreased below 135°C to prevent any permanent damage.
Therefore, thermal analysis for the chosen application is very
important to guarantee reliable performance over all conditions.
The junction temperature of the die is the sum of the ambient
temperature of the environment and the temperature rise of the
package due to the power dissipation, as shown in Equation 2.
To guarantee reliable operation, the junction temperature of
the ADP16x must not exceed 125°C. To ensure the junction
temperature stays below this maximum value, the user needs to
be aware of the parameters that contribute to junction temperature
changes. These parameters include ambient temperature, power
dissipation in the power device, and thermal resistances between
the junction and ambient air (θJA). The θJA number is dependent
on the package assembly compounds that are used and the amount
of copper used to solder the package GND pins to the PCB.
Table 8 shows the typical θJA values of the 5-lead TSOT and the
4-ball WLCSP for various PCB copper sizes. Table 9 shows the
typical ΨJB value of the 5-lead TSOT and 4-ball WLCSP.
Table 8. Typical θJA Values
Copper Size (mm2)
01
50
100
300
500
1
TSOT
170
152
146
134
131
θJA (°C/W)
WLCSP
260
159
157
153
151
ΨJB (°C/W)
WLCSP
58.4
TSOT
42.8
The junction temperature of the ADP16x can be calculated
from the following equation:
TJ = TA + (PD × θJA)
(2)
where:
TA is the ambient temperature.
PD is the power dissipation in the die, given by
PD = [(VIN − VOUT) × ILOAD] + (VIN × IGND)
(3)
where:
ILOAD is the load current.
IGND is the ground current.
VIN and VOUT are input and output voltages, respectively.
Power dissipation due to ground current is quite small and can be
ignored. Therefore, the junction temperature equation simplifies to
the following:
TJ = TA + {[(VIN − VOUT) × ILOAD] × θJA}
(4)
As shown in Equation 4, for a given ambient temperature, inputto-output voltage differential, and continuous load current, there
exists a minimum copper size requirement for the PCB to ensure
the junction temperature does not rise above 125°C. Figure 41 to
Figure 48 show the junction temperature calculations for the
different ambient temperatures, load currents, VIN-to-VOUT
differentials, and areas of PCB copper.
In the case where the board temperature is known, use the
thermal characterization parameter, ΨJB, to estimate the junction
temperature rise (see Figure 49 and Figure 50). Maximum
junction temperature (TJ) is calculated from the board
temperature (TB) and power dissipation (PD) using the
following formula:
TJ = TB + (PD × ΨJB)
(5)
The typical value of ΨJB is 58°C/W for the 4-ball WLCSP package
and 43°C/W for the 5-lead TSOT package.
140
MAXIMUM JUNCTION TEMPERATURE
120
100
80
60
40
20
0
0.3
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 50mA
0.8
1.3
1.8
ILOAD = 100mA
ILOAD = 150mA
ILOAD = 200mA
2.3
2.8
3.3
VIN – VOUT (V)
3.8
4.3
Figure 41. 500 mm2 of PCB Copper, WLCSP, TA = 25°C
Device soldered to minimum size pin traces.
Rev. G | Page 16 of 24
4.8
08628-039
Current and thermal limit protections are intended to protect
the device against accidental overload conditions. For reliable
operation, device power dissipation must be externally limited
so junction temperatures do not exceed 125°C.
Table 9. Typical ΨJB Values
JUNCTION TEMPERATURE, TJ (°C)
Consider the case where a hard short from OUT to ground
occurs. At first, the ADP16x current limit so that only 320 mA
is conducted into the short. If self-heating of the junction is
great enough to cause its temperature to rise above 150°C,
thermal shutdown activates, turning off the output and
reducing the output current to zero. As the junction temperature cools and drops below 135°C, the output turns on and
conducts 320 mA into the short, again causing the junction
temperature to rise above 150°C. This thermal oscillation
between 135°C and 150°C causes a current oscillation between
320 mA and 0 mA that continues as long as the short remains
at the output.
Data Sheet
ADP160/ADP161/ADP162/ADP163
140
140
MAXIMUM JUNCTION TEMPERATURE
100
80
60
40
20
0
0.3
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 50mA
0.8
1.3
1.8
ILOAD = 100mA
ILOAD = 150mA
ILOAD = 200mA
2.3
2.8
3.3
VIN – VOUT (V)
3.8
4.3
4.8
120
100
80
60
40
20
0
0.3
Figure 42. 100 mm2 of PCB Copper, WLCSP, TA = 50°C
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 50mA
0.8
2.3
2.8
3.3
VIN – VOUT (V)
3.8
4.3
4.8
140
MAXIMUM JUNCTION TEMPERATURE
MAXIMUM JUNCTION TEMPERATURE
100
80
60
40
20
0
0.3
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 50mA
0.8
1.3
1.8
ILOAD = 100mA
ILOAD = 150mA
ILOAD = 200mA
2.3
2.8
3.3
VIN – VOUT (V)
3.8
4.3
4.8
120
100
80
60
40
20
0
0.3
Figure 43. 500 mm2 of PCB Copper, WLCSP, TA = 85°C
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 50mA
0.8
1.3
1.8
ILOAD = 100mA
ILOAD = 150mA
ILOAD = 200mA
2.3
2.8
3.3
VIN – VOUT (V)
3.8
4.3
4.8
08628-044
JUNCTION TEMPERATURE, TJ (°C)
120
08628-041
Figure 46. 100 mm2 of PCB Copper, TSOT, TA = 25°C
140
140
MAXIMUM JUNCTION TEMPERATURE
MAXIMUM JUNCTION TEMPERATURE
JUNCTION TEMPERATURE, TJ (°C)
120
100
80
60
40
0
0.3
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 50mA
0.8
1.3
1.8
ILOAD = 100mA
ILOAD = 150mA
ILOAD = 200mA
2.3
2.8
3.3
VIN – VOUT (V)
3.8
4.3
4.8
100
80
60
40
20
0
0.3
08628-042
20
120
Figure 44. 100 mm2 of PCB Copper, WLCSP, TA = 50°C
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 50mA
0.8
1.3
1.8
ILOAD = 100mA
ILOAD = 150mA
ILOAD = 200mA
2.3
2.8
3.3
VIN – VOUT (V)
3.8
4.3
Figure 47. 500 mm2 of PCB Copper, TSOT, TA = 50°C
Rev. G | Page 17 of 24
4.8
08628-045
JUNCTION TEMPERATURE, TJ (°C)
1.8
Figure 45. 500 mm2 of PCB Copper, TSOT, TA = 25°C
140
JUNCTION TEMPERATURE, TJ (°C)
1.3
ILOAD = 100mA
ILOAD = 150mA
ILOAD = 200mA
08628-043
JUNCTION TEMPERATURE, TJ (°C)
120
08628-040
JUNCTION TEMPERATURE, TJ (°C)
MAXIMUM JUNCTION TEMPERATURE
ADP160/ADP161/ADP162/ADP163
Data Sheet
Place the input capacitor as close as possible to the VIN and
GND pins. Place the output capacitor as close as possible to the
VOUT and GND pins. Use of 0402 or 0603 size capacitors and
resistors achieves the smallest possible footprint solution on
boards where area is limited.
140
120
100
80
LIGHT SENSITIVITY OF WLCSPs
60
The WLCSP package option is essentially a silicon die with
additional post fabrication dielectric and metal processing
designed to contact solder bumps on the active side of the chip.
With this package type, the die is exposed to ambient light and
is subject to photoelectric effects. Light sensitivity analysis of
a WLCSP mounted on standard PCB material reveals that
performance may be impacted when the package is illuminated
directly by high intensity light. No degradation in electrical
performance is observed due to illumination by low intensity
(0.1 mW/cm2) ambient light. Direct sunlight can have intensities of 50 mW/cm2, office ambient light can be as low as
0.1 mW/cm2.
40
20
0
0.3
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 50mA
0.8
1.3
1.8
ILOAD = 100mA
ILOAD = 150mA
ILOAD = 200mA
2.3
2.8
3.3
VIN – VOUT (V)
3.8
4.3
4.8
08628-046
JUNCTION TEMPERATURE, TJ (°C)
MAXIMUM JUNCTION TEMPERATURE
Figure 48. 100 mm2 of PCB Copper, TSOT, TA = 50°C
140
100
When the WLCSP is assembled on the board with the bump
side of the die facing the PCB, reflected light from the PCB
surface is incident on active silicon circuit areas and results
in the increased leakage currents. No performance degradation occurs due to illumination of the backside (substrate) of
the WLCSP.
80
60
40
20
0
0.3
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 50mA
0.8
1.3
1.8
All WLCSPs are particularly sensitive to incident light with
wavelengths in the near infrared range (NIR, 700 nm to 1000 nm).
Photons in this waveband have a longer wavelength and lower
energy than photons in the visible (400 nm to 700 nm) and near
ultraviolet (NUV, 200 nm to 400 nm) bands; therefore, they can
penetrate more deeply into the active silicon.
ILOAD = 100mA
ILOAD = 150mA
ILOAD = 200mA
2.3
2.8
3.3
VIN – VOUT (V)
3.8
4.3
4.8
08628-047
JUNCTION TEMPERATURE, TJ (°C)
MAXIMUM JUNCTION TEMPERATURE
120
Figure 49. WLCSP, TA = 85°C
140
Incident light with wavelengths greater than 1100 nm has
no photoelectric effect on silicon devices because silicon is
transparent to wavelengths in this range.
100
The spectral content of conventional light sources varies
considerably. Sunlight has a broad spectral range, with peak
intensity in the visible band that falls off in the NUV and NIR
bands; fluorescent lamps have significant peaks in the visible
but not the NUV or NIR bands. Tungsten lighting has a broad
peak in the longer visible wavelengths with a significant tail in
the NIR.
80
60
40
20
0
0.3
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 50mA
0.8
1.3
1.8
ILOAD = 100mA
ILOAD = 150mA
ILOAD = 200mA
2.3
2.8
3.3
VIN – VOUT (V)
3.8
4.3
4.8
08628-048
JUNCTION TEMPERATURE, TJ (°C)
MAXIMUM JUNCTION TEMPERATURE
120
Figure 50. TSOT, TA = 85°C
PCB LAYOUT CONSIDERATIONS
Heat dissipation from the package can be improved by increasing
the amount of copper attached to the pins of the ADP16x. However,
as listed in Table 8, a point of diminishing returns is reached
eventually, beyond which an increase in the copper size does
not yield significant heat dissipation benefits.
Efforts have been made at a product level to reduce the effect of
ambient light; the under bump metal (UBM) has been designed
to shield the sensitive circuit areas on the active side (bump
side) of the die. However, if an application encounters any light
sensitivity with the WLCSP, shielding the bump side of the
WLCSP package with opaque material should eliminate this
effect. Shielding can be accomplished using materials such as
silica-filled liquid epoxies like those used in flip-chip underfill
techniques.
Rev. G | Page 18 of 24
ADP160/ADP161/ADP162/ADP163
08628-049
Data Sheet
08628-050
Figure 51. Example of 5-Lead TSOT PCB Layout
Figure 52. Example of 4-Ball WLCSP PCB Layout
Rev. G | Page 19 of 24
ADP160/ADP161/ADP162/ADP163
Data Sheet
OUTLINE DIMENSIONS
2.90 BSC
5
4
2.80 BSC
1.60 BSC
1
2
3
0.95 BSC
1.90
BSC
*1.00 MAX
0.10 MAX
0.50
0.30
0.20
0.08
8°
4°
0°
SEATING
PLANE
0.60
0.45
0.30
100708-A
*0.90 MAX
0.70 MIN
*COMPLIANT TO JEDEC STANDARDS MO-193-AB WITH
THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS.
Figure 53. 5-Lead Thin Small Outline Transistor Package [TSOT]
(UJ-5)
Dimensions shown in millimeters
1.000
0.965 SQ
0.925
2
1
A
BALL A1
IDENTIFIER
B
0.50
REF
0.640
0.595
0.550
TOP VIEW
BOTTOM VIEW
(BALL SIDE DOWN)
(BALL SIDE UP)
END VIEW
0.370
0.355
0.340
SEATING
PLANE
0.340
0.320
0.300
0.270
0.240
0.210
Figure 54. 4-Ball Wafer Level Chip Scale Package [WLCSP]
(CB-4-1)
Dimensions shown in millimeters
Rev. G | Page 20 of 24
04-17-2012-A
COPLANARITY
0.03
Data Sheet
ADP160/ADP161/ADP162/ADP163
ORDERING GUIDE
Model 1
ADP160ACBZ-1.2-R7
ADP160ACBZ-1.5-R7
ADP160ACBZ-1.8-R7
ADP160ACBZ-2.1-R7
ADP160ACBZ-2.3-R7
ADP160ACBZ-2.5-R7
ADP160ACBZ-2.7-R7
ADP160ACBZ-2.75-R7
ADP160ACBZ-2.8-R7
ADP160ACBZ-2.85-R7
ADP160ACBZ-3.0-R7
ADP160ACBZ-3.3-R7
ADP160ACBZ-4.2-R7
ADP160AUJZ-1.2-R7
ADP160AUJZ-1.5-R7
ADP160AUJZ-1.8-R7
ADP160AUJZ-2.3-R7
ADP160AUJZ-2.5-R7
ADP160AUJZ-2.7-R7
ADP160AUJZ-2.8-R7
ADP160AUJZ-3.0-R7
ADP160AUJZ-3.3-R7
ADP160AUJZ-4.2-R7
ADP161AUJZ-R7
ADP162ACBZ-1.2-R7
ADP162ACBZ-1.8-R7
ADP162ACBZ-2.1-R7
ADP162ACBZ-2.3-R7
ADP162ACBZ-2.8-R7
ADP162ACBZ-3.0-R7
ADP162ACBZ-4.2-R7
ADP162AUJZ-1.5-R7
ADP162AUJZ-1.8-R7
ADP162AUJZ-2.3-R7
ADP162AUJZ-2.5-R7
ADP162AUJZ-2.7-R7
ADP162AUJZ-2.8-R7
ADP162AUJZ-3.0-R7
ADP162AUJZ-3.3-R7
ADP162AUJZ-4.2-R7
ADP163AUJZ-R7
ADP160UJZ-REDYKIT
ADP162UJZ-REDYKIT
ADP161UJ-EVALZ
ADP163UJ-EVALZ
1
Temperature Range
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
Output Voltage (V)
1.2
1.5
1.8
2.1
2.3
2.5
2.7
2.75
2.8
2.85
3.0
3.3
4.2
1.2
1.5
1.8
2.3
2.5
2.7
2.8
3.0
3.3
4.2
Adjustable
1.2
1.8
2.1
2.3
2.8
3.0
4.2
1.5
1.8
2.3
2.5
2.7
2.8
3.0
3.3
4.2
Adjustable
Package Description
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
Evaluation Board Kit
Evaluation Board Kit
Evaluation Board
Evaluation Board
Z = RoHS Compliant Part.
Rev. G | Page 21 of 24
Package Option
CB-4-1
CB-4-1
CB-4-1
CB-4-1
CB-4-1
CB-4-1
CB-4-1
CB-4-1
CB-4-1
CB-4-1
CB-4-1
CB-4-1
CB-4-1
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
CB-4-1
CB-4-1
CB-4-1
CB-4-1
CB-4-1
CB-4-1
CB-4-1
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
Branding
5K
5L
5N
5P
AH
5Q
AM
5R
5S
5T
5U
5V
6U
LDQ
LDR
LE0
LLP
LFZ
LJF
LG0
Y2U
LG1
LGY
LHW
70
71
72
BC
73
74
75
LH9
LLN
LLQ
LHB
LJK
LHC
LHD
LHE
LHF
LHG
ADP160/ADP161/ADP162/ADP163
Data Sheet
NOTES
Rev. G | Page 22 of 24
Data Sheet
ADP160/ADP161/ADP162/ADP163
NOTES
Rev. G | Page 23 of 24
ADP160/ADP161/ADP162/ADP163
Data Sheet
NOTES
©2010–2012 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D08628-0-12/12(G)
Rev. G | Page 24 of 24