5 kV RMS Quad-Channel Digital Isolators ADuM4400/ADuM4401/ADuM4402 FEATURES GENERAL DESCRIPTION Enhanced system-level ESD performance per IEC 61000-4-x Safety and regulatory approvals UL recognition 5000 V rms for 1 minute (double protection) CSA Component Acceptance Notice #5A (pending) IEC 60950-1: 600 V rms (reinforced) IEC 60601-1: 250 V rms (reinforced) VDE Certificate of Conformity (pending) DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 VIORM = 846 V peak (reinforced) Low power operation 5 V operation 1.4 mA per channel maximum @ 0 Mbps to 2 Mbps 4.3 mA per channel maximum @ 10 Mbps 34 mA per channel maximum @ 90 Mbps 3 V operation 0.9 mA per channel maximum @ 0 Mbps to 2 Mbps 2.4 mA per channel maximum @ 10 Mbps 20 mA per channel maximum @ 90 Mbps Bidirectional communication 3 V/5 V level translation High temperature operation: 105°C High data rate: dc to 90 Mbps (NRZ) Precise timing characteristics 2 ns maximum pulse width distortion 2 ns maximum channel-to-channel matching High common-mode transient immunity: >25 kV/μs Output enable function 16-lead SOIC wide body package (RoHS-compliant) The ADuM440x 1 are 4-channel digital isolators based on the Analog Devices, Inc., iCoupler® technology. Combining high speed CMOS and monolithic air core transformer technology, these isolation components provide outstanding performance characteristics that are superior to the alternatives, such as optocoupler devices and other integrated couplers. APPLICATIONS General-purpose, high voltage, multichannel isolation Medical equipment Motor drives Power supplies The ADuM440x isolators provide four independent isolation channels in a variety of channel configurations and data rates (see the Ordering Guide). All models operate with the supply voltage on either side ranging from 2.7 V to 5.5 V, providing compatibility with lower voltage systems as well as enabling a voltage translation functionality across the isolation barrier. The ADuM440x isolators have a patented refresh feature that ensures dc correctness in the absence of input logic transitions and during power-up/power-down conditions. This family of isolators, like many Analog Devices isolators, offers very low power consumption, consuming one-tenth to one-sixth the power of comparable isolators at comparable data rates up to 10 Mbps. All models of the ADuM440x provide low pulse width distortion (<2 ns for C grade). In addition, every model has an input glitch filter to protect against extraneous noise disturbances. The ADuM440x contain circuit and layout enhancements to help achieve system-level IEC 61000-4-x compliance (ESD/burst/surge). The precise capability in these tests for the ADuM440x are strongly determined by the design and layout of the user’s board or module. For more information, see the AN-793 Application Note, ESD/Latch-Up Considerations with iCoupler Isolation Products. 1 Protected by U.S. Patents 5,952,849; 6,873,065; and 7,075,329. Other patents pending. ADuM4400 VDD1 1 GND1 2 16 VDD2 VDD1 1 15 GND2 GND1 2 ADuM4401 16 VDD2 VDD1 1 15 GND2 GND1 2 ADuM4402 16 VDD2 15 GND2 DECODE 14 VOA VIA 3 ENCODE DECODE 14 VOA VIA 3 ENCODE DECODE 14 VOA VIB 4 ENCODE DECODE 13 VOB VIB 4 ENCODE DECODE 13 VOB VIB 4 ENCODE DECODE 13 VOB VIC 5 ENCODE DECODE 12 VOC VIC 5 ENCODE DECODE 12 VOC VOC 5 DECODE ENCODE 12 VIC VID 6 ENCODE DECODE 11 VOD VOD 6 DECODE ENCODE 11 VID VOD 6 DECODE ENCODE 11 VID NC 7 10 VE2 VE1 7 10 VE2 VE1 7 10 VE2 GND1 8 9 GND1 8 9 GND1 8 9 Figure 1. ADuM4400 GND2 Figure 2. ADuM4401 GND2 08157-002 ENCODE 08157-001 VIA 3 GND2 Figure 3. ADuM4402 Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2009 Analog Devices, Inc. All rights reserved. 08157-003 FUNCTIONAL BLOCK DIAGRAMS ADuM4400/ADuM4401/ADuM4402 TABLE OF CONTENTS Features .............................................................................................. 1 Recommended Operating Conditions .......................................8 Applications ....................................................................................... 1 Absolute Maximum Ratings ............................................................9 General Description ......................................................................... 1 ESD Caution...................................................................................9 Functional Block Diagrams ............................................................. 1 Pin Configurations and Function Descriptions ......................... 10 Revision History ............................................................................... 2 Typical Performance Characteristics ........................................... 13 Specifications..................................................................................... 3 Applications Information .............................................................. 15 Electrical Characteristics—5 V Operation................................ 3 PC Board Layout ........................................................................ 15 Electrical Characteristics—3 V Operation................................ 4 System-Level ESD Considerations and Enhancements ........ 15 Electrical Characteristics—Mixed 5 V/3 V Operation............ 5 Propagation Delay-Related Parameters ................................... 15 Electrical Characteristics—Mixed 3 V/5 V Operation............ 6 DC Correctness and Magnetic Field Immunity ..................... 15 Package Characteristics ............................................................... 7 Power Consumption .................................................................. 16 Regulatory Information ............................................................... 7 Insulation Lifetime ..................................................................... 17 Insulation and Safety-Related Specifications ............................ 7 Outline Dimensions ....................................................................... 18 DIN V VDE V 0884-10 (VDE V 0884-10) Insulation Characteristics (Pending) ............................................................ 8 Ordering Guide .......................................................................... 18 REVISION HISTORY 4/09—Revision 0: Initial Version Rev. 0 | Page 2 of 20 ADuM4400/ADuM4401/ADuM4402 SPECIFICATIONS ELECTRICAL CHARACTERISTICS—5 V OPERATION All typical specifications are at TA = 25°C, VDD1 = VDD2 = 5 V. Minimum/maximum specifications apply over the entire recommended operation range of 4.5 V ≤ VDD1 ≤ 5.5 V, 4.5 V ≤ VDD2 ≤ 5.5 V, and −40°C ≤ TA ≤ 105°C, unless otherwise noted. Switching specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted. Table 1. Parameter SWITCHING SPECIFICATIONS Data Rate Propagation Delay Pulse Width Distortion Change vs. Temperature Pulse Width Propagation Delay Skew Channel Matching Codirectional Opposing-Direction A Grade Typ Max Symbol Min tPHL, tPLH PWD 50 PW tPSK 1000 65 Min 1 100 40 B Grade Typ Max Min Within PWD limit 50% input to 50% output |tPLH − tPHL| 15 11.1 10 50 50 3 6 2 5 ns ns 18 5 100 tPSKCD tPSKOD Test Conditions 50 11 32 90 32 2 Unit Mbps ns ns ps/°C ns ns 20 10 50 3 C Grade Typ Max 27 0.5 3 8.3 Within PWD limit Between any two units 7 Codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation barrier. Opposing-directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides of the isolation barrier. Table 2. Parameter SUPPLY CURRENT ADuM4400 ADuM4401 ADuM4402 Symbol 1 Mbps—A, B, C Grades Min Typ Max IDD1 IDD2 IDD1 IDD2 IDD1 IDD2 2.9 1.2 2.5 1.6 2.0 2.0 10 Mbps—B, C Grades Min Typ Max 3.5 1.9 3.2 2.4 2.8 2.8 9.0 3.0 7.4 4.4 6.0 6.0 90 Mbps—C Grade Min Typ Max 11.6 5.5 10.6 6.5 7.5 7.5 72 19 59 32 51 51 100 36 82 46 62 62 Unit Test Conditions mA mA mA mA mA mA Table 3. For All Models Parameter DC SPECIFICATIONS Logic High Input Threshold Logic Low Input Threshold Logic High Output Voltage Symbol Min VIH VIL VOH 2.0 Input Current per Channel Supply Current per Channel Quiescent Input Supply Current Quiescent Output Supply Current Dynamic Input Supply Current Dynamic Output Supply Current AC SPECIFICATIONS Output Rise/Fall Time Common-Mode Transient Immunity1 II Output Disable Propagation Delay Output Enable Propagation Delay Refresh Rate tPHZ,tPLH tPZH,tPZL fr Max 0.8 VDDx − 0.1 VDDx − 0.4 −10 IDDI(Q) IDDO(Q) IDDI(D) IDDO(D) tR/tF |CM| Typ 5.0 4.8 +0.01 0.57 0.23 0.20 0.05 25 +10 0.83 0.35 2.5 35 6 6 1.2 1 Unit Test Conditions V V V V μA IOx = −20 μA, VIx = VIxH IOx = −4 mA, VIx = VIxH 0 V ≤ VI x ≤ VDDx mA mA mA/Mbps mA/Mbps ns kV/μs 8 8 ns ns Mbps 10% to 90% VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V High/low-to-high impedance High impedance-to-high/low |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. Rev. 0 | Page 3 of 20 ADuM4400/ADuM4401/ADuM4402 ELECTRICAL CHARACTERISTICS—3 V OPERATION All typical specifications are at TA = 25°C, VDD1 = VDD2 = 3.0 V. Minimum/maximum specifications apply over the entire recommended operation range: 2.7 V ≤ VDD1 ≤ 3.6 V, 2.7 V ≤ VDD2 ≤ 3.6 V, and −40°C ≤ TA ≤ 105°C, unless otherwise noted. Switching specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted. Table 4. Parameter SWITCHING SPECIFICATIONS Data Rate Propagation Delay Pulse Width Distortion Change vs. Temperature Pulse Width Propagation Delay Skew Channel Matching Codirectional Opposing-Direction Symbol Min tPHL, tPLH PWD 50 PW tPSK 1000 A Grade Typ Max 1 100 40 75 Min 20 11 B Grade Typ Max 38 Min 10 50 3 20 5 100 tPSKCD tPSKOD C Grade Typ Max 34 0.5 3 8.3 90 45 2 50 22 11.1 16 50 50 3 6 2 5 Unit Test Conditions Mbps ns ns ps/°C ns ns Within PWD limit 50% input to 50% output |tPLH − tPHL| ns ns Within PWD limit Between any two units 7 Codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation barrier. Opposing-directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides of the isolation barrier. Table 5. Parameter SUPPLY CURRENT ADuM4400 ADuM4401 ADuM4402 Symbol 1 Mbps—A, B, C Grades Min Typ Max IDD1 IDD2 IDD1 IDD2 IDD1 IDD2 1.6 0.7 1.4 0.9 1.2 1.2 10 Mbps—B, C Grades Min Typ Max 2.1 1.2 1.9 1.5 1.7 1.7 4.8 1.8 0.1 2.5 3.3 3.3 90 Mbps—C Grade Min Typ Max 7.1 2.3 5.6 3.3 4.4 4.4 37 11 31 17 24 24 54 15 44 24 39 39 Unit Test Conditions mA mA mA mA mA mA Table 6. For All Models Parameter DC SPECIFICATIONS Logic High Input Threshold Logic Low Input Threshold Logic High Output Voltage Symbol Min VIH VIL VOH 1.6 Input Current per Channel Supply Current per Channel Quiescent Input Supply Current Quiescent Output Supply Current Dynamic Input Supply Current Dynamic Output Supply Current AC SPECIFICATIONS Output Rise/Fall Time Common-Mode Transient Immunity1 II Output Disable Propagation Delay Output Enable Propagation Delay Refresh Rate tPHZ,tPLH tPZH,tPZL fr Max 0.4 VDDx − 0.1 VDDx − 0.4 −10 IDDI(Q) IDDO(Q) IDDI(D) IDDO(D) tR/tF |CM| Typ 3.0 2.8 +0.01 0.31 0.19 0.10 0.03 25 +10 0.49 0.27 3 35 6 6 1.2 1 Unit Test Conditions V V V V μA IOx = −20 μA, VIx = VIxH IOx = −4 mA, VIx = VIxH 0 V ≤ VI x ≤ VDDx mA mA mA/Mbps mA/Mbps ns kV/μs 8 8 ns ns Mbps 10% to 90% VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V High/low-to-high impedance High impedance-to-high/low |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. Rev. 0 | Page 4 of 20 ADuM4400/ADuM4401/ADuM4402 ELECTRICAL CHARACTERISTICS—MIXED 5 V/3 V OPERATION All typical specifications are at TA = 25°C, VDD1 = 5 V, VDD2 = 3.0 V. Minimum/maximum specifications apply over the entire recommended operation range: 4.5 V ≤ VDD1 ≤ 5.5 V, 2.7 V ≤ VDD2 ≤ 3.6 V, and −40°C ≤ TA ≤ 105°C, unless otherwise noted. Switching specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted. Table 7. 7 Codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation barrier. Opposing-directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides of the isolation barrier. Parameter SWITCHING SPECIFICATIONS Data Rate Propagation Delay Pulse Width Distortion Change vs. Temperature Pulse Width Propagation Delay Skew Channel Matching Codirectional Opposing-Direction Symbol Min tPHL, tPLH PWD 50 PW tPSK 1000 A Grade Typ Max 1 50 40 70 Min B Grade Typ Max Min Within PWD limit 50% input to 50% output |tPLH − tPHL| 22 11.1 14 50 50 3 6 2 5 ns ns 20 5 100 tPSKCD tPSKOD Test Conditions 50 11 35 30 0.5 3 8.3 90 40 2 Unit Mbps ns ns ps/°C ns ns 15 10 50 3 C Grade Typ Max Within PWD limit Between any two units Table 8. Parameter SUPPLY CURRENT ADuM4400 ADuM4401 ADuM4402 Symbol 1 Mbps—A, B, C Grades Min Typ Max IDD1 IDD2 IDD1 IDD2 IDD1 IDD2 2.9 0.7 2.5 0.9 2.0 1.2 10 Mbps—B, C Grades Min Typ Max 3.5 1.2 3.2 1.5 2.8 1.7 9.0 1.8 7.4 2.5 6.0 3.3 90 Mbps—C Grade Min Typ Max 11.6 2.3 10.6 3.3 7.5 4.4 72 11 59 17 46 24 100 15 82 24 62 39 Unit Test Conditions mA mA mA mA mA mA Table 9. For All Models Parameter DC SPECIFICATIONS Logic High Input Threshold Logic Low Input Threshold Logic High Output Voltage Symbol Min VIH VIL VOH 2.0 Input Current per Channel Supply Current per Channel Quiescent Input Supply Current Quiescent Output Supply Current Dynamic Input Supply Current Dynamic Output Supply Current AC SPECIFICATIONS Output Rise/Fall Time Common-Mode Transient Immunity1 II Output Disable Propagation Delay Output Enable Propagation Delay Refresh Rate tPHZ,tPLH tPZH,tPZL fr Max 0.8 VDDx − 0.1 VDDx − 0.4 −10 IDDI(Q) IDDO(Q) IDDI(D) IDDO(D) tR/tF |CM| Typ 3.0 2.8 +0.01 0.57 0.29 0.20 0.03 25 +10 0.83 0.27 3 35 6 6 1.2 1 Unit Test Conditions V V V V μA IOx = −20 μA, VIx = VIxH IOx = −4 mA, VIx = VIxH 0 V ≤ VI x ≤ VDDx mA mA mA/Mbps mA/Mbps ns kV/μs 8 8 ns ns Mbps 10% to 90% VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V High/low-to-high impedance High impedance-to-high/low |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. Rev. 0 | Page 5 of 20 ADuM4400/ADuM4401/ADuM4402 ELECTRICAL CHARACTERISTICS—MIXED 3 V/5 V OPERATION All typical specifications are at TA = 25°C, VDD1 = 3.0 V, VDD2 = 5 V. Minimum/maximum specifications apply over the entire recommended operation range: 2.7 V ≤ VDD1 ≤ 3.6 V, 4.5 V ≤ VDD2 ≤ 5.5 V; and −40°C ≤ TA ≤ 105°C, unless otherwise noted. Switching specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted. Table 10. Parameter SWITCHING SPECIFICATIONS Data Rate Propagation Delay Pulse Width Distortion Change vs. Temperature Pulse Width Propagation Delay Skew Channel Matching Codirectional Opposing-Direction Symbol Min tPHL, tPLH PWD 50 PW tPSK 1000 A Grade Typ Max 70 1 100 40 Min B Grade Typ Max 15 35 11 Min 10 50 3 20 5 100 tPSKCD tPSKOD C Grade Typ Max 90 40 2 30 0.5 3 8.3 50 22 11.1 14 50 50 3 6 2 5 Unit Test Conditions Mbps ns ns ps/°C ns ns Within PWD limit 50% input to 50% output |tPLH − tPHL| ns ns Within PWD limit Between any two units 7 Codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation barrier. Opposing-directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides of the isolation barrier. Table 11. Parameter SUPPLY CURRENT ADuM4400 ADuM4401 ADuM4402 Symbol 1 MBps—A, B, C Grades Min Typ Max IDD1 IDD2 IDD1 IDD2 IDD1 IDD2 1.6 1.2 1.4 1.6 1.2 2.0 10 MBps—B, C Grades Min Typ Max 2.1 1.9 1.9 2.4 1.7 2.8 4.8 3.0 4.1 4.4 3.3 6.0 90 MBps—C Grade Min Typ Max 7.1 5.5 5.6 6.5 4.4 7.5 37 19 31 32 24 46 54 36 44 46 39 62 Unit Test Conditions mA mA mA mA mA mA Table 12. For All Models Parameter DC SPECIFICATIONS Logic High Input Threshold Logic Low Input Threshold Logic High Output Voltage Symbol Min VIH VIL VOH 1.6 Input Current per Channel Supply Current per Channel Quiescent Input Supply Current Quiescent Output Supply Current Dynamic Input Supply Current Dynamic Output Supply Current AC SPECIFICATIONS Output Rise/Fall Time Common-Mode Transient Immunity1 II Output Disable Propagation Delay Output Enable Propagation Delay Refresh Rate tPHZ,tPLH tPZH,tPZL fr Max 0.4 VDDx − 0.1 VDDx − 0.4 −10 IDDI(Q) IDDO(Q) IDDI(D) IDDO(D) tR/tF |CM| Typ 5.0 4.8 +0.01 0.31 0.19 0.10 0.05 25 +10 0.49 0.35 2.5 35 6 6 1.1 1 Unit Test Conditions V V V V μA IOx = −20 μA, VIx = VIxH IOx = −4 mA, VIx = VIxH 0 V ≤ VI x ≤ VDDx mA mA mA/Mbps mA/Mbps ns kV/μs 8 8 ns ns Mbps 10% to 90% VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V High/low-to-high impedance High impedance-to-high/low |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. Rev. 0 | Page 6 of 20 ADuM4400/ADuM4401/ADuM4402 PACKAGE CHARACTERISTICS Table 13. Parameter Resistance (Input to Output) 1 Capacitance (Input to Output)1 Input Capacitance 2 IC Junction-to-Case Thermal Resistance, Side 1 IC Junction-to-Case Thermal Resistance, Side 2 1 2 Symbol RI-O CI-O CI θJCI θJCO Min Typ 1012 2.2 4.0 33 28 Max Unit Ω pF pF °C/W °C/W Test Conditions f = 1 MHz Thermocouple located at center of package underside Device considered a 2-terminal device: Pin 1, Pin 2, Pin 3, Pin 4, Pin 5, Pin 6, Pin 7, and Pin 8 shorted together and Pin 9, Pin 10, Pin 11, Pin 12, Pin 13, Pin 14, Pin 15, and Pin 16 shorted together. Input capacitance is from any input data pin to ground. REGULATORY INFORMATION The ADuM440x are approved by the organizations listed in Table 14. Refer to Table 19 and the Insulation Lifetime section for details regarding recommended maximum working voltages for specific cross-isolation waveforms and insulation levels. Table 14. UL (Pending) Recognized under 1577 component recognition program 1 Double/reinforced insulation, 5000 V rms isolation voltage File E214100 1 2 CSA (Pending) Approved under CSA Component Acceptance Notice #5A Reinforced insulation per CSA 60950-1-03 and IEC 60950-1, 600 V rms (848 V peak) maximum working voltage Reinforced insulation per IEC 60601-1 250 V rms (353 V peak) maximum working voltage File 205078 VDE (Pending) Certified according to DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 2 Reinforced insulation, 846 V peak File 2471900-4880-0001 In accordance with UL 1577, each ADuM440x is proof tested by applying an insulation test voltage ≥ 6000 V rms for 1 sec (current leakage detection limit = 10 μA). In accordance with DIN V VDE V 0884-10, each ADuM440x is proof tested by applying an insulation test voltage ≥1590 V peak for 1 sec (partial discharge detection limit = 5 pC). The * marking branded on the component designates DIN V VDE V 0884-10 approval. INSULATION AND SAFETY-RELATED SPECIFICATIONS Table 15. Parameter Rated Dielectric Insulation Voltage Minimum External Air Gap (Clearance) Symbol L(I01) Value 5000 8.0 min Minimum External Tracking (Creepage) L(I02) 8.0 min Minimum Internal Gap (Internal Clearance) Tracking Resistance (Comparative Tracking Index) Isolation Group CTI 0.017 min >175 IIIa Unit Conditions V rms 1 minute duration mm Measured from input terminals to output terminals, shortest distance through air mm Measured from input terminals to output terminals, shortest distance path along body mm Insulation distance through insulation V DIN IEC 112/VDE 0303 Part 1 Material Group (DIN VDE 0110, 1/89, Table 1) Rev. 0 | Page 7 of 20 ADuM4400/ADuM4401/ADuM4402 DIN V VDE V 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS (PENDING) These isolators are suitable for reinforced electrical isolation only within the safety limit data. Maintenance of the safety data is ensured by means of protective circuits. Note that the * marking on packages denotes DIN V VDE V 0884-10 approval for 846 V peak working voltage. Table 16. Description Installation Classification per DIN VDE 0110 For Rated Mains Voltage ≤ 300 V rms For Rated Mains Voltage ≤ 450 V rms For Rated Mains Voltage ≤ 600 V rms Climatic Classification Pollution Degree (DIN VDE 0110, Table 1) Maximum Working Insulation Voltage Input-to-Output Test Voltage, Method b1 Input-to-Output Test Voltage, Method a After Environmental Tests Subgroup 1 After Input and/or Safety Test Subgroup 2 and Subgroup 3 Highest Allowable Overvoltage Safety-Limiting Values VIORM × 1.875 = VPR, 100% production test, tm = 1 sec, partial discharge < 5 pC Symbol Characteristic Unit VIORM VPR I to IV I to II I to II 40/105/21 2 846 1590 V peak V peak 1375 1018 V peak V peak VTR 6000 V peak TS IS1 IS2 RS 150 265 335 >109 °C mA mA Ω VPR VIORM × 1.6 = VPR, tm = 60 sec, partial discharge < 5 pC VIORM × 1.2 = VPR, tm = 60 sec, partial discharge < 5 pC Transient overvoltage, tTR = 10 seconds Maximum value allowed in the event of a failure; see Figure 4 VIO = 500 V 350 RECOMMENDED OPERATING CONDITIONS 300 Table 17. Parameter Operating Temperature Supply Voltages 1 Input Signal Rise and Fall Times 250 SIDE #2 200 Symbol Min Max Unit TA −40 +105 °C VDD1, VDD2 2.7 5.5 V 1.0 ms 150 SIDE #1 1 100 All voltages are relative to their respective ground. See the DC Correctness and Magnetic Field Immunity section for information on immunity to external magnetic fields. 50 0 0 50 100 150 CASE TEMPERATURE (°C) 200 08157-004 SAFETY-LIMITING CURRENT (mA) Case Temperature Side 1 Current Side 2 Current Insulation Resistance at TS Conditions Figure 4. Thermal Derating Curve, Dependence of Safety Limiting Values with Case Temperature per DIN V VDE V 0884-10 Rev. 0 | Page 8 of 20 ADuM4400/ADuM4401/ADuM4402 ABSOLUTE MAXIMUM RATINGS Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 18. Parameter Storage Temperature (TST) Ambient Operating Temperature (TA) Supply Voltages (VDD1, VDD2) 1 Input Voltage (VIA, VIB, VIC, VID, VE1, VE2)1, 2 Output Voltage (VOA, VOB, VOC, VOD)1, 2 Average Output Current Per Pin 3 Side 1 (IO1) Side 2 (IO2) Common-Mode Transients 4 Rating −65°C to +150°C −40°C to +105°C −0.5 V to +7.0 V −0.5 V to VDDI + 0.5 V −0.5 V to VDDO + 0.5 V −18 mA to +18 mA −22 mA to +22 mA −100 kV/μs to +100 kV/μs ESD CAUTION 1 All voltages are relative to their respective ground. VDDI and VDDO refer to the supply voltages on the input and output sides of a given channel, respectively. See the PC Board Layout section. 3 See Figure 4 for maximum rated current values for various temperatures. 4 Refers to common-mode transients across the insulation barrier. Commonmode transients exceeding the Absolute Maximum Rating can cause latchup or permanent damage. 2 Table 19. Maximum Continuous Working Voltage 1 Parameter AC Voltage, Bipolar Waveform AC Voltage, Unipolar Waveform Reinforced Insulation DC Voltage Reinforced Insulation 1 Max 565 Unit V peak Constraint 50 year minimum lifetime 846 V peak Maximum approved working voltage per IEC 60950-1 and VDE V 0884-10 846 V peak Maximum approved working voltage per IEC 60950-1 and VDE V 0884-10 Refers to continuous voltage magnitude imposed across the isolation barrier. See the Insulation Lifetime section for more details. Table 20. Truth Table (Positive Logic) VIx Input 1 H L X X X X 1 VEx Input H or NC H or NC L H or NC L X VDDI State1 Powered Powered Powered Unpowered Unpowered Powered VDDO State1 Powered Powered Powered Powered Powered Unpowered VOx Output1 Notes H L Z H Outputs return to input state within 1 μs of VDDI power restoration. Z Indeterminate Outputs return to input state within 1 μs of VDDO power restoration if VEx state is H or NC. Outputs return to high impedance state within 8 ns of VDDO power restoration if VEx state is L. VIx and VOx refer to the input and output signals of a given channel (A, B, C, or D). VEx refers to the output enable signal on the same side as the VOx outputs. VDDI and VDDO refer to the supply voltages on the input and output sides of the given channel, respectively. Rev. 0 | Page 9 of 20 ADuM4400/ADuM4401/ADuM4402 VDD1 1 16 VDD2 GND1 2 15 GND2 VIA 3 ADuM4400 14 VOA VIB 4 TOP VIEW (Not to Scale) 13 VOB 12 VOC VID 6 11 VOD NC 7 10 VE2 GND1 8 9 GND2 VIC 5 NOTES 1. NC = NO CONNECT 2. PIN 2 AND PIN 8 ARE INTERNALLY CONNECTED, AND CONNECTING BOTH TO GND1 IS RECOMMENDED. 3. PIN 9 AND PIN 15 ARE INTERNALLY CONNECTED, AND CONNECTING BOTH TO GND2 IS RECOMMENDED. 08157-005 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS Figure 5. ADuM4400 Pin Configuration Table 21. ADuM4400 Pin Function Descriptions Pin No. 1 2 3 4 5 6 7 8 9 10 Mnemonic VDD1 GND1 VIA VIB VIC VID NC GND1 GND2 VE2 11 12 13 14 15 16 VOD VOC VOB VOA GND2 VDD2 Description Supply Voltage for Isolator Side 1, 2.7 V to 5.5 V. Ground 1. Ground reference for isolator Side 1. Logic Input A. Logic Input B. Logic Input C. Logic Input D. No Connect. Ground 1. Ground reference for isolator Side 1. Ground 2. Ground reference for isolator Side 2. Output Enable 2. Active high logic input. VOx outputs on Side 2 are enabled when VE2 is high or disconnected. VOx Side 2 outputs are disabled when VE2 is low. In noisy environments, connecting VE2 to an external logic high or low is recommended. Logic Output D. Logic Output C. Logic Output B. Logic Output A. Ground 2. Ground reference for isolator Side 2. Supply Voltage for Isolator Side 2, 2.7 V to 5.5 V. Rev. 0 | Page 10 of 20 ADuM4400/ADuM4401/ADuM4402 VDD1 1 16 VDD2 GND1 2 15 GND2 ADuM4401 VIB 4 TOP VIEW (Not to Scale) VIC 5 14 VOA 13 VOB 12 VOC VOD 6 11 VID VE1 7 10 VE2 GND1 8 9 GND2 NOTES 1. PIN 2 AND PIN 8 ARE INTERNALLY CONNECTED, AND CONNECTING BOTH TO GND1 IS RECOMMENDED. 2. PIN 9 AND PIN 15 ARE INTERNALLY CONNECTED, AND CONNECTING BOTH TO GND2 IS RECOMMENDED. 08157-006 VIA 3 Figure 6. ADuM4401 Pin Configuration Table 22. ADuM4401 Pin Function Descriptions Pin No. 1 2 3 4 5 6 7 Mnemonic VDD1 GND1 VIA VIB VIC VOD VE1 8 9 10 GND1 GND2 VE2 11 12 13 14 15 16 VID VOC VOB VOA GND2 VDD2 Description Supply Voltage for Isolator Side 1, 2.7 V to 5.5 V. Ground 1. Ground reference for isolator Side 1. Logic Input A. Logic Input B. Logic Input C. Logic Output D. Output Enable. Active high logic input. VOx Side 1 outputs are enabled when VE1 is high or disconnected. VOX Side 1 outputs are disabled when VE1 is low. In noisy environments, connecting VE1 to an external logic high or low is recommended. Ground 1. Ground reference for isolator Side 1. Ground 2. Ground reference for isolator Side 2. Output Enable 2. Active high logic input. VOx outputs on Side 2 are enabled when VE2 is high or disconnected. VOx Side 2 outputs are disabled when VE2 is low. In noisy environments, connecting VE2 to an external logic high or low is recommended. Logic Input D. Logic Output C. Logic Output B. Logic Output A. Ground 2. Ground reference for isolator Side 2. Supply Voltage for Isolator Side 2, 2.7 V to 5.5 V. Rev. 0 | Page 11 of 20 ADuM4400/ADuM4401/ADuM4402 VDD1 1 16 VDD2 GND1 2 15 GND2 ADuM4402 VIB 4 TOP VIEW (Not to Scale) VOC 5 14 VOA 13 VOB 12 VIC VOD 6 11 VID VE1 7 10 VE2 GND1 8 9 GND2 NOTES 1. PIN 2 AND PIN 8 ARE INTERNALLY CONNECTED, AND CONNECTING BOTH TO GND1 IS RECOMMENDED. 2. PIN 9 AND PIN 15 ARE INTERNALLY CONNECTED, AND CONNECTING BOTH TO GND2 IS RECOMMENDED. 08157-007 VIA 3 Figure 7. ADuM4402 Pin Configuration Table 23. ADuM4402 Pin Function Descriptions Pin No. 1 2 3 4 5 6 7 Mnemonic VDD1 GND1 VIA VIB VOC VOD VE1 8 9 10 GND1 GND2 VE2 11 12 13 14 15 16 VID VIC VOB VOA GND2 VDD2 Description Supply Voltage for Isolator Side 1, 2.7 V to 5.5 V. Ground 1. Ground reference for isolator Side 1. Logic Input A. Logic Input B. Logic Output C. Logic Output D. Output Enable 1. Active high logic input. VOx Side 1 outputs are enabled when VE1 is high or disconnected. VOX Side 1 outputs are disabled when VE1 is low. In noisy environments, connecting VE1 to an external logic high or low is recommended. Ground 1. Ground reference for isolator Side 1. Ground 2. Ground reference for isolator Side 2. Output Enable 2. Active high logic input. VOx outputs on Side 2 are enabled when VE2 is high or disconnected. VOx Side 2 outputs are disabled when VE2 is low. In noisy environments, connecting VE2 to an external logic high or low is recommended. Logic Input D. Logic Input C. Logic Output B. Logic Output A. Ground 2. Ground reference for isolator Side 2. Supply Voltage for Isolator Side 2, 2.7 V to 5.5 V. Rev. 0 | Page 12 of 20 ADuM4400/ADuM4401/ADuM4402 80 15 60 CURRENT (mA) 20 5V 10 3V 40 5V 3V 5 0 0 20 40 60 DATA RATE (Mbps) 80 100 0 0 20 80 15 60 10 40 60 DATA RATE (Mbps) 5 100 40 20 5V 5V 20 40 60 DATA RATE (Mbps) 80 100 08157-009 0 0 0 Figure 9. Typical Output Supply Current per Channel vs. Data Rate (No Load) 15 60 CURRENT (mA) 80 5V 40 60 DATA RATE (Mbps) 80 100 Figure 12. Typical ADuM4400 VDD2 Supply Current vs. Data Rate for 5 V and 3 V Operation 20 10 20 08157-012 3V 3V 0 5 40 5V 20 0 0 20 40 60 DATA RATE (Mbps) 80 100 Figure 10. Typical Output Supply Current per Channel vs. Data Rate (15 pF Output Load) 0 0 20 40 60 DATA RATE (Mbps) 80 Figure 13. Typical ADuM4401 VDD1 Supply Current vs. Data Rate for 5 V and 3 V Operation Rev. 0 | Page 13 of 20 100 08157-013 3V 3V 08157-010 CURRENT/CHANNEL (mA) 80 Figure 11. Typical ADuM4400 VDD1 Supply Current vs. Data Rate for 5 V and 3 V Operation CURRENT (mA) CURRENT/CHANNEL (mA) Figure 8. Typical Input Supply Current per Channel vs. Data Rate (No Load) 20 08157-011 20 08157-008 CURRENT/CHANNEL (mA) TYPICAL PERFORMANCE CHARACTERISTICS ADuM4400/ADuM4401/ADuM4402 40 80 PROPAGATION DELAY (ns) CURRENT (mA) 60 40 5V 20 3V 35 30 5V 0 20 40 60 DATA RATE (Mbps) 80 100 Figure 14. Typical ADuM4401 VDD2 Supply Current vs. Data Rate for 5 V and 3 V Operation 40 5V 20 3V 0 40 60 DATA RATE (Mbps) 80 100 08157-015 CURRENT (mA) 60 20 –25 0 25 50 TEMPERATURE (°C) 75 Figure 16. Propagation Delay vs. Temperature, C Grade 80 0 25 –50 Figure 15. Typical ADuM4402 VDD1 or VDD2 Supply Current vs. Data Rate for 5 V and 3 V Operation Rev. 0 | Page 14 of 20 100 08157-016 0 08157-014 3V ADuM4400/ADuM4401/ADuM4402 APPLICATIONS INFORMATION The ADuM440x digital isolators require no external interface circuitry for the logic interfaces. Power supply bypassing is strongly recommended at the input and output supply pins (see Figure 17). Bypass capacitors are most conveniently connected between Pin 1 and Pin 2 for VDD1 and between Pin 15 and Pin 16 for VDD2. The capacitor value should be between 0.01 μF and 0.1 μF. The total lead length between both ends of the capacitor and the input power supply pin should not exceed 20 mm. Bypassing between Pin 1 and Pin 8 and between Pin 9 and Pin 16 should also be considered unless the ground pair on each package side are connected close to the package. VDD2 GND2 VOA VOB VOC/VIC VOD/VID VE2 GND2 PROPAGATION DELAY-RELATED PARAMETERS Propagation delay is a parameter that describes the length of time for a logic signal to propagate through a component. The propagation delay to a logic low output can differ from the propagation delay to logic high. INPUT (VIx) 50% tPLH OUTPUT (VOx) tPHL 50% Figure 18. Propagation Delay Parameters 08157-017 VDD1 GND1 VIA VIB VIC/VOC VID/VOD NC/VE1 GND1 While the ADuM440x improve system-level ESD reliability, they are no substitute for a robust system-level design. See the AN-793 Application Note, ESD/Latch-Up Considerations with iCoupler Isolation Products, for detailed recommendations on board layout and system-level design. 08157-018 PC BOARD LAYOUT Figure 17. Recommended Printed Circuit Board Layout In applications involving high common-mode transients, ensure that board coupling across the isolation barrier is minimized. Furthermore, the board layout should be designed such that any coupling that does occur equally affects all pins on a given component side. Failure to ensure this could cause voltage differentials between pins exceeding the Absolute Maximum Ratings of the device, thereby leading to latch-up or permanent damage. SYSTEM-LEVEL ESD CONSIDERATIONS AND ENHANCEMENTS System-level ESD reliability (for example, per IEC 61000-4-x) is highly dependent on system design, which varies widely by application. The ADuM440x incorporate many enhancements to make ESD reliability less dependent on system design. The enhancements include • ESD protection cells added to all input/output interfaces. • Key metal trace resistances reduced using wider geometry and paralleling of lines with vias. • The SCR effect, inherent in CMOS devices, minimized by using guarding and isolation techniques between PMOS and NMOS devices. • Areas of high electric field concentration eliminated using 45° corners on metal traces. • Supply pin overvoltage prevented with larger ESD clamps between each supply pin and its respective ground. Pulse width distortion is the maximum difference between these two propagation delay values and is an indication of how accurately the input signal’s timing is preserved. Channel-to-channel matching refers to the maximum amount the propagation delay differs among channels within a single ADuM440x component. Propagation delay skew refers to the maximum amount the propagation delay differs among multiple ADuM440x components operated under the same conditions. DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY Positive and negative logic transitions at the isolator input cause narrow (~1 ns) pulses to be sent via the transformer to the decoder. The decoder is bistable and is therefore either set or reset by the pulses, indicating input logic transitions. In the absence of logic transitions at the input for more than ~1 μs, a periodic set of refresh pulses indicative of the correct input state are sent to ensure dc correctness at the output. If the decoder receives no internal pulses for more than approximately 5 μs, the input side is assumed to be without power or nonfunctional; in which case, the isolator output is forced to a default state (see Table 20) by the watchdog timer circuit. The limitation on the ADuM440x magnetic field immunity is set by the condition in which induced voltage in the transformer’s receiving coil is large enough to either falsely set or reset the decoder. The following analysis defines the conditions under which this can occur. The 3 V operating condition of the ADuM440x is examined because it represents the most susceptible mode of operation. Rev. 0 | Page 15 of 20 ADuM4400/ADuM4401/ADuM4402 where: β is the magnetic flux density (gauss). N is the number of turns in the receiving coil. rn is the radius of the nth turn in the receiving coil (cm). Given the geometry of the receiving coil in the ADuM440x and an imposed requirement that the induced voltage be at most 50% of the 0.5 V margin at the decoder, a maximum allowable magnetic field is calculated as shown in Figure 19. 10 DISTANCE = 100mm 1 DISTANCE = 5mm 0.1 0.01 1k 10k 100k 1M 10M 100M MAGNETIC FIELD FREQUENCY (Hz) Figure 20. Maximum Allowable Current for Various Current-to-ADuM440x Spacings 100 MAXIMUM ALLOWABLE MAGNETIC FLUX DENSITY (kgauss) DISTANCE = 1m 100 08157-020 V = (−dβ/dt)Σ∏rn2; n = 1, 2,…, N 1000 MAXIMUM ALLOWABLE CURRENT (kA) The pulses at the transformer output have an amplitude greater than 1.0 V. The decoder has a sensing threshold at about 0.5 V, thereby establishing a 0.5 V margin in which induced voltages can be tolerated. The voltage induced across the receiving coil is given by Note that at combinations of strong magnetic field and high frequency, any loops formed by printed circuit board traces may induce sufficiently large error voltages to trigger the thresholds of succeeding circuitry. Care should be taken in the layout of such traces to avoid this possibility. 10 1 POWER CONSUMPTION 0.1 The supply current at a given channel of the ADuM440x isolator is a function of the supply voltage, the channel’s data rate, and the channel’s output load. 0.01 For each input channel, the supply current is given by 10k 1M 10M 100k MAGNETIC FIELD FREQUENCY (Hz) 100M 08157-019 0.001 1k Figure 19. Maximum Allowable External Magnetic Flux Density For example, at a magnetic field frequency of 1 MHz, the maximum allowable magnetic field of 0.2 kgauss induces a voltage of 0.25 V at the receiving coil. This is about 50% of the sensing threshold and does not cause a faulty output transition. Similarly, if such an event were to occur during a transmitted pulse (and was of the worst-case polarity), it would reduce the received pulse from >1.0 V to 0.75 V—still well above the 0.5 V sensing threshold of the decoder. The preceding magnetic flux density values correspond to specific current magnitudes at given distances away from the ADuM440x transformers. Figure 20 expresses these allowable current magnitudes as a function of frequency for selected distances. As can be seen, the ADuM440x are immune and can be affected only by extremely large currents operated at high frequency and very close to the component. For the 1 MHz example noted, one would have to place a 0.5 kA current 5 mm away from the ADuM440x to affect the component’s operation. IDDI = IDDI (Q) f ≤ 0.5fr IDDI = IDDI (D) × (2f − fr) + IDDI (Q) f > 0.5fr For each output channel, the supply current is given by: IDDO = IDDO (Q) f ≤ 0.5fr −3 IDDO = (IDDO (D) + (0.5 × 10 ) × CLVDDO) × (2f − fr) + IDDO (Q) f > 0.5fr where: IDDI (D), IDDO (D) are the input and output dynamic supply currents per channel (mA/Mbps). CL is the output load capacitance (pF). VDDO is the output supply voltage (V). f is the input logic signal frequency (MHz, half of the input data rate, NRZ signaling). fr is the input stage refresh rate (Mbps). IDDI (Q), IDDO (Q) are the specified input and output quiescent supply currents (mA). Rev. 0 | Page 16 of 20 ADuM4400/ADuM4401/ADuM4402 Note that the voltage presented in Figure 22 is shown as sinusoidal for illustration purposes only. It is meant to represent any voltage waveform varying between 0 V and some limiting value. The limiting value can be positive or negative, but the voltage cannot cross 0 V. Analog Devices performs accelerated life testing using voltage levels higher than the rated continuous working voltage. Acceleration factors for several operating conditions are determined. These factors allow calculation of the time to failure at the actual working voltage. The values shown in Table 19 summarize the peak voltage for 50 years of service life for a bipolar ac operating condition and the maximum CSA/VDE approved working voltages. In many cases, the approved working voltage is higher than the 50-year service life voltage. Operation at these high working voltages can lead to shortened insulation life in some cases. The insulation lifetime of the ADuM440x depends on the voltage waveform type imposed across the isolation barrier. The iCoupler insulation structure degrades at different rates, depending on whether the waveform is bipolar ac, unipolar ac, or dc. Figure 21, Figure 22, and Figure 23 illustrate these different isolation voltage waveforms. Bipolar ac voltage is the most stringent environment. The goal of a 50-year operating lifetime under the ac bipolar condition determines Analog Devices recommended maximum working voltage. Rev. 0 | Page 17 of 20 RATED PEAK VOLTAGE 08157-021 All insulation structures eventually break down when subjected to voltage stress over a sufficiently long period. The rate of insulation degradation is dependent on the characteristics of the voltage waveform applied across the insulation. In addition to the testing performed by the regulatory agencies, Analog Devices carries out an extensive set of evaluations to determine the lifetime of the insulation structure within the ADuM440x. 0V Figure 21. Bipolar AC Waveform RATED PEAK VOLTAGE 08157-022 INSULATION LIFETIME In the case of unipolar ac or dc voltage, the stress on the insulation is significantly lower. This allows operation at higher working voltages while still achieving a 50-year service life. The working voltages listed in Table 19 can be applied while maintaining the 50-year minimum lifetime, provided the voltage conforms to either the unipolar ac or dc voltage cases. Any cross-insulation voltage waveform that does not conform to Figure 22 or Figure 23 should be treated as a bipolar ac waveform, and its peak voltage should be limited to the 50-year lifetime voltage value listed in Table 19. 0V Figure 22. Unipolar AC Waveform RATED PEAK VOLTAGE 08157-023 To calculate the total IDD1 and IDD2, the supply currents for each input and output channel corresponding to IDD1 and IDD2 are calculated and totaled. Figure 8 and Figure 9 provide per channel supply currents as a function of data rate for an unloaded output condition. Figure 10 provides per channel supply current as a function of data rate for a 15 pF output condition. Figure 11 through Figure 15 provide total IDD1 and IDD2 as a function of data rate for ADuM4400/ADuM4401/ ADuM4402 channel configurations. 0V Figure 23. DC Waveform ADuM4400/ADuM4401/ADuM4402 OUTLINE DIMENSIONS 10.50 (0.4134) 10.10 (0.3976) 9 16 7.60 (0.2992) 7.40 (0.2913) 8 1.27 (0.0500) BSC 0.30 (0.0118) 0.10 (0.0039) COPLANARITY 0.10 0.51 (0.0201) 0.31 (0.0122) 10.65 (0.4193) 10.00 (0.3937) 0.75 (0.0295) 0.25 (0.0098) 2.65 (0.1043) 2.35 (0.0925) SEATING PLANE 45° 8° 0° 1.27 (0.0500) 0.40 (0.0157) 0.33 (0.0130) 0.20 (0.0079) COMPLIANT TO JEDEC STANDARDS MS-013- AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. 032707-B 1 Figure 24. 16-Lead Standard Small Outline Package [SOIC_W] Wide Body (RW-16) Dimensions shown in millimeters and (inches) ORDERING GUIDE Model ADuM4400ARWZ 1 , 2 ADuM4400BRWZ1, 2 ADuM4400CRWZ1, 2 ADuM4401ARWZ1, 2 ADuM4401BRWZ1, 2 ADuM4401CRWZ1, 2 ADuM4402ARWZ1, 2 ADuM4402BRWZ1, 2 ADuM4402CRWZ1, 2 1 2 Number of Inputs, VDD1 Side 4 4 4 3 3 3 2 2 2 Number of Inputs, VDD2 Side 0 0 0 1 1 1 2 2 2 Maximum Data Rate (Mbps) 1 10 90 1 10 90 1 10 90 Maximum Propagation Delay, 5 V (ns) 100 50 32 100 50 32 100 50 32 Maximum Pulse Width Distortion (ns) 40 3 2 40 3 2 40 3 2 Tape and reel is available. The addition of an -RL suffix designates a 13” (1,000 units) tape and reel option. Z = RoHS Compliant Part. Rev. 0 | Page 18 of 20 Temperature Range −40°C to +105°C −40°C to +105°C −40°C to +105°C −40°C to +105°C −40°C to +105°C −40°C to +105°C −40°C to +105°C −40°C to +105°C −40°C to +105°C Package Description 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W Package Option RW-16 RW-16 RW-16 RW-16 RW-16 RW-16 RW-16 RW-16 RW-16 ADuM4400/ADuM4401/ADuM4402 NOTES ADuM4400/ADuM4401/ADuM4402 NOTES ©2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D08157-0-4/09(0) Rev. 0 | Page 20 of 20