PANASONIC AN8017SA

Voltage Regulators
AN8017SA
1.8-volt 2-channel step-up DC-DC converter control IC
■ Overview
Unit: mm
5.0±0.2
16
9
+0.10
0.15 −0.05
4.4±0.2
6.4±0.3
(1.0)
0° to 10°
0.5±0.2
1
8
1.2±0.2
The AN8017SA is a two-channel PWM DC-DC converter control IC that features low-voltage operation.
This IC can obtain the step-up voltage with a small
number of external components.
The minimum operating voltage is as low as 1.8 V so
that it can operate with two dry batteries. In addition,
since it uses the 16-pin surface mounting type package
with 0.65 mm pitch, it is suitable for a miniaturized highly
efficient potable power supply.
0.1±0.1
■ Features
0.65
(0.225)
• Wide operating supply voltage range (1.8 V to 14 V)
Seating plane
0.22
• Incorporating a high precision reference voltage circuit
(allowance: ± 2%)
SSOP016-P-0225A
• Control in a wide output frequency range is possible
(20 kHz to 1 MHz)
• Built-in wideband error amplifier
(single gain bandwidth: 10 MHz typical)
• A built-in timer latch short-circuit protection circuit
(charge current: 1.1 µA typical)
• Incorporating an under-voltage lock-out circuit (U.V.L.O.)
(circuit operation-starting voltage: 1.67 V typical)
• Dead-time is variable
• Flatness of switching current can be obtained by staggering the turn-on timing of each channel
• Built-in unlatch function
When DT1 pin is low level or DT2 pin is high level, independent turn-off is possible.
• Incorporating an on/off control function
(active-high control input, standby mode current: 1 µA maximum)
• Parallel operation is possible
• Totem pole output
• Output source-current: −50 mA maximum (Constant current output with a less supply voltage fluctuation is possible
by connecting an external resistor to pin 6 and pin 11)
• Output sink-current: +80 mA maximun
+0.10
− 0.05
■ Applications
• LCD displays, digital still cameras, and PDAs
1
AN8017SA
Voltage Regulators
Off
FB1
15
On/off
control
4
1.19 V
Reference
voltage source
VREF
5
DT1
OSC
1
9
16
VCC
VREF
■ Block Diagram
VREF
Triangular wave
oscillation
VCC
0.2 V
IN−1
0.9 V
FB2
IN+2
13
14
S.C.P.
comp.
0.22 V
Error
amp.2
7
U.V.L.O.
H
L
Latch
R
Q
S
1.19 V
RB1
PWM1
Unlatch1
3 Error amp.1
6
0.9 V
VCC
11
Out1
RB2
VREF
PWM2
0.9 V
10
Out2
0.9 V
1.19 V
VREF
Unlatch2
GND
S.C.P.
DT2
2
12
8
■ Pin Descriptions
Pin No. Symbol
1
2
3
S.C.P.
IN−1
Pin No. Symbol
Description
Pin for connecting a oscillation timing
8
GND
Grounding pin
resistor and capacitor
9
VCC
Power supply voltage application pin
Pin for connecting the time constant set-
10
Out2
Out2 block push-pull type output pin
ting capacitor for short-circuit protection
11
RB2
Out2 block output source current
setting resistor connection pin
Inverting input pin to error amplifier
1 block
12
DT2
PWM2 block dead-time setting pin
4
FB1
Output pin of error amplifier 1 block
13
FB2
Output pin of error amplifier 2 block
5
DT1
PWM1 block dead-time setting pin
14
IN+2
Error amplifier 2 block noninverting
6
RB1
Out1 block output source current
7
2
OSC
Description
Out1
input pin
setting resistor connection pin
15
Off
Out1 block push-pull type output pin
16
VREF
On/off control pin
Reference voltage output pin
Voltage Regulators
AN8017SA
■ Absolute Maximum Ratings
Parameter
Supply voltage
Off terminal allowable application voltage
Symbol
Rating
Unit
VCC
15
V
VOFF
15
V
IN−1 terminal allowable application voltage
*2
VIN−1
6
V
IN+2 terminal allowable application voltage
*2
VIN+2
6
V
ICC

mA
Output source current
ISO(OUT)
−50
mA
Output sink current
ISI(OUT)
+80
mA
PD
135
mW
Operating ambient temperature
Topr
−30 to +85
°C
Storage temperature
Tstg
−55 to +150
°C
Supply current
Power dissipation
*1
Note) 1. Do not apply external currents or voltages to any pins not specifically mentioned.
For the circuit currents, '+' denotes current flowing into the IC, and '−' denotes current flowing out of the IC.
2. Except for the power dissipation, operating ambient temperature, and storage temperature, all ratings are for Ta = 25°C.
3. *1: Ta = 85 °C. For the independent IC without a heat sink. Note that applications must observe the derating curve for the
relationship between the IC power consumption and the ambient temperature.
*2: VIN−1 , VIN+2 = VCC when VCC < 6 V.
■ Recommended Operating Range
Parameter
Symbol
Range
Unit
Supply voltage
VCC
1.8 to 14
V
Off control terminal application voltage
VOFF
0 to 14
V
Output source current
ISO(OUT)
−40 (minimum)
mA
Output sink current
ISI(OUT)
70 (maximum)
mA
Timing resistance
RT
1 to 51
kΩ
Timing capacitance
CT
100 to 10 000
pF
Oscillation frequency
fOUT
20 to 1 000
kHz
Short-circuit protection time constant
setting capacitance
CSCP
1 000 (minimum)
pF
RB
180 to 15 000
Ω
Output current setting resistance
■ Electrical Characteristics at VCC = 2.4 V, CREF = 0.1 µF, Ta = 25°C
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
1.166
1.19
1.214
V
Reference voltage block
Reference voltage
VREF
IREF = − 0.1 mA
Input regulation with input fluctuation
Line
VCC = 1.8 V to 14 V

15
30
mV
Load regulation
Load
IREF = − 0.1 mA to −1 mA
−20
−5

mV
1.59
1.67
1.75
V
U.V.L.O. block
Circuit operation start voltage
VUON
3
AN8017SA
Voltage Regulators
■ Electrical Characteristics at VCC = 2.4 V, CREF = 0.1 µF, Ta = 25°C (continued)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
VTH1
1.16
1.19
1.22
V
IB1

0.2
0.8
µA
High-level output voltage 1
VEH1
0.83
0.93
1.03
V
Low-level output voltage 1
VEL1


0.2
V
Output source current 1
ISO(FB)1
−61
−47
−33
µA
Output sink current 1
ISI(FB)1
33
47
61
µA
VTH2
1.16
1.19
1.22
V
IB2

0.2
0.8
µA
High-level output voltage 2
VEH2
0.83
0.93
1.03
V
Low-level output voltage 2
VEL2


0.2
V
Output source current 2
ISO(FB)2
−61
−47
−33
µA
Output sink current 2
ISI(FB)2
33
47
61
µA
VTH(OSC)
0.8
0.9
1.0
V
185
205
225
kHz
73
78
83
%
Error amplifier 1 block
Input threshold voltage 1
Input bias current 1
Error amplifier 2 block
Input threshold voltage 2
Input bias current 2
Oscillator block
Output off threshold voltage
Output 1 block
RT = 12 kΩ, CT = 330 pF
Oscillation frequency 1
fOUT1
Output duty ratio 1
Du1
High-level output voltage 1
VOH1
IO = −10 mA, RB = 820 Ω
1.4


V
Low-level output voltage 1
VOL1
IO = 10 mA, RB = 820 Ω


0.2
V
Output source current 1
ISO(OUT)1 VO = 0.7 V, RB = 820 Ω
−40
−30
−20
mA
Output sink current 1
ISI(OUT)1 VO = 0.7 V, RB = 820 Ω
20


mA
20
30
40
kΩ
185
205
225
kHz
72
77
82
%
Pull-down resistance 1
RO1
Output 2 block
RT = 12 kΩ, CT = 330 pF
Oscillation frequency 2
fOUT2
Output duty ratio 2
Du2
High-level output voltage 2
VOH2
IO = −10 mA, RB = 820 Ω
1.4


V
Low-level output voltage 2
VOL2
IO = 10 mA, RB = 820 Ω


0.2
V
Output source current 2
ISO(OUT)2 VO = 0.7 V, RB = 820 Ω
−40
−30
−20
mA
Output sink current 2
ISI(OUT)2 VO = 0.7 V, RB = 820 Ω
20


mA
20
30
40
kΩ

0.28
0.30
V
Pull-down resistance 2
RO2
PWM1 block
Output full-off input threshold voltage 1
4
VT0-1
Duty = 0%
Output full-on input threshold voltage 1 VT100-1
Duty = 100%
0.65
0.72

V
Input current 1
VDT1 = 0.5 V
−1.1
− 0.5

µA
IDT1
Voltage Regulators
AN8017SA
■ Electrical Characteristics at VCC = 2.4 V, CREF = 0.1 µF, Ta = 25 °C (continued)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
0.65
0.72

V
PWM2 block
Duty = 0%
Output full-off input threshold voltage 2
VT0-2
Output full-on input threshold voltage 2
VT100-2
Duty = 100%

0.28
0.30
V
IDT2
VDT2 = 0.2 V
−1.1
− 0.5

µA
VTHUL1
0.15
0.20
0.25
V
VTHUL2
0.8
0.9
1.0
V
Input standby voltage
VSTBY

60
120
mV
Input threshold voltage 1
VTHPC1
0.8
0.9
1.0
V
Input threshold voltage 2
VTHPC2
0.17
0.22
0.27
V
Input latch voltage
VIN

60
120
mV
Charge current
ICHG
Input current 2
Unlatch circuit 1 block
Input threshold voltage 1
Unlatch circuit 2 block
Input threshold voltage 2
Short-circuit protection circuit block
VSCP = 0 V
−1.43
−1.1 − 0.77
µA
0.8
1.0
1.3
V
On/off control block
Input threshold voltage
VON(TH)
Whole device
Output off consumption current
ICC(OFF)
RB = 820 Ω, duty = 0%

7.0
9.8
mA
Latch mode consumption current
ICC(LA)
RB = 820 Ω

5.6
7.8
mA
Standby current
ICC(SB)


1
µA
• Design reference data
Note) The characteristics listed below are theoretical values based on the IC design and are not guaranteed.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Ta = −30°C to +85°C
−1

+1
%
IOC

−11

mA
VR

0.8

V
− 0.3

Reference voltage block
VREF temperature characteristics
Over-current protection drive current
VREFdT
U.V.L.O. block
Reset voltage
Error amplifier 1/2 blocks
VTH temperature characteristics
VTHdT
Ta = −30°C to +85°C
+ 0.3 mV/°C
Open-loop gain
AV

57

dB
Single gain bandwidth
fBW

10

MHz
RB terminal voltage
VB

0.36

V
Frequency supply voltage characteristics
fdV
−1

+1
%
Frequency temperature characteristics
fdT
−3

+3
%
Output 1/2 blocks
5
AN8017SA
Voltage Regulators
■ Electrical Characteristics at VCC = 2.4 V, CREF = 0.1 µF, Ta = 25°C (continued)
• Design reference data (continued)
Note) The characteristics listed below are theoretical values based on the IC design and are not guaranteed.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
VTHL

1.19

V
IOFF

23

µA
Short-circuit protection block
Comparator threshold voltage
On/off control block
Off terminal current
■ Terminal Equivalent Circuits
Pin No.
Equivalent circuit
1
VCC
0.2 V
Latch
S
Q
R
1
2
VCC
1.1 µA
Latch
S
Q
R
Output
1.19 V
cut-off
2 kΩ
Description
I/O
OSC:
The terminal used for connecting a timing capacitor/resistor to set oscillation frequency.
Use a capacitance value within the range of 100 pF
to 10 000 pF and a resistance value within the range
of 1 kΩ to 51 kΩ. Use an oscillation frequency in the
range of 20 kHz to 1 MHz. In a parallel synchronous
operation, the channel 2 output stops when this pin
becomes 0.9 V or more.
(Refer to the "Application Notes, [7]" section.)
O
S.C.P.:
The terminal for connecting a capacitor to set the
time constant of the timer latch short-circuit protection circuit. Use a capacitance value in the range of
1 000 pF or more. The charge current ICHG is 1.1 µA
typical.
O
IN−1:
The inverting input pin for error amplifier 1 block.
I
2
3
VCC
3
100 Ω
1.19 V
6
Voltage Regulators
AN8017SA
■ Terminal Equivalent Circuits (continued)
Pin No.
Equivalent circuit
4
VCC
47 µA
OSC
IN−1
PWM
47 µA
1.19 V
4
5
VCC
FB1 OSC
PWM
0.20 V
5
6
VCC
Description
I/O
FB1:
The output pin for error amplifier 1 block.
The source current is −47 µA and the sink current is
47 µA.
Correct the frequency characteristics of the gain and
the phase by connecting a resistor and a capacitor
between this terminal and GND.
O
DT1:
The pin for setting channel 1 output maximum duty
ratio.
If this terminal is set at a voltage of 0.20 V or less,
FB1 terminal becomes low-level voltage and the
protective function for channel 1 output short-circuit will stop (Unlatch function).
I
RB1:
The pin for connecting a resistor for setting channel
1 output current.
Use a resistance value in the range of 180 Ω to 15 kΩ.
The terminal voltage is 0.36 V (at RB1 = 820 Ω).
I
Out1:
The pin is push-pull type output terminal.
The absolute maximum ratings of output current are
−50 mA for the source current and +80 mA for the
sink current.
A constant current output with less fluctuation with
power supply voltage and dispersion can be obtained by the resistor externally attached to RB1
pin.
VRB1
ISO(OUT)1 = 68 ×
[A]
RB1
O
GND:
Grounding terminal

VCC:
The supply voltage application terminal
Use the operating supply voltage in the range of
1.8 V to 14 V.

Out1
30 kΩ
120 Ω
6
7
VCC
RB1
ISO(OUT)1
7
30 kΩ
8
8
9
9
7
AN8017SA
Voltage Regulators
■ Terminal Equivalent Circuits (continued)
Pin No.
Equivalent circuit
10
VCC
RB2
ISO(OUT)2
10
30 kΩ
11
VCC
Out2
30 kΩ
120 Ω
Description
I/O
Out2:
The pin is push-pull type output terminal.
The absolute maximum ratings of output current are
−50 mA for the source current and +80 mA for the
sink current.
A constant current output with less fluctuation with
power supply voltage and dispersion can be obtained by the resistor externally attached to RB2
pin.
VRB2
ISO(OUT)2 = 68 ×
[A]
RB2
O
RB2:
The pin for connecting a resistor for setting channel
2 output current.
Use a resistance value in the range of 180 Ω to 15
kΩ.
The terminal voltage is 0.36 V (at RB2 = 820 Ω).
I
DT2:
The pin for setting channel 2 output maximum duty
ratio.
If this terminal is set at a voltage of 0.9 V or more,
FB2 terminal becomes high-level voltage and the
protective function for channel 2 output short-circuit will stop (Unlatch function).
I
FB2:
The output pin for error amplifier.
The source current is −47 µA and the sink current is
47 µA.
Correct the frequency characteristics of the gain and
the phase by connecting a resistor and a capacitor
between this terminal and GND.
O
IN+2:
The noninverting input pin for error amplifier 2
block.
I
11
12
VCC
0.9 V
FB2 OSC
0.9 V
PWM
12
13
VCC
47 µA
OSC
IN+2
47 µA
1.19 V
13
14
VCC
14
100 Ω
1.19 V
8
PWM
Voltage Regulators
AN8017SA
■ Terminal Equivalent Circuits (continued)
Pin No.
Equivalent circuit
15
Internal circuit
start/stop
30 kΩ
15
60 kΩ
16
VCC
16
Description
I/O
Off:
The terminal for on/off control.
High-level input: Normal operation (VOFF > 1.3 V)
Low-level input: Standby state (VOFF < 0.8 V)
The total current consumption in the standby state
can be suppressed to a value of 1 µA or less.
I
VREF:
The output terminal for the internal reference voltage.
The reference voltage is 1.19 V (allowance: ± 2%)
at VCC = 2.4 V and IREF = − 0.1 mA.
Connect a capacitor of 0.01 µF or more between
VREF and GND for phase compensation.
O
■ Usage Notes
[1] The loss, P of this IC increases in proportion to the supply voltage. Use the IC so as not to exceed the allowable
power dissipation of package, PD .
Reference formula:
P = (VCC − VBEQ1) × ISO(OUT)1 × Du1 + (VCC − VBEQ2) × ISO(OUT)2 × Du2 + VCC × ICC < PD
VBEQ1 : Base-emitter voltage of NPN transistor Q1
ISO(OUT)1 : Out1 terminal output source current
(set by RB1, ISO(OUT)1 = 40 mA maximum at RB1 = 820 Ω)
Du1
: Output1 duty ratio
VBEQ2 : Base-emitter voltage of NPN transistor Q2
ISO(OUT)2 : Out2 terminal output source current
(set by RB2, ISO(OUT)2 = 40 mA maximum at RB2 = 820 Ω)
Du2
: Output2 duty ratio
ICC
: VCC terminal current (8.0 mA maximum where VCC = 2.4 V)
[2] Since the output 2 of the AN8017SA is assuming the bipolar transistor driving, it is necessary to pay attention to
the following points when an n-channel MOSFET is driven directly.
1. Select an n-channel MOSFET having a low input
capacitance
The AN8017SA is of the constant current (50 mA
maximum) output source current type circuit assuming the bipolar transistor driving. Also, its sink current capability is around 80 mA maximum. For those
reason, it is necessary to pay attention to the increase
of loss due to the extension of the output rise time and
the output fall time.
If any problem arises, there is a method to solve it
by amplifying with inverters as shown in figure 1.
SBD
VIN
VOUT
Pins 7,10
Out
Figure 1. Output boost circuit example
9
AN8017SA
Voltage Regulators
■ Usage Notes (continued)
2. Select an n-channel MOSFET having a low gate
SBD
VIN
threshold value
The high-level output voltage of out pin of the
AN8017SA is VCC − 1.0 V minimum, so that it is
necessary to select a low VT MOSFET having a sufficiently low on-state resistance in accordance with the
using operating supply voltage.
If a larger VGS is desired, there is a method to apply
the double-voltage of the input to the IC's VCC pin by
using the transformer as shown in figure 2.
VCC
VOUT
SBD
9
Pins 7,10
Out
VCC ≈ 2 × VIN − VD
Figure 2. Gate drive voltage increasing method
[3] In order to realize a low noise and high efficiency, care should be taken in the following points in designing the
board layout.
1. The wiring for ground line should be taken as wide as possible and grounded separately from the power system.
2. The input filter capacitor should be arranged in a place as close to VCC and GND pin as possible so as not to allow
switching noise to enter into the IC inside.
3. The wiring between the Out terminal and switching device (transistor or MOSFET) should be as short as possible
to obtain a clean switching waveform.
4. In wiring the detection resistor of the output voltage, the wiring for the low impedance side should be longer.
[4] There is a case in which this IC does not start charging to the S.C.P. capacitor when the output is short-circuited
due to the malfunction of U.V.L.O. circuit biased by VCC that has ripples generated by turning on and off of the
switching transistor. The allowable range of the VCC ripple is as shown in the following figure. Reduce the VCC ripple
by inserting a capacitor near the VCC terminal and GND terminal of this IC so that the VCC ripple is in this allowable
range. However, this allowable range is design reference value and not the guaranteed value.
VCC ripple allowable range
VCC ripple frequency (MHz)
100
10
2
Recommended
operating range
1
0.5
0.1
0
0.3
0.5
1
VCC ripple width (V[p-p])
10
1.5
Voltage Regulators
AN8017SA
■ Application Notes
[1] PD  Ta curves of SSOP016-P-0225A
PD  T a
700
Power dissipation PD (mW)
600
582
Glass epoxy board
(50 × 50 × t0.8 mm3)
Rth(j−a) = 171.8°C/W
500
400
Independent IC
without a heat sink
Rth(j−a) = 295.6°C/W
338
300
233
200
135
100
0
0
25
50
75 85
100
125
Ambient temperature Ta (°C)
[2] Main characteristics
VREF temperature characteristics
Frequency characteristics
1M
1.195
CT = 100 pF
fOUT (Hz)
VREF (V)
CT = 330 pF
1.190
100k
CT = 0.01 µF
1.185
−30
−10
10k
10
30
Ta (°C)
50
70
90
1k
10k
100k
RT (Ω)
11
AN8017SA
Voltage Regulators
■ Application Notes (continued)
[2] Main characteristics (continued)
ISO(OUT)  RB
ISI(OUT)  RB
70
90
80
60
VCC = 2.4 V
VCC = 14 V
VCC = 14 V
70
50
40
ISI(OUT) (mA)
ISO(OUT) (mA)
60
VCC = 7 V
30
VCC = 1.8 V
VCC = 2.4 V
50
VCC = 7 V
40
VCC = 1.8 V
30
20
20
10
10
1k
10k
0
100
100k
Du1  VDT1
Du2  VDT2
100
90
90
80
80
70
70
60
60
50
40
40
30
20
20
10
10
0.4
0.5
0.6
0.7
0
0.2
0.8
100k
50
30
0.3
10k
RB (Ω)
100
0
0.2
1k
RB (Ω)
Du2 (%)
Du1 (%)
0
100
VDT1 (V)
0.3
0.4
0.5
0.6
0.7
0.8
VDT2 (V)
ICC(OFF)  VCC
ICC(OFF)  RB
9
20
8
18
16
7
14
ICC(OFF) (mA)
ICC(OFF) (mA)
6
5
4
3
10
8
6
2
4
1
2
0
0
0
2
4
6
8
VCC (V)
12
12
10
12
14
100
1k
RB (Ω)
10k
Voltage Regulators
AN8017SA
■ Application Notes (continued)
[3] Timing chart
VCC terminal
voltage waveform
1.6 V
1.22 V
Output short-circuit
S.C.P. terminal
voltage waveform
FB1
Channel 1
OSC
DT1
Out1 terminal
voltage waveform
Channel 2
FB2
OSC
DT2
Out2 terminal
voltage waveform
13
AN8017SA
Voltage Regulators
■ Application Notes (continued)
[4] Function descriptions
1. Reference voltage block
This block is composed of the band gap circuit, and outputs the temperature compensated 1.19 V reference
voltage. The reference voltage is stabilized when the supply voltage is 1.8 V or more. The reference voltage is also
used as the reference voltage for the error amplifier 1 block and the error amplifier 2 block.
2. Triangular wave oscillation block
The sawthooth-waveform-like triangular wave
having a peak of approximately 0.7 V and a trough of
approximately 0.2 V can be generated by connecting
the timing capacitor and resistor to the OSC terminal
(pin 1). The oscillation frequency can be freely set by
the value of CT and RT to be connected externally. The
usable oscillation frequency is from 20 kHz to the
maximum 1 MHz. The triangular wave is connected
with the inverting input of PWM comparator for
channel 1 side and the noninverting input of PWM
comparator for channel 2 side within the IC inside.
And refer to the experimentally determined graph of
the frequency characteristics provided in the main
characteristics section.
3. Error amplifier 1 block
The output voltage of DC-DC converter is detected by the NPN-transistor-input type error amplifier and the amplified signal is input to the PWM
comparator. The internal reference voltage 1.19 V is
given to the noninverting input.
Also, it is possible to perform the gain setting and
the phase compensation arbitrarily by connecting a
resistor and a capacitor from the FB1 terminal (pin 4)
to GND in series.
The output voltage VOUT1 can be set by making
connection as shown in figure 2.
4. Error amplifier 2 block
The output voltage of DC-DC converter is detected by the NPN-transistor-input type error-amplifier and the amplified signal is input to the PWM
comparator. The internal reference voltage 1.19 V is
given to the noninverting input.
Also, it is possible to perform the gain setting and
the phase compensation arbitrarily by connecting a
resistor and a capacitor from the FB2 terminal (pin
13) to GND in series.
The output voltage VOUT2 can be set by making
connection as shown in figure 3.
14
VOSCH ≈ 0.75 V
VOSCL ≈ 0.2 V
t1
Quick
charging
t2
Discharging
T
Figure 1. Tiangular wave oscillation waveform
VOUT1
R1
FB1 4
IN−1 3
Error amplifier 1
block
R2
1.19 V
VOUT1 = 1.19 ×
To PWM
comparator input
R1 + R2
R2
Figure 2. Connection method of error ampifier 1 block
(Step-up output)
VOUT2
R1
R2
FB2 13
IN+2 14
Error amplifier 2
block
1.19 V
VOUT2 = 1.19 ×
To PWM
comparator input
R1 + R2
R2
Figure 3. Connection method of error ampifier 2 block
(Step-up output)
Voltage Regulators
AN8017SA
■ Application Notes (continued)
[4] Function descriptions (continued)
5. Timer latch short-circuit protection circuit
This circuit protects the external main switching devices, flywheel diodes, and choke coils, etc. from
destruction or deterioration if overload or short-circuit condition of power supply output lasts for a certain time.
The timer latch short-circuit protection circuit detects the output level of the error amplifier. When the output
voltage of DC-DC converter drops and the output level of error amplifier 1 block exceeds 0.9 V or the output level
of error amplifier 2 block exceeds 0.22 V, the low-level output is given and the timer circuit is actuated to start the
charge of the external protection-enable capacitor.
If the output of the error amplifier does not return to a normal voltage range by the time when the voltage of
this capacitor reaches 1.22 V, it sets the latch circuit, and cuts off the output drive transistor, and sets the dead-time
to 100%.
6. Low input voltage malfunction prevention circuit (U.V.L.O.)
This circuit protects the system from destruction or deterioration due to control malfunction when the supply
voltage is low in the transient state of power on/off.
The low input voltage malfunction prevention circuit detects the internal reference voltage which changes
according to the supply voltage level. Until the supply voltage reaches 1.67 V during its rise time, it cuts off the
output drive transistor, and sets the dead-time to 100%. At the same time, it holds the S.C.P. terminal (pin 2) and
DT1 terminal (pin 5) to low-level and the OSC terminal (pin 1) and DT2 terminal (pin 12) to high-level.
7. PWM comparator block
The PWM comparator controls the on-period of the output pulse according to the input voltage. The PWM1
and PWM2 block are reverse logic relation.
The PWM1 block turns on the output transistor during the period when the triangular wave of OSC terminal
(pin 1) is lower than any lower one of the FB1 (pin 4) terminal voltage and the DT1 (pin 5) terminal voltage.
The PWM2 block turns on the output transistor during the period when the triangular wave of OSC terminal
(pin 1) is higher than any higher one of the FB2 (pin 13) terminal voltage and the DT2 (pin 12) terminal voltage.
The maximum duty ratio is variable from the outside.
Also, the soft start which gradually extends on-period of the output pulse is activated by connecting a capacitor
in parallel with the resistor-dividing for the maximum duty ratio setting.
8. Unlatch block
The unlatch circuit 1 block fixes the FB1 terminal (pin 4) at low-level at the DT1 terminal (pin 5) is 0.20 V or
less. The unlatch circuit 2 block fixes the FB2 terminal (pin 13) at high-level at the DT2 terminal (pin 12) is 0.9
V or less. Consequently, by controlling the DT terminal voltage, it is possible to operate only one channel or to
start and stop each channel in any required sequence.
9. Output 1 block
This block uses a totem pole type output circuit. By connecting the current setting resistor to the RB1 terminal,
it is possible to arbitrarily set a constant-current source-output having a small fluctuation with the supply voltage.
The available constant-current source-output is up to 50 mA. The breakdown voltage of output terminal is 15 V.
10. Output 2 block
This block uses a totem pole type output circuit. By connecting the current setting resistor to the RB2 terminal,
it is possible to arbitrarily set a constant-current source-output having a small fluctuation with the supply voltage.
The available constant-current source-output is up to 50 mA. The breakdown voltage of output terminal is 15 V.
15
AN8017SA
Voltage Regulators
■ Application Notes (continued)
[5] About logic of PWM block
The logic for channel 1 and channel 2 of this IC is reversed. Thereby an input current flatness is realized. At the
same time, noise can be suppressed to a lower level by staggering the turn on timing.
The PWM1 block turns on the output transistor during the period when the triangular wave of the OSC terminal
(pin 1) is lower than both of the FB1 (pin 4) terminal voltage and the DT1 (pin 5) terminal voltage.
The PWM2 block turns on the output transistor during the period when the triangular wave of the OSC terminal
(pin 1) is higher than both of the FB2 (pin 13) terminal voltage and the DT2 (pin 12) terminal voltage.
(Refer to figure 4.)
OSC
FB1
DT1 and DT2
are omitted.
FB2
Out1
(totem pole output)
Out2
(totem pole output)
Channel 1
Switching transistor
collector current IC1
Channel 2
Switching transistor
collector current IC2
IC1 + IC2
SBD
+
10 Out2
VIN
IC2
Out1 7
SBD
+
IC1
Figure 4. PWM logic explanation chart
16
Voltage Regulators
AN8017SA
■ Application Notes (continued)
[6] Time constant setting method for timer latch short-circuit protection circuit
The constructional block diagram of protection latch circuit is shown in figure 6. The comparator for short-circuit
protection compares the error amplifier 1 output FB1 with the reference voltage of 0.9 V for channel 1 side, and the
error amplifier 2 output FB2 with the reference voltage of 0.18 V for channel 2 side at all the time.
When the load conditions of DC-DC converter output is stabilized, there is no fluctuation of error amplifier output
and the short-circuit protection comparator also keeps the balance. At this moment, the output transistor Q1 is in the
conductive state and the S.C.P. terminal is held to approximately 60 mV.
When the load conditions for channel 1 side suddenly change and high-level signal (0.9 V or more) is input from
the error amplifier 1 block to the short-circuit protection comparator, the short-circuit protection comparator outputs
the low-level signal to cut off the output transistor Q1. Also, when the load conditions for channel 2 side suddenly
change and low-level signal (0.22 V or less) is inputted from the error amplifier 2 block to the short-circuit protection
comparator, the short-circuit protection comparator outputs the low-level signal to cut off the output transistor Q1.
The capacitor CSCP connected to the S.C.P. terminal starts charging. When the external capacitor CSCP has been charged
to approximately 1.19 V with the constant current of approximately 1.1 µA, the latch circuit is set, the output terminal
is fixed to low-level, and the dead-time is set to 100%. Once the latch circuit is set, the S.C.P. terminal is discharged
to approximately 40 mV. However, the latch circuit is not reset unless the power for the latch circuit is turned off or
restarted by the on/off control.
tPE
VSCP [V]
1.19 V = ICHG ×
CSCP
∴ tPE [s] = 1.08 × CSCP
1.22
When the power supply is turned on, the output is
considered to be short-circuited state so that the S.C.P.
terminal voltage starts charging. It is necessary to set the
external capacitor so as to start up the DC-DC converter
output voltage before setting the latch circuit in the later
stage. Especially, pay attention to the delay of the start-up
time when applying the soft-start.
IN−1
FB2
IN+2
3
13
14
0.06
t [s]
Figure 5. S.C.P. terminal charging waveform
On/off
control
Internal reference
U.V.L.O.
Error amp.1
1.1 µA
1.22 V
0.9 V
Q
Output cut-off
High-level detection comp.
1.19 V
Error amp.2
1.22 V
0.18 V
Latch
R
S
S.C.P.
comp.
Q1
S.C.P. 2
FB1
4
Short-circuit detection time tPE
Figure 6. Short-circuit protection circuit
17
AN8017SA
Voltage Regulators
■ Application Notes (continued)
[7] Parallel synchronous operation of multiple ICs
Multiple instances of this IC can be operated in parallel. If the OSC terminals (pin 1) and Off terminals (pin 15) are
connected to each other as shown in figure 7, the ICs will operate at the same frequency.
It is possible to operate this IC (the AN8017SA) with the two-channel 1.8-volt DC-DC converter control IC
AN8018SA (open-collector output/each single-channel totem pole output) in parallel synchronous mode.
1. Usage notes
1) The parallel synchronous operation with the single-channel 1.8-volt DC-DC converter control IC AN8016SH/
AN8016NSH is not possible.
2) The remote on/off with the single IC itself is not possible. Only the simultaneous remote on/off of all ICs is
possible.
H
L
9 VCC
Out2
10
11 RB2
DT2
12
13 FB2
14
IN+2
Input
15 Off
16 VREF
0.1 µF
GND 8
7
Out1
RB1 6
5
DT1
FB1 4
3
IN−1
S.C.P. 2
OSC 1
Off terminals
connected together
9 VCC
Out2
10
11 RB2
DT2
12
13 FB2
IN+2
14
15 Off
16 VREF
0.1 µF
Figure 7. Slave operation circuit example
18
GND 8
7
Out1
RB1 6
5
DT1
FB1 4
3
IN−1
S.C.P. 2
OSC 1
OSC terminals
connected together
Voltage Regulators
AN8017SA
■ Application Notes (continued)
[7] Parallel synchronous operation of multiple ICs (continued)
16
2. About the operation of short-circuit protection at parallel synchronous operation
In the case of the operation in parallel, if the single output (or multiple outputs) of them is short-circuited and
the timer latch is applied to the IC which has that output, the output of other ICs will be also shut down.
In figure 8, if the timer latch is applied to IC-2, Q1 turns on and the OSC terminal (pin 1) is raised to
approximately 1.1 V. Then channel 1 of IC-1 logically turns off, and then for channel 2, the output of comparator
whose reference voltage is 0.9 V becomes high-voltage and Out2 is forced to go off. The same goes with the case
when the timer latch is applied to IC-1.
Channel 2 goes off
at high
IC-1
0.9 V
16
1
Oscillator high-level
detection comparator
IC-2
When short-circuit protection
function is actuated to apply latch,
Q1 turns on and,
VOSC = VREF − VCE(sat)
becomes approximately 1.1 V
1
Q1
IC-2 side output
short-circuited
IC-2 latch
IC-1 latch
1.19 V
S.C.P.
Since the OSC terminal voltage
becomes higher than
the DT1 terminal voltage,
the Out1 becomes fully off state.
OSC
DT1
FB1
Out1
OSC
FB2
DT2
Forced to be in off state
inside the IC
Out2
1.19 V
S.C.P.
Figure 8. Operation of short-circuit protection at parallel synchronous operation
19
AN8017SA
Voltage Regulators
■ Application Notes (continued)
[8] Setting of Off-terminal connection resistor
The start circuit starts its operation when Q1 is turned on. In an organization in which Q1 turns off/on when Q2
turns on/off in figure 9, the input voltage VIN at which the start circuit operates is obtained by the equation:
VIN = VBEQ1 × (ROFF + R1 + R2) / R2
ROFF
Therefore, ROFF can be set by:
Off 15
ROFF = R2 · VIN / VBEQ1 − R1 − R2
Start circuit
Also, in case of limiting the Off terminal current by ROFF ,
R1
set it by the above equation. However, take the values as:
30 kΩ
Q2
Q1
VBEQ1 = 0.7 V (T = 25°C)
R2
VBEQ1 fluctuation with temperature: −2 mV/°C
60 kΩ
Temperature coefficient of R1 and R2: +6 000 PPM/°C
Figure 9. Off terminal peripheral circuit
[9] Sequential operation
It is possible to turn on/off the output of DC-DC converter individually by turning on/off Q1 and Q2 as shown in
figure 10. However, pay particular attention to the current flowing into the VREF terminal when Q2 is turned off since
sink capability of VREF terminal is approximately 100 µA.
10 Out2
9 VCC
Out1 7
GND 8
11 RB2
Unlatch2
0.9 V
12 DT2
Q2
13 FB2
16 VREF
0.1 µF
0.9 V
Unlatch1
RB1 6
DT1 5
1.19 V
FB1 4
0.2 V
V2
Control block
Q1
Figure 10
20
V1
Voltage Regulators
AN8017SA
■ Application Notes (continued)
[9] About sequence operation (continued)
V1
V2
DT1
Out1
DT2
Out2
Out1 operation
Out2 operation
Out1: Off at DT1 < 0.2 V
Out2: Off at DT2 > 0.9 V
Operation when each channel is turned on/off independently
[10] Error amplifier phase-compensation setting method
The equivalent circuit of error amplifier is shown in figure 11.
The transfer function is:
H=
1 / {S (CE1 + CO1)}
1
=
RE1 + 1 / {S (CE1 + CO1)}
SCO1 · RE1 + 1
(from CE1 << CO1)
The cut-off frequency is variable by changing the externally attached phase compensation capacitor CO1 .
Adjust by inserting a resistor RO1 between the FB1 terminal and CO1 in series as shown in figure 12 when it is
required to have a gain on the high frequency side or desired to lead a phase.
The transfer function is:
SCO1 · RO1 + 1
SCO1 (RO1 + RE1) + 1 (from CE1 << CO1)
IN−1
RE1
1 MΩ
To PWM
57dB
CE1
5 pF
RE1
1 MΩ
CO1
To PWM
57dB
1.19 V
FB1
1.19 V
IN−1
CE1
5 pF
FB1
H=
RO1
CO1
Figure 11. Error amplifier equivalent circuit
Figure 12. Error amplifier equivalent circuit (RO1 inserted)
21
AN8017SA
Voltage Regulators
■ AC Analysis Result
• Simulation circuit
IN−1
FB1
AC
1.19 V
RO1
CO1
f  VPh
f  VPh
180
180
RO1 = 10 kΩ
160
160
1 kΩ
140
100 Ω
10 Ω
1Ω
100
80
100 Ω
10 Ω
100
80
1Ω
60
60
1 kΩ
120
VPh ( ° )
VPh ( ° )
120
RO1 = 10 kΩ
140
CO1 = 1 000 pF
CO1 = 0.01 µF
40
40
20
20
0
0
1
10
100
1k
10k
100k
1M
1
10M 100M
10
100
1k
10k
100k
f (Hz)
f (Hz)
f  VBD
f  VBD
60
CO1 = 1 000 pF
40
40
RO1 = 10 kΩ
RO1 = 10 kΩ
20
20
1 kΩ
0
VBD (dB)
VDB (dB)
10M 100M
60
CO1 = 0.01 µF
100 Ω
−20
1 kΩ
0
100 Ω
−20
10 Ω
−40
10 Ω
−40
1Ω
−60
−80
1
10
100
1k
10k
f (Hz)
22
1M
100k
1M
10M 100M
1Ω
−60
−80
1
10
100
1k
10k
f (Hz)
100k
1M
10M 100M
Voltage Regulators
AN8017SA
■ AC Analysis Result (continued)
f  Phase
f  Phase
180
180
RO1 = 0
160
160
RO1 = 10 kΩ
0.001 µF
140
120
0.1µF
100
CO1 = 1 µF
80
1 kΩ
120
Phase ( ° )
Phase ( ° )
140
0.01
µF
100 Ω
10 Ω
1Ω
100
80
60
60
40
40
20
20
CO1 = 0.1 µF
0
0
1
10
100
1k
10k
100k
1M
1
10M 100M
10
100
1k
10k
100k
1M
f  Gain
f  Gain
60
60
CO1 = 0.1 µF
RO1 = 0
40
40
RO1 = 10 kΩ
0.001 µF
CO1 = 1 µF
0
20
0.01
0.1 µF
µF
Gain (dB)
20
Gain (dB)
10M 100M
f (Hz)
f (Hz)
−20
1 kΩ
0
100 Ω
−20
−40
−40
−60
−60
10 Ω
1Ω
−80
−80
1
10
100
1k
10k
f (Hz)
100k
1M
10M 100M
1
10
100
1k
10k
100k
1M
10M 100M
f (Hz)
23
AN8017SA
Voltage Regulators
■ Application Circuit Examples
• Application circuit example 1
Input
R10
C11
R9
L2
SBD2
C10
Output2
+
C8
R12
Q2
C7
R8
C9
11 RB2
10 Out2
9 VCC
RB1 6
Out1 7
GND 8
RB2
12 DT2
13 FB2
15 Off
16 VREF
14 IN+2
CTL
C6
R13
−
C1
R1
DT1 5
FB1 4
IN−1 3
S.C.P. 2
OSC 1
AN8017SA
R2
C3
C2
L1
SBD1
R5
R6
Q1
R3
R4
• Evaluation board
VIN
R11
R9
Q2
C7
R8
C8
R13
R12
On
SW1
Off
R10
SBO2
GND
C11
L2
C6
L1
C10
Q1
SBO1
C5
C4
24
C2
VO1
R5
C5
R7
−
C4
AN8017SA
VO2
Output1
+
R4 R3 R2
C3
R6 R7
C1
R1
Voltage Regulators
AN8017SA
■ Application Circuit Examples (continued)
• Application circuit example 2 (Circuit using the AN8017SA/AN8018SA)
Input voltage range: 1.8 V to 3.2 V
Oscillation frequency: 450 kHz
22 kΩ
68 kΩ
10 µH
MA2Q738
(MA738*)
0.1 µF
0.1 µF
Input 1.8 V to 3.2 V
5 V (STBY)
300 mA
(max.)
9 VCC
12 DT2
11 RB2
10 Out2
820 Ω
10 kΩ
13 FB2
14 IN+2
15 Off
16 VREF
0.1 µF
12 kΩ
10 µF
10 kΩ
5.1 kΩ
GND 8
Out1 7
DT1 6
FB1 5
IN+1 3
S.C.P. 2
OSC 1
IN−1 4
AN8018SA
1.19 V
−10 V
MA2Q738 10 mA
(MA738*)
(max.)
2SB1440
300 Ω
0.1 µF
68 µH 10 µF
330 pF
68 kΩ
75 kΩ
1.5 kΩ
22 kΩ
47 kΩ
0.1 µF
75 kΩ
68 kΩ
1.19 V
39 kΩ
2SD0874
(2SD874*)
22 kΩ
0.1 µF
0.1 µF
MA2Q738
10 µH (MA738*)
5V
140 mA
(max.)
9 VCC
10 Out2
11 RB2
12 DT2
13 FB2
14 IN+2
820 Ω
10 kΩ
51 kΩ
2SD0602
(2SD602*)
15 kΩ
10 µF
10 kΩ
0.1 µF
820 Ω
GND 8
Out1 7
RB1 6
DT1 5
FB1 4
IN−1 3
S.C.P. 2
AN8017SA
OSC 1
Remote on/off
control pin
−10 V, 5 V, 18 V
stop with high-level
input.
15 Off
16 VREF
0.1 µF
MA2Q738
18 µH (MA738 *)
18 V
35 mA
(max.)
56 kΩ
2SD0602
(2SD602*)
10 µF
3.9 kΩ
56 kΩ
68 kΩ
0.1 µF
Note) *: Former part number
25