ETC BUX48/D

ON Semiconductor
BUX48
BUX48A
SWITCHMODE II Series
NPN Silicon Power Transistors
The BUX 48/BUX 48A transistors are designed for high–voltage,
high–speed, power switching in inductive circuits where fall time is
critical. They are particularly suited for line–operated
SWITCHMODE applications such as:
•
•
•
•
•
15 AMPERES
NPN SILICON
POWER TRANSISTORS
400 AND 450 VOLTS
V(BR)CEO
850–1000 VOLTS
V(BR)CEX
175 WATTS
Switching Regulators
Inverters
Solenoid and Relay Drivers
Motor Controls
Deflection Circuits
• Fast Turn–Off Times
•
•
60 ns Inductive Fall Time — 25C (Typ)
120 ns Inductive Crossover Time — 25C (Typ)
Operating Temperature Range –65 to +200C
100C Performance Specified for:
Reverse–Biased SOA with Inductive Loads
Switching Times with Inductive Loads
Saturation Voltage
Leakage Currents (125C)
CASE 1–07
TO–204AA
(TO–3)
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MAXIMUM RATINGS
Rating
Collector–Emitter Voltage
Collector–Emitter Voltage (VBE = – 1.5 V)
Symbol
BUX48
BUX48A
Unit
VCEO(sus)
400
450
Vdc
VCEX
850
1000
Vdc
Emitter Base Voltage
VEB
7
Vdc
Collector Current — Continuous
— Peak (1)
— Overload
IC
ICM
IOI
15
30
60
Adc
Base Current — Continuous
— Peak (1)
IB
IBM
5
20
Adc
Total Power Dissipation — TC = 25C
— TC = 100C
Derate above 25C
PD
175
100
1
Watts
TJ, Tstg
–65 to +200
C
Symbol
Max
Unit
RθJC
1
C/W
TL
275
C
Operating and Storage Junction Temperature Range
W/C
THERMAL CHARACTERISTICS
Characteristic
Thermal Resistance, Junction to Case
Maximum Lead Temperature for Soldering Purposes:
1/8″ from Case for 5 Seconds
(1) Pulse Test: Pulse Width = 5 ms, Duty Cycle 10%.
 Semiconductor Components Industries, LLC, 2001
March, 2001 – Rev. 9
1
Publication Order Number:
BUX48/D
BUX48 BUX48A
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ELECTRICAL CHARACTERISTICS (TC = 25C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
400
450
—
—
—
—
—
—
—
—
0.2
2
—
—
—
—
0.5
3
IEBO
—
—
0.1
mAdc
V(BR)EBO
7
—
—
Vdc
OFF CHARACTERISTICS (1)
Collector–Emitter Sustaining Voltage (Table 1)
(IC = 200 mA, IB = 0) L = 25 mH
VCEO(sus)
BUX48
BUX48A
Collector Cutoff Current
(VCEX = Rated Value, VBE(off) = 1.5 Vdc)
(VCEX = Rated Value, VBE(off) = 1.5 Vdc, TC = 125C)
Vdc
ICEX
Collector Cutoff Current
(VCE = Rated VCEX, RBE = 10 Ω)
mAdc
ICER
TC = 25C
TC = 125C
Emitter Cutoff Current
(VEB = 5 Vdc, IC = 0)
Emitter–Base Breakdown Voltage
(IE = 50 mA – IC = 0)
mAdc
SECOND BREAKDOWN
Second Breakdown Collector Current with Base Forward Biased
Clamped Inductive SOA with Base Reverse Biased
IS/b
See Figure 12
RBSOA
See Figure 13
ON CHARACTERISTICS (1)
DC Current Gain
(IC = 10 Adc, VCE = 5 Vdc)
(IC = 8 Adc, VCE = 5 Vdc)
hFE
BUX48
BUX48A
Collector–Emitter Saturation Voltage
(IC = 10 Adc, IB = 2 Adc)
(IC = 15 Adc, IB = 3 Adc)
(IC = 10 Adc, IB = 2 Adc, TC = 100C)
(IC = 8 Adc, IB = 1.6 Adc)
(IC = 12 Adc, IB = 2.4 Adc)
(IC = 8 Adc, IB = 1.6 Adc, TC = 100C)
8
8
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
1.5
5
2
1.5
5
2
—
—
—
—
—
—
—
—
1.6
1.6
1.6
1.6
Cob
—
—
350
pF
td
—
0.1
0.2
µs
tr
—
0.4
0.7
ts
—
1.3
2
tf
—
0.2
0.4
tsv
—
1.3
—
tfi
—
0.06
—
tsv
—
1.5
2.5
tc
—
0.3
0.6
tfi
—
0.17
0.35
VCE(sat)
BUX48
BUX48A
Base–Emitter Saturation Voltage
(IC = 10 Adc, IB = 2 Adc)
(IC = 10 Adc, IB = 2 Adc, TC = 100C)
(IC = 8 Adc, IB = 1.6 Adc)
(IC = 8 Adc, IB = 1.6 Adc, TC = 100C)
Vdc
VBE(sat)
BUX48
BUX48A
Vdc
DYNAMIC CHARACTERISTICS
Output Capacitance
(VCB = 10 Vdc, IE = 0, ftest = 1 MHz)
SWITCHING CHARACTERISTICS Resistive Load (Table 1)
Delay Time
Rise Time
Storage Time
Fall Time
IC = 10 A
A, IB = 2 A
IC = 8 A, IB = 1.6 A
Duty Cycle = 2%, VBE(off) = 5 V
Tp = 30 µs,
µs VCC = 300 V
BUX48
BUX48A
Inductive Load, Clamped (Table 1)
Storage Time
Fall Time
Storage Time
Crossover Time
Fall Time
IC = 10 A
IB1 = 2 A
IC = 8 A
IB1 = 1.6 A
A
BUX48
BUX48
(TC = 25C)
((TC = 100C))
(1) Pulse Test: Pulse Width = 300 µs, Duty Cycle 2%.
Vcl = 300 V, VBE(off) = 5 V, Lc = 180µH
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2
µs
BUX48 BUX48A
50
90%
hFE, DC CURRENT GAIN
30
20
10%
10
7
5
3
2
VCE = 5 V
1
1
2
3
5
8 10
20
IC, COLLECTOR CURRENT (AMPS)
30
50
VCE , COLLECTOR-EMITTER VOLTAGE (VOLTS)
DC CHARACTERISTICS
10
5
3
IC = 5 A
1
0.7
0.5
0.3
0.2
0.1
1
2
0.5
0.3
0.1
0.1
3
5
7
10
TC = 25°C
0.3
0.5
1
IB, BASE CURRENT (AMPS)
2
20
30
50
TJ = 100°C
0.5
0.3
0.1
1
0.3
3
Figure 3. Collector–Emitter Saturation Voltage
Figure 4. Base–Emitter Voltage
Cib
TJ = 150°C
125°C
100°C
75°C
100
REVERSE
1k
Cob
100
FORWARD
TJ = 25°C
25°C
10-1
-0.4
10
10 k
VCE = 250 V
103
101
4
TJ = 25°C
1
0.7
IC, COLLECTOR CURRENT (AMPS)
102
3
2
IC, COLLECTOR CURRENT (AMPS)
104
IC, COLLECTOR CURRENT (A)
µ
VBE, BASE-EMITTER VOLTAGE (VOLTS)
10%
C, CAPACITANCE (pF)
VCE , COLLECTOR-EMITTER VOLTAGE (VOLTS)
90%
2
15 A
Figure 2. Collector Saturation Region
βf = 5
3
10 A
1
Figure 1. DC Current Gain
5
7.5 A
-0.2
0
0.2
0.4
VBE, BASE-EMITTER VOLTAGE (VOLTS)
10
0.6
1
100
10
VR, REVERSE VOLTAGE (VOLTS)
Figure 6. Capacitance
Figure 5. Collector Cutoff Region
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3
1000
BUX48 BUX48A
Table 1. Test Conditions for Dynamic Performance
INPUT
CONDITIONS
VCEO(sus)
+10 V
RBSOA AND INDUCTIVE SWITCHING
1
20
220
MM3735
TUT
SEE ABOVE FOR
DETAILED CONDITIONS
IC(pk)
t1
VCC
tf
Lcoil (IC
RL
1
2
)
pk
VCC
VClamp
Test Equipment
Scope — Tektronix
475 or Equivalent
t
t2
TUT
)
pk
VCC
10
IB2(pk) , BASE CURRENT (AMPS)
90% IC(pk)
trv
tfi
10% VCE(pk)
90% IB1
t2 ≈
Vclamp
tti
tc
IB
Lcoil (IC
t
VCE(pk)
90% VCE(pk)
VCE
t1 ≈
VCE
VCE or
IC pk
tsv
VCC = 300 V
RL = 83 Ω
Pulse Width = 10 µs
RESISTIVE TEST CIRCUIT
tf Clamped
TIME
IC
VCC
IC
RS =
0.1 Ω
2
0.22 µF
TURN–OFF TIME
Use inductive switching
driver as the input to
the resistive test circuit.
t1 Adjusted to
Obtain IC
Lcoil
Vclamp
MR854
2N6339
OUTPUT WAVEFORMS
Rcoil
1N4937
OR
EQUIVALENT
D3
IB1 adjusted to
obtain the forced
hFE desired
Vclamp = 300 V
RB ADJUSTED TO ATTAIN DESIRED IB1
INDUCTIVE TEST CIRCUIT
INPUT
D4
33
2W
Lcoil = 180 µH
Rcoil = 0.05 Ω
VCC = 20 V
Ib2 ADJUST
dTb ADJUST
160
2
IB1
Ib1 ADJUST
0.1 µF
22
2N3763
100
680 pF
1
22
680 pF
PULSES
δ = 3%
TURN–ON TIME
MR854
D1D2D3D4 1N4934
Lcoil = 25 mH, VCC = 10 V
Rcoil = 0.7 Ω
1
+10 V
2N6438
D3
680 pF
PW Varied to Attain
IC = 200 mA
TEST CIRCUITS
160
0
2
CIRCUIT
VALUES
100
22 µF
D1
33
2W
RESISTIVE SWITCHING
10%
IC pk
2% IC
6
4
2
0
TIME
βf = 5
IC = 10 A
8
0
1
2
3
4
5
VBE(off), BASE-EMITTER VOLTAGE (VOLTS)
Figure 7. Inductive Switching Measurements
Figure 8. Peak–Reverse Current
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4
6
BUX48 BUX48A
SWITCHING TIMES NOTE
In resistive switching circuits, rise, fall, and storage times
have been defined and apply to both current and voltage
waveforms since they are in phase. However, for inductive
loads which are common to SWITCHMODE power
supplies and hammer drivers, current and voltage
waveforms are not in phase. Therefore, separate
measurements must be made on each waveform to
determine the total switching time. For this reason, the
following new terms have been defined.
For the designer, there is minimal switching loss during
storage time and the predominant switching power losses
occur during the crossover interval and can be obtained
using the standard equation from AN–222:
PSWT = 1/2 VCCIC(tc)f
In general, trv + tfi tc. However, at lower test currents
this relationship may not be valid.
As is common with most switching transistors, resistive
switching is specified at 25C and has become a benchmark
for designers. However, for designers of high frequency
converter circuits, the user oriented specifications which
make this a “SWITCHMODE” transistor are the inductive
switching speeds (tc and tsv) which are guaranteed at 100C.
tsv = Voltage Storage Time, 90% IB1 to 10% Vclamp
trv = Voltage Rise Time, 10–90% Vclamp
tfi = Current Fall Time, 90–10% IC
tti = Current Tail, 10–2% IC
tc = Crossover Time, 10% Vclamp to 10% IC
An enlarged portion of the inductive switching
waveforms is shown in Figure 7 to aid in the visual identity
of these terms.
INDUCTIVE SWITCHING
1
5
3
0.5
t, TIME (s)
µ
TC = 25°C
1
0.7
0.5
0.3
TC = 100°C
TC = 25°C
0.2
0.1
TC = 25°C
0.05
tc
tfi
0.03
0.2
0.02
βf = 5
0.1
TC = 100°C
0.3
TC = 100°C
1
10
20
3
5
7
IC, COLLECTOR CURRENT (AMPS)
2
0.01
50
30
βf = 5
1
2
Figure 9. Storage Time, tsv
3
2
3
2
tsv
1
1
0.5
0.5
0.3
0.2
tc
0.1
tfi
0.05
TC = 25°C
IC = 10 A
VBE(off) = 5 V
0
1
2
3
6
4
5
βf, FORCED GAIN
7
30
50
8
9
TC = 25°C
IC = 10 A
βf = 5
tsv
0.3
0.2
tc
0.1
tfi
0.05
0.03
0.02
0.01
3
5
7
10
20
IC, COLLECTOR CURRENT (AMPS)
Figure 10. Crossover and Fall Times
t, TIME (s)
µ
t, TIME (s)
µ
2
0.03
0.02
0.01
10
0
Figure 11. Turn–Off Times versus Forced Gain
1
2
3
4
5
Ib2/Ib1
6
7
8
9
Figure 12. Turn–Off Times versus Ib2/Ib1
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5
10
BUX48 BUX48A
IC, COLLECTOR CURRENT (AMPS)
The Safe Operating Area figures shown in Figures 12 and 13
are specified for these devices under the test conditions
shown.
30
SAFE OPERATING AREA INFORMATION
FORWARD BIAS
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate IC – VCE
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
The data of Figure 13 is based on TC = 25C; TJ(pk) is
variable depending on power level. Second breakdown
pulse limits are valid for duty cycles to 10% but must be
derated when TC 25C. Second breakdown limitations do
not derate the same as thermal limitations. Allowable
current at the voltages shown on Figure 13 may be found at
any case temperature by using the appropriate curve on
Figure 15.
TJ(pk) may be calculated from the data in Figure 13. At
high case temperatures, thermal limitations will reduce the
power that can be handled to values less than the limitations
imposed by second breakdown.
10
5
1 ms
DC
2
1
0.5
0.2
TC = 25°C
0.1
LIMIT ONLY
FOR TURN ON
tr ≤ 0.7 µs
0.05
0.02
0.01
1
2
5
10
20
50
100 200
500 1000
VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)
Figure 13. Forward Bias Safe Operating Area
REVERSE BIAS
40
30
BUX48
20
VBE(off) = 5 V
10
0
For inductive loads, high voltage and high current must be
sustained simultaneously during turn–off, in most cases,
with the base to emitter junction reverse biased. Under these
conditions the collector voltage must be held to a safe level
at or below a specific value of collector current. This can be
accomplished by several means such as active clamping, RC
snubbing, load line shaping, etc. The safe level for these
devices is specified as Reverse Bias Safe Operating Area
and represents the voltage–current conditions during
reverse biased turn–off. This rating is verified under
clamped conditions so that the device is never subjected to
an avalanche mode. Figure 14 gives RBSOA characteristics.
BUX48A
TC = 100°C
IC/IB1 ≥ 5
0
200
400
600
800
VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)
1000
Figure 14. Reverse Bias Safe Operating Area
100
POWER DERATING FACTOR (%)
IC, COLLECTOR CURRENT (AMPS)
50
SECOND BREAKDOWN
DERATING
80
60
THERMAL
DERATING
40
20
0
0
40
80
120
TC, CASE TEMPERATURE (°C)
160
Figure 15. Power Derating
http://onsemi.com
6
200
BUX48 BUX48A
r(t), EFFECTIVE TRANSIENT THERMAL
RESISTANCE (NORMALIZED)
1
0.5
D = 0.5
0.2
0.2
0.1
0.1
0.05
0.05
0.02
0.01
SINGLE PULSE
0.02
0.01
0.02
RθJC(t) = r(t) RθJC
θJC = 1°C/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) - TC = P(pk) RθJC(t)
0.05
0.1
0.2
1
0.5
2
5
10
t, TIME (ms)
20
50
P(pk)
t1
t2
SINGLE
PULSE
DUTY CYCLE, D = t1/t2
100
200
500
1000
2000
Figure 16. Thermal Response
OVERLOAD CHARACTERISTICS
IC, COLLECTOR CURRENT (AMPS)
100
OLSOA
TC = 25°C
OLSOA applies when maximum collector current is
limited and known. A good example is a circuit where an
inductor is inserted between the transistor and the bus, which
limits the rate of rise of collector current to a known value.
If the transistor is then turned off within a specified amount
of time, the magnitude of collector current is also known.
Maximum allowable collector–emitter voltage versus
collector current is plotted for several pulse widths. (Pulse
width is defined as the time lag between the fault condition
and the removal of base drive.) Storage time of the transistor
has been factored into the curve. Therefore, with bus voltage
and maximum collector current known, Figure 17 defines
the maximum time which can be allowed for fault detection
and shutdown of base drive.
OLSOA is measured in a common–base circuit (Figure
19) which allows precise definition of collector–emitter
voltage and collector current. This is the same circuit that is
used to measure forward–bias safe operating area.
80
BUX48A
60
tp = 10 µs
40
BUX48
20
100
300
400 450
200
VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)
0
500
Figure 17. Rated Overload Safe Operating Area
(OLSOA)
5
IC (AMP)
4
3
RBE = 10 Ω
RBE = 100 Ω
500 µF
500 V
RBE = 2.2 Ω
2
1
VCC
Notes:
• VCE = VCC + VBE
• Adjust pulsed current source
for desired IC, tp
RBE = 0
0
2
4
6
dV/dt (KV/µs)
8
VEE
10
Figure 19. Overload SOA Test Circuit
Figure 18. IC = f(dV/dt)
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7
BUX48 BUX48A
PACKAGE DIMENSIONS
TO–204AA (TO–3)
CASE 1–07
ISSUE Z
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. ALL RULES AND NOTES ASSOCIATED WITH
REFERENCED TO-204AA OUTLINE SHALL APPLY.
A
N
C
–T–
E
D
K
2 PL
0.13 (0.005)
U
T Q
M
M
Y
DIM
A
B
C
D
E
G
H
K
L
N
Q
U
V
M
–Y–
L
V
SEATING
PLANE
2
H
G
B
M
T Y
1
–Q–
0.13 (0.005)
INCHES
MIN
MAX
1.550 REF
--1.050
0.250
0.335
0.038
0.043
0.055
0.070
0.430 BSC
0.215 BSC
0.440
0.480
0.665 BSC
--0.830
0.151
0.165
1.187 BSC
0.131
0.188
MILLIMETERS
MIN
MAX
39.37 REF
--26.67
6.35
8.51
0.97
1.09
1.40
1.77
10.92 BSC
5.46 BSC
11.18
12.19
16.89 BSC
--21.08
3.84
4.19
30.15 BSC
3.33
4.77
M
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8
BUX48/D