CED830G/CEU830G

CED830G/CEU830G
N-Channel Enhancement Mode Field Effect Transistor
PRELIMINARY
FEATURES
500V, 4.5A, RDS(ON) = 1.5Ω @VGS = 10V.
Super high dense cell design for extremely low RDS(ON).
High power and current handing capability.
Lead free product is acquired.
D
TO-251 & TO-252 package.
D
G
S
CEU SERIES
TO-252(D-PAK)
ABSOLUTE MAXIMUM RATINGS
Parameter
G
G
D
S
CED SERIES
TO-251(I-PAK)
Tc = 25 C unless otherwise noted
Symbol
Limit
500
Units
V
VGS
±30
V
ID
4.5
A
IDM
18
A
68
W
Drain-Source Voltage
VDS
Gate-Source Voltage
Drain Current-Continuous
Drain Current-Pulsed
S
a
Maximum Power Dissipation @ TC = 25 C
PD
- Derate above 25 C
0.54
W/ C
TJ,Tstg
-55 to 150
C
Symbol
Limit
Units
Thermal Resistance, Junction-to-Case
RθJC
2.2
C/W
Thermal Resistance, Junction-to-Ambient
RθJA
50
C/W
Operating and Store Temperature Range
Thermal Characteristics
Parameter
This is preliminary information on a new product in development now .
Details are subject to change without notice .
1
Rev 2. 2011.July
http://www.cetsemi.com
CED830G/CEU830G
Electrical Characteristics
Parameter
Tc = 25 C unless otherwise noted
Symbol
Test Condition
Min
Drain-Source Breakdown Voltage
BVDSS
VGS = 0V, ID = 250µA
500
Zero Gate Voltage Drain Current
IDSS
Gate Body Leakage Current, Forward
Gate Body Leakage Current, Reverse
Typ
Max
Units
VDS = 500V, VGS = 0V
1
µA
IGSSF
VGS = 30V, VDS = 0V
100
nA
IGSSR
VGS = -30V, VDS = 0V
-100
nA
4
V
1.5
Ω
Off Characteristics
V
On Characteristics b
Gate Threshold Voltage
Static Drain-Source
On-Resistance
Forward Transconductance
Dynamic Characteristics
VGS(th)
VGS = VDS, ID = 250µA
RDS(on)
VGS = 10V, ID = 2.5A
gFS
VDS = 50V, ID = 4A
2.5
1.2
7
S
595
pF
90
pF
20
pF
c
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
VDS = 25V, VGS = 0V,
f = 1.0 MHz
Switching Characteristics c
Turn-On Delay Time
td(on)
Turn-On Rise Time
tr
Turn-Off Delay Time
td(off)
VDD = 250V, ID = 4A,
VGS = 10V, RGEN = 14Ω
15
30
ns
14
28
ns
30
60
ns
Turn-Off Fall Time
tf
10
20
ns
Total Gate Charge
Qg
13
17
nC
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
VDS = 400V, ID = 4A,
VGS = 10V
2.5
nC
5
nC
Drain-Source Diode Characteristics and Maximun Ratings
Drain-Source Diode Forward Current
Drain-Source Diode Forward Voltage
IS f
4.5
A
VSD
VGS = 0V, IS = 3.1A
1.6
V
Reverse Recovry Time
Trr
ID = 5A, di/dt = 100A/us
429
ns
Reverse Recovry Charge
Qrr
ID = 5A, di/dt = 100A/us
1.3
nC
b
Notes :
a.Repetitive Rating : Pulse width limited by maximum junction temperature .
b.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2% .
c.Guaranteed by design, not subject to production testing.
d.Limited only by maximum temperature allowed .
e.Pulse width limited by safe operating area .
2
CED830G/CEU830G
12
VGS=10,9,8,7V
10
8
ID, Drain Current (A)
ID, Drain Current (A)
12
VGS=6V
6
4
VGS=4V
2
0
0
2
4
6
8
10
12
2
3
4
5
6
Figure 2. Transfer Characteristics
RDS(ON), Normalized
RDS(ON), On-Resistance(Ohms)
600
450
300
Coss
Crss
0
5
10
15
20
25
2.2
1.9
ID=2.5A
VGS=10V
1.6
1.3
1.0
0.7
0.4
-100
-50
0
50
100
150
200
VDS, Drain-to-Source Voltage (V)
TJ, Junction Temperature( C)
Figure 3. Capacitance
Figure 4. On-Resistance Variation
with Temperature
VDS=VGS
ID=250µA
1.1
1.0
0.9
0.8
0.7
0.6
-50
1
-55 C
Figure 1. Output Characteristics
IS, Source-drain current (A)
C, Capacitance (pF)
25 C
TJ=125C
VGS, Gate-to-Source Voltage (V)
150
VTH, Normalized
Gate-Source Threshold Voltage
4
VDS, Drain-to-Source Voltage (V)
Ciss
1.2
6
0
750
1.3
8
2
900
0
10
-25
0
25
50
75
100
125
150
VGS=0V
10
0
10
-1
10
-2
0.4
0.6
0.8
1.0
1.2
1.4
TJ, Junction Temperature( C)
VSD, Body Diode Forward Voltage (V)
Figure 5. Gate Threshold Variation
with Temperature
Figure 6. Body Diode Forward Voltage
Variation with Source Current
3
10
RDS(ON)Limit
VDS=400V
ID=4A
8
ID, Drain Current (A)
VGS, Gate to Source Voltage (V)
CED830G/CEU830G
6
4
2
0
0
3
6
9
12
100ms
10
1ms
10ms
DC
10
10
15
1
0
-1
TC=25 C
TJ=150 C
Single Pulse
10
0
10
1
10
2
10
Qg, Total Gate Charge (nC)
VDS, Drain-Source Voltage (V)
Figure 7. Gate Charge
Figure 8. Maximum Safe
Operating Area
VDD
t on
RL
V IN
D
VGS
RGEN
toff
tr
td(on)
td(off)
tf
90%
90%
VOUT
VOUT
10%
INVERTED
10%
G
90%
S
VIN
50%
50%
10%
PULSE WIDTH
Figure 10. Switching Waveforms
r(t),Normalized Effective
Transient Thermal Impedance
Figure 9. Switching Test Circuit
10
0
D=0.5
0.2
10
PDM
0.1
-1
t1
0.05
0.02
0.01
Single Pulse
10
-2
10
-5
t2
1. RθJC (t)=r (t) * RθJC
2. RθJC=See Datasheet
3. TJM-TC = P* RθJC (t)
4. Duty Cycle, D=t1/t2
10
-4
10
-3
10
-2
10
-1
Square Wave Pulse Duration (sec)
Figure 11. Normalized Thermal Transient Impedance Curve
4
10
0
10
1
3