VS-FA40SA50LC Datasheet

VS-FA40SA50LC
www.vishay.com
Vishay Semiconductors
Power MOSFET, 40 A
FEATURES
• Fully isolated package
• Easy to use and parallel
• Low on-resistance
• Dynamic dV/dt rating
• Fully avalanche rated
• Simple drive requirements
• Low drain to case capacitance
• Low internal inductance
SOT-227
• UL approved file E78996
• Designed for industrial level
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
PRODUCT SUMMARY
DESCRIPTION
VDSS
500 V
RDS(on)
0.106 
ID
40 A
Type
Modules - MOSFET
Package
SOT-227
Third Generation Power MOSFETs from Vishay
Semiconductors provide the designer with the best
combination of fast switching, ruggedized device design,
low on-resistance and cost-effectiveness.
The SOT-227 package is universally preferred for all
commercial-industrial applications at power dissipation
levels to approximately 500 W. The low thermal resistance
of the SOT-227 contribute to its wide acceptance
throughout the industry.

ABSOLUTE MAXIMUM RATINGS
PARAMETER
Continuous drain current at VGS 10 V
Pulsed drain current
Power dissipation
Gate to source voltage
SYMBOL
ID
TEST CONDITIONS
TC = 25 °C
TC = 90 °C
IDM (1)
PD
MAX.
UNITS
40
29
A
150
TC = 25 °C
543
TC = 90 °C
261
W
VGS
± 20
V
Single pulse avalanche energy
EAS (2)
400
mJ
Repetitive avalanche current
IAR (1)
13
A
Repetitive avalanche energy
EAR (1)
42
mJ
Peak diode recovery dV/dt
dV/dt (3)
10
V/ns
Operating junction and storage temperature range
TJ, TStg
-55 to +150
°C
VISO
2.5
kV
1.3
Nm
Insulation withstand voltage (AC-RMS)
Mounting torque
M4 screw, on terminals and heatsink
Notes
(1) Repetitive rating; pulse width limited by maximum junction temperature (see fig. 18)
(2) Starting T = 25 °C, L = 500 μH, R = 2.4 , I
J
g
AS = 40 A (see fig. 18)
(3) I  40 A, dI /dt  200 A/μs, V
SD
F
DD  V(BR)DSS, TJ  150 °C
Revision: 01-Jun-16
Document Number: 94803
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THERMAL - MECHANICAL SPECIFICATIONS
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNITS
°C
TJ, TStg
- 55
-
150
Junction to case
RthJC
-
-
0.23
Case to heatsink
RthCS
-
0.05
-
-
30
-
g
Torque to terminal
-
-
1.1 (9.7)
Nm (lbf.in)
Torque to heatsink
-
-
Junction and storage temperature range
Flat, greased surface
Weight
Mounting torque
Case style
°C/W
1.3 (11.5) Nm (lbf.in)
SOT-227
ELECTRICAL CHARACTERISTICS (TJ = 25 °C unless otherwise noted)
PARAMETER
Drain to source breakdown voltage
Breakdown voltage temperature coefficient
Static drain to source on-resistance
Gate threshold voltage
Forward transconductance
Drain to source leakage current
Gate to source forward leakage
Gate to source reverse leakage
Total gate charge
SYMBOL
V(BR)DSS
V(BR)DSS/TJ
RDS(on) (1)
VGS(th)
gfs
IDSS
IGSS
Qg
Gate to source charge
Qgs
Gate to drain ("Miller") charge
Qgd
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Turn-on delay time
Rise time
Turn-off delay time
Fall time
TEST CONDITIONS
MIN.
TYP.
MAX.
UNITS
500
-
-
V
Reference to 25 °C, ID = 1 mA
-
0.65
-
V/°C
VGS = 10 V, ID = 23 A
-
106
130
m
VGS = 0 V, ID = 1.0 mA
VDS = VGS, ID = 250 μA
2
3
4
VDS = VGS, ID = 250 μA, TJ = 125 °C
-
1.9
-
VDS = 50 V, ID = 23 A
-
29
-
VDS = 500 V, VGS = 0 V
-
0.5
50
VDS = 500 V, VGS = 0 V, TJ = 125 °C
-
30
500
VDS = 500 V, VGS = 0 V, TJ = 150 °C
-
0.2
3
VGS = 20 V
-
-
200
VGS = - 20 V
-
-
- 200
ID = 38 A
VDS = 400 V
VGS = 10 V; see fig. 15 and 19 (1)
-
280
420
VDD = 250 V, ID = 40 A, Rg = 2.4
L = 500 μH, diode used: 60APH06
-
37
55
-
150
220
td(on)
-
143
-
tr
-
33
-
-
107
-
-
36
-
td(off)
tf
td(on)
tr
td(off)
VDD = 250 V, ID = 40 A, Rg = 2.4
L = 500 μH, TJ = 125 °C, diode used:
60APH06
tf
Internal source inductance
LS
Input capacitance
Ciss
Output capacitance
Coss
Reverse transfer capacitance
Crss
Between lead, and center of die
contact
VGS = 0 V
VDS = 25 V
f = 1.0 MHz, see fig. 14
-
145
-
-
35
-
-
110
-
-
40
-
-
5
-
-
6900
-
-
1600
-
-
580
-
V
S
μA
mA
nA
nC
ns
ns
nH
pF
Note
(1) Pulse width  300 μs, duty cycle  2 %
Revision: 01-Jun-16
Document Number: 94803
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SOURCE-DRAIN RATINGS AND CHARACTERISTICS
PARAMETER
SYMBOL
Continuous source current 
(body diode)
TEST CONDITIONS
D
IS
Pulsed source current (body diode)
MOSFET symbol
showing the integral reverse
p-n junction diode.
ISM (1)
Diode forward voltage
VSD (2)
Reverse recovery time
trr
Reverse recovery current
Irr
Reverse recovery charge
Qrr
Reverse recovery time
trr
Reverse recovery current
Irr
Reverse recovery charge
Qrr
Forward turn-on time
ton
MIN.
TYP.
MAX.
-
-
38
-
-
150
UNITS
A
G
S
TJ = 25 °C, IS = 38 A, VGS = 0 V
-
0.9
1.31
TJ = 125 °C, IS = 38 A, VGS = 0 V
-
0.75
-
-
560
-
-
40
-
A
-
11
-
μC
-
680
-
ns
-
47
-
A
-
16
-
μC
TJ = 25 °C, IF = 40 A; dIF/dt = 100 A/μs (2)
TJ = 25 °C, IF = 40 A; dIF/dt = 100 A/μs (2)
V
ns
Intrinsic turn-on time is negligible (turn-on is dominated by LS + LD)
Notes
(1) Repetitive rating; pulse width limited by maximum junction temperature (see fig. 18)
(2) Pulse width  300 μs, duty cycle  2 %
120
140
IDS , Drain-to-Source Current (A)
Allowable Case Temperature (°C)
160
120
100
80
60
40
VGS = 15 V
100
VGS = 12 V
VGS = 10 V
80
VGS = 8 V
VGS = 7 V
60
40
VGS = 6 V
20
20
0
VGS = 5 V
0
0
10
20
30
40
50
Continuous Drain-Source Current IDS (A)
60
Fig. 1 - Maximum DC MOSFET Drain-Source Current vs.
Case Temperature
0
TJ = 25 °C
TJ = 150 °C
IDS , Drain-to-Source Current (A)
IDS - Drain to Source Current (A)
20
70
TJ = 125 °C
1
4
6
8 10 12 14 16 18
VDS , Drain-to-Source Voltage (V)
Fig. 3 - Typical Drain-to-Source Current Output Characteristics
at TJ = 25 °C
100
10
2
VGS = 15 V
60
VGS = 12 V
VGS = 10 V
50
VGS = 8 V
VGS = 7 V
40
VGS = 6 V
30
VGS = 5 V
20
10
0.1
0.1
1
10
VDS - Drain to source Voltage (V), at VGS = 10 V
Fig. 2 - Typical Drain-to-Source Current Output Characteristics;
VGS = 10 V
0
0
2
4
6
8 10 12 14 16 18
VDS , Drain-to-Source Voltage (V)
20
Fig. 4 - Typical Drain-to-Source Current Output Characteristics
at TJ = 125 °C
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140
VGS = 15 V
VGS = 12 V
50
120
ID - Drain to Source current (A)
IDS , Drain-to-Source Current (A)
60
VGS = 10 V
40
VGS = 6 V
VGS = 8 V
30
VGS = 5 V
20
VGS = 7 V
10
TJ = 25 °C
100
80
60
40
TJ = 150 °C
20
0
0
2
4
6
8 10 12 14 16 18
VDS , Drain-to-Source Voltage (V)
280
260
240
220
200
180
160
140
120
9.5
1
TJ = 150 °C
0.1
0.01
TJ = 125 °C
0.001
TJ = 25 °C
0.0001
100
80
0
20
40
60
80
100
120
140
160
0.00001
0
T J - Junction Temperature (°C)
Fig. 6 - Normalized On-Resistance vs. Temperature
100
200
300
400
500
VDSS - Drain to Source Voltage (V)
600
Fig. 9 - Typical MOSFET Zero Gate Voltage Drain Current
5
280
TJ = 25 °C
4.5
240
VGSth - Threshold Voltage (V)
IFSD - Forward Source to Drain Current (A)
3.5
4.5
5.5
6.5
7.5
8.5
VGS - Gate to Source Voltage (V)
10
ID = 40 A
VGS = 10 V
300
2.5
Fig. 8 - Typical MOSFET Transfer Characteristics
IDSS - Drain to Source Current (mA)
RDS(on) - Drain-to-Source On Resistance (mΩ)
Fig. 5 - Typical Drain-to-Source Current Output Characteristics
at TJ = 150 °C
320
0
20
TJ = 125 °C
200
160
120
80
TJ = 150 °C
4
3.5
TJ = 25 °C
3
2.5
TJ = 125 °C
2
1.5
TJ = 150 °C
1
40
0.5
TJ = 125 °C
0
0
0.2
0.4
VFSD
0.6 0.8 1.0 1.2 1.4 1.6
- Drain to Source Forward Voltage
Drop Characteristics (V)
1.8
Fig. 7 - Typical Body Diode Forward Voltage Drop Characeristics
0.20
0.40
0.60
ID (mA)
0.80
1.00
Fig. 10 - Typical MOSFET Threshold Voltage
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1
td(on)
td(off)
0.1
td(on)
Swiching Time (μs)
Switching time (μs)
1
td(off)
tr
0.1
tf
tf
tr
0.01
0.01
0
10
20
30
40
50
0
10
20
Drain to source current - IDS (A)
Fig. 11 - Typical MOSFET Switching Time vs. IDS, TJ = 125 °C,
VDD = 250 V, VGS = 10 V, L = 500 μH, RG = 2.4 
Diode used 60APH06
30
RG (Ω)
40
50
60
Fig. 12 - Typical MOSFET Switching Time vs. RG, TJ = 125 °C,
IDS = 40 A , VDD = 250 V, VGS = 10 V, L = 500 μH
Diode used 60APH06
Z thJC - Thermal Impedance
Junction to Case ( °C/W)
1
0.1
Notes:
PDM
0.75
0.50
0.25
0.1
0.05
0.02
DC
0.01
0.001
0.00001
0.0001
t1
t2
1. Duty Cycle, D =
t1
t2
2. Peak TJ = PDM x ZthJC + TC
0.001
0.01
0.1
1
t 1 - Rectangular Pulse Duration (s)
Fig. 13 - Maximum Thermal Impedance ZthJC Characteristics, MOSFET
VGS = 0V,
f = 1MHz
Ciss = Cgs + Cgd , Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
C, Capacitance (pF)
14000
12000
10000
Ciss
8000
6000
Coss
4000
Crss
2000
20
VGS , Gate-to-Source Voltage (V)
16000
ID = 38A
VDS = 400V
VDS = 250V
VDS = 100V
16
12
8
4
FOR TEST CIRCUIT
SEE FIGURE 19
0
0
1
10
100
VDS , Drain-to-Source Voltage (V)
Fig. 14 - Typical Capacitance vs. Drain to Source Voltage
0
80
160
240
320
400
QG , Total Gate Charge (nC)
Fig. 15 - Typical Gate Charge vs.
Gate to Source Voltage
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1000
ID , Drain Current (A)
OPERATION IN THIS AREA LIMITED
BY RDS(on)
100
V(BR)DSS
10 μs
tp
100 μs
10
1 ms
1
TC = 25 °C
TJ = 150 °C
Single Pulse
1
10 ms
10
100
1000
10 000
I AS
VDS , Drain-to-Source Voltage (V)
Fig. 20 - Unclamped Inductive Waveforms
Fig. 16 - Maximum Safe Operating Area
RD
VDS
QG
VGS
D.U.T.
10V
RG
+
- VDD
QGS
QGD
VG
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
Charge
Fig. 17 - Switching Time Test Circuit
Fig. 21 - Basic Gate Charge Waveform
VDS
90%
Current regulator
Same type as D.U.T.
0%
50 KΩ
GS
td(on)
tr
t d(off)
.2 µF
12 V
tf
.3 µF
Fig. 18 - Switching Time Waveforms
D.U.T.
15 V
+
V
- DS
VGS
3 mA
L
VDS
Driver
IG
ID
Current sampling resistors
D.U.T
RG
IAS
20 V
tp
+
- VDD
A
Fig. 22 - Gate Charge Test Circuit
0.01 Ω
Fig. 19 - Unclamped Inductive Test Circuit
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+
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
3
+
2
4
-
-
+
1
RG
•
•
•
•
dV/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by duty factor "D"
D.U.T. - Device under test
+
-
VDD
Fig. 23 - Peak Diode Recovery dV/dt Test Circuit
Driver Gate Drive
P.W.
D=
Period
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig. 24 - For N-Channel Power MOSFETs
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ORDERING INFORMATION TABLE
Device code
VS-
F
A
40
S
A
50
LC
1
2
3
4
5
6
7
8
1
-
Vishay Semiconductors product
2
-
Power MOSFET
3
-
A = Generation 3, MOSFET silicon die
4
-
Current rating (40 = 40 A)
5
-
Single switch
6
-
Package indicator (SOT-227)
7
-
Voltage rating (50 = 500 V)
8
-
LC = Low charge
CIRCUIT CONFIGURATION
CIRCUIT
CIRCUIT
CONFIGURATION CODE
CIRCUIT DRAWING
D (3)
3
(D)
2
(G)
4
(S)
1
(S)
G (2)
S (1-4)
Lead Assignment
Single switch
S
(S)
(D)
4
3
1
2
(S)
(G)
LINKS TO RELATED DOCUMENTS
Dimensions
www.vishay.com/doc?95423
Packaging information
www.vishay.com/doc?95425
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Document Number: 94803
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Outline Dimensions
www.vishay.com
Vishay Semiconductors
SOT-227 Generation II
DIMENSIONS in millimeters (inches)
38.30 (1.508)
37.80 (1.488)
Ø 4.10 (0.161)
Ø 4.30 (0.169)
-A-
4 x M4 nuts
6.25 (0.246)
6.50 (0.256)
12.50 (0.492)
13.00 (0.512)
25.70 (1.012)
24.70 (0.972)
-B-
7.45 (0.293)
7.60 (0.299)
14.90 (0.587)
15.20 (0.598)
R full 2.10 (0.083)
2.20 (0.087)
30.50 (1.200)
29.80 (1.173)
31.50 (1.240)
32.10 (1.264)
4x
2.20 (0.087)
1.90 (0.075)
8.30 (0.327)
7.70 (0.303)
0.25 (0.010) M C A M B M
4.10 (0.161)
4.50 (0.177)
12.30 (0.484)
11.70 (0.460)
-C0.13 (0.005)
25.00 (0.984)
25.50 (1.004)
Note
• Controlling dimension: millimeter
Revision: 02-Aug-12
Document Number: 95423
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Revision: 02-Oct-12
1
Document Number: 91000