AT24C01C/02C/04C/08C Automotive - Complete

AT24C01C, AT24C02C, AT24C04C, AT24C08C
2-wire Automotive Temperature Serial EEPROMs
1K (128 x 8), 2K (256 x 8), 4K (512 x 8), 8K (1,024 x 8)
DATASHEET
Features

Medium-voltage and Standard-voltage Operation
̶











2.5 (VCC = 2.5V to 5.5V)
Automotive Temperature Range -40C to +125C
Internally Organized 128 x 8 (1K), 256 x 8 (2K), 512 x 8 (4K), or 1,024 x 8 (8K)
2-wire Serial Interface
Schmitt Trigger, Filtered Inputs for Noise Suppression
Bidirectional Data Transfer Protocol
400kHz (2.5V) Compatibility
Write Protect Pin for Hardware Data Protection
8-byte Page (1K, 2K) or 16-byte Page (4K, 8K) Write Modes
Partial Page Writes are allowed
Self-timed Write Cycle (5ms Max)
High Reliability
̶
̶

Endurance: 1,000,000 Write Cycles
Data Retention: 100 Years
8-lead JEDEC SOIC and 8-lead TSSOP packages
Description
The Atmel® AT24C01C/02C/04C/08C provides 1,024/2,048/4,096/8,192 bits of
Serial Electrically Erasable and Programmable Read-Only Memory (EEPROM)
organized as 128/256/512/1,024 words of eight bits each. The device is optimized
for use in many automotive applications where low-power and low-voltage
operation are essential. AT24C01C/02C/04C/08C is available in space-saving
8-lead JEDEC SOIC and 8-lead TSSOP packages and is accessed via a 2-wire
serial interface. In addition, the entire family is available in 2.5V (2.5V to 5.5V)
versions.
Atmel-8819B-SEEPROM-AT24C01C-02C-04C-08C-Auto-Datasheet_072014
1.
Pin Configurations and Pinouts
Table 1-1.
Pin Name
2.
Pin Configurations
Function
A0
Address Input (1K and 2K)
A1
Address Input (1K, 2K, and 4K)
A2
Address Input (1K, 2K, 4K, and 8K)
GND
Ground
SDA
Serial Data
SCL
Serial Clock Input
WP
Write Protect
VCC
Device Power Supply
8-lead TSSOP
(Top View)
(Top View)
A0
1
8
VCC
A1
2
7
WP
A0
A1
A2
GND
A2
3
6
SCL
GND
4
5
SDA
Note:
Drawings are not to scale.
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
Absolute Maximum Ratings*
Operating Temperature . . . . . . . . . . .-55C to +125C
Storage Temperature . . . . . . . . . . . . .-65C to +150C
Voltage on Any Pin
With Respect to Ground . . . . . . . . . . .-1.00V to +7.00V
Maximum Operating Voltage . . . . . . . . . . . . . . . 6.25V
DC Output Current . . . . . . . . . . . . . . . . . . . . . . .5.0mA
2
8-lead SOIC
AT24C01C/02C/04C/08C Automotive [DATASHEET]
Atmel-8819B-SEEPROM-AT24C01C-02C-04C-08C-Auto-Datasheet_072014
*Notice: Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent damage
to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
Block Diagram
VCC
GND
WP
Start
Stop
Logic
SCL
SDA
Serial
Control
Logic
LOAD
Device
Address
Comparator
A2
A1
A0
R/W
EN
H.V. Pump/Timing
COMP
Data Recovery
LOAD
Data Word
ADDR/Counter
Y DEC
INC
X DEC
3.
EEPROM
Serial MUX
DOUT/ACK
Logic
DIN
DOUT
AT24C01C/02C/04C/08C Automotive [DATASHEET]
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3
4.
Pin Description
Serial Clock (SCL): The SCL input is used to positive edge clock data into each EEPROM device and negative
edge clock data out of each device.
Serial Data (SDA): The SDA pin is bi-directional for serial data transfer. This pin is open-drain driven and may
be wire-ORed with any number of other open-drain or open-collector devices.
Device/Page Addresses (A2, A1, A0): The A2, A1, and A0 pins are device address inputs that are hard wired
for the AT24C01C/02C/04C/08C. As many as eight 1K/2K devices may be addressed on a single bus system
(device addressing is discussed in detail in Section 6. “Device Operation”).
The AT24C04C uses the A2 and A1 inputs for hardwire addressing and a total of four 4K devices may be
addressed on a single bus system. The A0 pin is a no connect.
The AT24C08C only uses the A2 input for hardwire addressing and a total of two 8K devices may be addressed
on a single bus system. The A0 and A1 pins are no connect.
Write Protect (WP): AT24C01C/02C/04C/08C has a Write Protect pin that provides hardware data protection.
The Write Protect pin allows normal read/write operations when connected to ground (GND). When the Write
Protect pin is connected to VCC, the write protection feature is enabled and operates as shown in the following
table.
Figure 4-1.
4
Write Protect
WP Pin Status
Part of the Array Protected
At VCC
Full Array
At GND
Normal Read/Write Operations
AT24C01C/02C/04C/08C Automotive [DATASHEET]
Atmel-8819B-SEEPROM-AT24C01C-02C-04C-08C-Auto-Datasheet_072014
5.
Memory Organization
AT24C01C, 1K Serial EEPROM: Internally organized with 16 pages of 8 bytes each, the 1K requires a 7-bit
data word address for random word addressing.
AT24C02C, 2K Serial EEPROM: Internally organized with 32 pages of 8 bytes each, the 2K requires an 8-bit
data word address for random word addressing.
AT24C04C, 4K Serial EEPROM: Internally organized with 32 pages of 16 bytes each, the 4K requires a 9-bit
data word address for random word addressing.
AT24C08C, 8K Serial EEPROM: Internally organized with 64 pages of 16 bytes each, the 8K requires a 10-bit
data word address for random word addressing.
Table 5-1.
Pin Capacitance(1)
Applicable over recommended operating range from TA = 25C, f = 400KHz, VCC = 2.5V.
Symbol
Test Condition
CI/O
CIN
Note:
1.
Table 5-2.
Max
Units
Conditions
Input/Output Capacitance (SDA)
8
pF
VI/O = 0V
Input Capacitance (A0, A1, A2, SCL)
6
pF
VIN = 0V
This parameter is characterized and is not 100% tested.
DC Characteristics
Applicable over recommended operating range from: TA = 40C to +125C, VCC = 2.5V to 5.5V (unless otherwise noted).
Symbol
Parameter
Max
Units
VCC1
Supply Voltage
5.5
V
ICC
Supply Current VCC = 5.0V
Read at 100kHz
0.4
1.0
mA
ICC
Supply Current VCC = 5.0V
Write at 100kHz
2.0
3.0
mA
ISB1
Standby Current VCC = 2.5V
VIN = VCC or VSS
1.6
4.0
μA
ISB2
Standby Current VCC = 5.0V
VIN = VCC or VSS
4.0
6.0
μA
ILI
Input Leakage Current
VIN = VCC or VSS
0.10
3.0
μA
ILO
Output Leakage Current
VOUT = VCC or VSS
0.05
3.0
μA
VIL
Input Low Level(1)
0.6
VCC x 0.3
V
VIH
Input High Level(1)
VCC x 0.7
VCC + 0.5
V
VOL
Output Low Level VCC = 2.5V
0.4
V
Note:
1.
Test Condition
Min
Typ
2.5
IOL = 3.0mA
VIL min and VIH max are reference only and are not tested.
AT24C01C/02C/04C/08C Automotive [DATASHEET]
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Table 5-3.
AC Characteristics
Applicable over recommended operating range from TA = 40C to 125C, VCC = 2.5V to 5.5V,
CL = 1 TTL Gate and 100pF (unless otherwise noted).
Symbol
Parameter
fSCL
Clock Frequency, SCL
tLOW
Clock Pulse Width Low
1200
ns
tHIGH
Clock Pulse Width High
600
ns
tI
Noise Suppression Time(1)
tAA
Clock Low to Data Out Valid
100
tBUF
Time the bus must be free before a new transmission can start(2)
1200
ns
tHD.STA
Start Hold Time
600
ns
tSU.STA
Start Set-up Time
600
ns
tHD.DAT
Data In Hold Time
0
ns
tSU.DAT
Data In Set-up Time
100
ns
(2)
Max
Units
400
kHz
50
ns
900
ns
tR
Inputs Rise Time
tF
Inputs Fall Time(2)
tSU.STO
Stop Set-up Time
600
ns
tDH
Data Out Hold Time
50
ns
tWR
Write Cycle Time
Endurance(2)
5.0V, 25C, Page Mode
Notes:
6
Min
1.
2.
This parameter is characterized and is not 100% tested (TA = 25C).
This parameter is characterized only.
AT24C01C/02C/04C/08C Automotive [DATASHEET]
Atmel-8819B-SEEPROM-AT24C01C-02C-04C-08C-Auto-Datasheet_072014
300
ns
300
ns
5
1,000,000
ms
Write Cycles
6.
Device Operation
Clock and Data Transitions: The SDA pin is normally pulled high with an external device. Data on the SDA pin
may change only during SCL low time periods. Data changes during SCL high periods will indicate a Start or
Stop condition as defined below.
Figure 6-1.
Data Validity
SDA
SCL
Data Stable
Data Stable
Data
Change
Start Condition: A high-to-low transition of SDA with SCL high is a Start condition which must precede any
other command.
Stop Condition: A low-to-high transition of SDA with SCL high is a Stop condition. After a read sequence, the
Stop command will place the EEPROM in a standby power mode.
Figure 6-2.
Start and Stop Condition
SDA
SCL
Start
Stop
AT24C01C/02C/04C/08C Automotive [DATASHEET]
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Acknowledge: All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words.
The EEPROM sends a zero to acknowledge that it has received each word. When the EEPROM is reading data
out, the host will transmit an ACK after each data word to indicate that the next word can be transmitted.This
happens during the ninth clock cycle.
Figure 6-3.
Output Acknowledge
1
SCL
8
9
DATA IN
DATA OUT
Start
Acknowledge
Standby Mode: AT24C01C/02C/04C/08C features a low-power standby mode which is enabled:


Upon power-up.
After the receipt of the Stop condition and the completion of any internal operations.
2-wire Software Reset: After an interruption in protocol, power loss, or system reset, any 2-wire part can be
protocol reset by following these steps:
1.
Create a Start condition.
2.
3.
Clock nine cycles.
Create another Start condition followed by Stop condition as shown in the following figures.
The device is ready for the next communication after the above steps have been completed.
Figure 6-4.
Software Reset
Dummy Clock Cycles
1
SCL
2
3
Start
Condition
SDA
8
AT24C01C/02C/04C/08C Automotive [DATASHEET]
Atmel-8819B-SEEPROM-AT24C01C-02C-04C-08C-Auto-Datasheet_072014
8
9
Start
Condition
Stop
Condition
Figure 6-5.
Bus Timing
SCL: Serial Clock, SDA: Serial Data I/O
tHIGH
tF
tR
tLOW
SCL
tSU.STA
tLOW
tHD.STA
tHD.DAT
tSU.DAT
tSU.STO
SDA IN
tAA
tDH
tBUF
SDA OUT
Figure 6-6.
Write Cycle Timing
SCL: Serial Clock, SDA: Serial Data I/O
SCL
SDA
8th Bit
ACK
WORDn
twr
Stop
Condition
Note:
1.
(1)
Start
Condition
The write cycle time tWR is the time from a valid Stop condition of a write sequence to the end of the internal
clear/write cycle.
AT24C01C/02C/04C/08C Automotive [DATASHEET]
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7.
Device Addressing
The 1K/2K/4K/8K EEPROM devices require an 8-bit device address word following a Start condition to enable
the device for a read or write operation.
The device address word consists of a mandatory '1010' sequence for the first four Most Significant Bits
(MSB). This is common to all the Serial EEPROM devices.
For the 1K/2K EEPROM, the next three bits are the A2, A1, and A0 device address bits. These three bits must
compare to their corresponding hardwired input A2, A1, and A0 pins.
The 4K EEPROM only uses the A2 and A1 device address bits with the A0 bit being a memory address bit (P0).
The two device address bits must compare to their corresponding hardwired input A2 and A1 pins. The A0 pin is
not connected.
The 8K EEPROM only uses the A2 device address bit with the next two bits (P1, P0) being for memory page
addressing. The A2 bit must compare to its corresponding hardwired input pin. The A1 and A0 pins are not
connected.
The eighth bit of the device address is the read/write operation select bit. A read operation is initiated if this bit is
high and a write operation is initiated if this bit is low.
After a valid comparison of the device address, the EEPROM will output a zero. If the comparison is invalid, the
device will return to a standby state.
Figure 7-1.
1K/2K
Device Address
1
0
1
0
A2
A1
A0
MSB
10
R/W
LSB
4K
1
0
1
0
A2
A1
P0
R/W
8K
1
0
1
0
A2
P1
P0
R/W
AT24C01C/02C/04C/08C Automotive [DATASHEET]
Atmel-8819B-SEEPROM-AT24C01C-02C-04C-08C-Auto-Datasheet_072014
8.
Write Operations
Byte Write: A write operation requires an 8-bit data word address following the device address word and
acknowledgment. Upon receipt of this address, the EEPROM will again respond with a zero and then clock in
the first 8-bit data word. Following receipt of the 8-bit data word, the EEPROM will output a zero and the
addressing device, such as a microcontroller, must terminate the write sequence with a Stop condition. At this
time, the EEPROM enters an internally timed write cycle (tWR) to the nonvolatile memory. All inputs are disabled
during this write cycle, and the EEPROM will not respond until the write is complete.
Figure 8-1.
Byte Write
S
T
A
R
T
W
R
I
T
E
Device
Address
Word Address
S
T
O
P
Data
SDA Line
M
S
B
L R A
S / C
BW K
M
S
B
L A
SC
BK
A
C
K
* = Don’t care bit for 1K
Page Write: The 1K/2K EEPROM are capable of an 8-byte Page Write. The 4K/8K EEPROM devices are
capable of 16-byte Page Writes.
A Page Write is initiated the same as a Byte Write, but the microcontroller does not send a Stop condition after
the first data word is clocked in. Instead, after the EEPROM acknowledges receipt of the first data word, the
microcontroller can transmit up to seven (1K/2K) or fifteen (4K/ 8K) more data words. The EEPROM will
respond with a zero after each data word received. The microcontroller must terminate the Page Write
sequence with a Stop condition.
The data word address lower three (1K/2K) or four (4K/8K) bits are internally incremented following the receipt
of each data word. The higher data word address bits are not incremented, retaining the memory page row
location. When the word address, internally generated, reaches the page boundary, the next byte sent will be
written to the beginning address on the same page. In order words, if more than eight (1K/2K) or sixteen (4K/8K)
data words are transmitted to the EEPROM, the data word address will “roll over” and the data previously sent
to the device at the beginning of the page write sequence will be altered.
Figure 8-2.
Page Write
S
T
A
R
T
Device
Address
W
R
I
T
E
S
T
O
P Data (n + 1)
Data (n)
Word Address (n)
S
T
O
P
Data (n + x)
SDA Line
M
S
B
L R A
S / C
BW K
M
S
B
A
C
K
A
C
K
A
C
K
A
C
K
* = Don’t care bit for 1K
Acknowledge Polling: Once the internally timed write cycle has started and the EEPROM inputs are disabled,
Acknowledge Polling can be initiated. This involves sending a start condition followed by the device address
word. The read/write bit state is representative of the operation desired. Only if the internal write cycle has
completed will the EEPROM respond with a zero, allowing the read or write sequence to continue.
AT24C01C/02C/04C/08C Automotive [DATASHEET]
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9.
Read Operations
Read operations are initiated the same way as write operations with the exception that the read/write select bit
in the device address word is set to one. There are three read operations:



Current Address Read
Random Address Read
Sequential Read
Current Address Read: The internal data word address counter maintains the last address accessed during
the last read or write operation, incremented by one. This address stays valid between operations as long as the
chip power is maintained. The address roll-over during read is from the last byte of the last memory page to the
first byte of the first page. The address roll-over during write is from the last byte of the current page to the first
byte of the same page.
Once the device address with the read/write select bit set to one is clocked in and acknowledged by the
EEPROM, the current address data word is serially clocked out. To end the command, the microcontroller does
not respond with a zero but does generate a Stop condition in the subsequent clock cycle.
Figure 9-1.
Current Address Read
S
T
A
R
T
R
E
A
D
Device
Address
S
T
O
P
Data
SDA Line
M
S
B
N
O
L R A
S / C
B WK
A
C
K
Random Read: A Random Read requires a dummy byte write sequence to load in the data word address. Once
the device address word and data word address are clocked in and acknowledged by the EEPROM, the
microcontroller must generate another Start condition. The microcontroller now initiates a Current Address
Read by sending a device address with the read/write select bit high. The EEPROM acknowledges the device
address and serially clocks out the data word. To end the command, the microcontroller does not respond with
a zero but does generate a Stop condition in the subsequent clock cycle.
Figure 9-2.
Random Read
S
T
A
R
T
Device Address
W
R
I
T
E
S
T
A
R
T
Word Address (n)
Device Address
R
E
A
D
S
T
O
P
Data (n)
SDA Line
M
S
B
R A
/ C
W K
A
C
K
Dummy Write
* = Don’t care bit for 1K
12
AT24C01C/02C/04C/08C Automotive [DATASHEET]
Atmel-8819B-SEEPROM-AT24C01C-02C-04C-08C-Auto-Datasheet_072014
M
S
B
A
C
K
N
O
A
C
K
Sequential Read: Sequential Reads are initiated by either a Current Address Read or a Random Address
Read. After the microcontroller receives a data word, it responds with an acknowledge. As long as the EEPROM
receives an acknowledge, it will continue to increment the data word address and serially clock out sequential
data words. When the memory address limit is reached, the data word address will “roll over” and the Sequential
Read will continue. To end the command, the microcontroller does not respond with a zero but does generate a
Stop condition in the subsequent clock cycle.
Figure 9-3.
Sequential Read
Device
Address
R
E
A
D
Data (n)
Data (n + 1)
Data (n + 2)
S
T
O
P
Data (n + x)
SDA Line
R A
/ C
WK
10.
A
C
K
A
C
K
A
C
K
N
O
A
C
K
Power Recommendation
The device internal POR (Power-On Reset) threshold is just below the minimum operating voltage of the device.
Power shall rise monotonically from 0.0Vdc to full VCC in less than 1ms. Hold at full VCC for at least 100μs before
the first operation. Power shall drop from full VCC to 0.0Vdc in less than 1ms. Power dropping to a non-zero level
and then slowly going to zero is not recommended. Power shall remain off (0.0Vdc) for 0.5s minimum. Please
consult Atmel if your power conditions do not meet the above recommendations.
AT24C01C/02C/04C/08C Automotive [DATASHEET]
Atmel-8819B-SEEPROM-AT24C01C-02C-04C-08C-Auto-Datasheet_072014
13
11.
Product Markings
AT24C01C, AT24C02C, AT24C04C and AT24C08C: Package Marking Information
8-lead TSSOP
8-lead SOIC
ATMLPYWW
###D
@
AAAAAAAA
Note 1:
ATPYWW
###D @
AAAAAAA
designates pin 1
Note 2: Package drawings are not to scale
Catalog Number Truncation
AT24C01C
Truncation Code ###: 01C
AT24C02C
Truncation Code ###: 02C
AT24C04C
Truncation Code ###: 04C
AT24C08C
Truncation Code ###: 08C
Date Codes
Y = Year
2: 2012
3: 2013
4: 2014
5: 2015
Voltages
6: 2016
7: 2017
8: 2018
9: 2019
WW = Work Week of Assembly
02: Week 2
04: Week 4
...
52:Week 52
Country of Assembly
Lot Number
@ = Country of Assembly
AAA...A = Atmel Wafer Lot Number
% = Minimum Voltage
D: 2.5V min
Grade/Lead Finish Material
P: Automotive/NiPdAu
Atmel Truncation
AT: Atmel
ATM: Atmel
ATML: Atmel
11/13/12
TITLE
Package Mark Contact:
[email protected]
14
24C01-02-04-08CAM, AT24C01C, AT24C02C, AT24C04C, and
AT24C08C Automotive Package Marking Information
AT24C01C/02C/04C/08C Automotive [DATASHEET]
Atmel-8819B-SEEPROM-AT24C01C-02C-04C-08C-Auto-Datasheet_072014
DRAWING NO.
REV.
24C01-02-04-08CAM
B
12.
Ordering Code Information
Atmel Ordering Code
AT24C01C-SSPD-T(1)
AT24C01C-XPD-T(1)
AT24C02C-SSPD-T(1)
AT24C02C-XPD-T
(1)
AT24C04C-SSPD-T(1)
AT24C04C-XPD-T
(1)
AT24C08C-SSPD-T(1)
AT24C08C-XPD-T(1)
Note:
1.
Lead Finish
NiPdAu
(Lead-free/Halogen-free)
NiPdAu
(Lead-free/Halogen-free)
NiPdAu
(Lead-free/Halogen-free)
NiPdAu
(Lead-free/Halogen-free)
Package
Voltage
Operation Range
2.5V to 5.5V
Automotive Temperature
(40C to 125C)
2.5V to 5.5V
Automotive Temperature
(40C to 125C)
2.5V to 5.5V
Automotive Temperature
(40C to 125C)
2.5V to 5.5V
Automotive Temperature
(40C to 125C)
8S1
8X
8S1
8X
8S1
8X
8S1
8X
T = Tape and Reel


SOIC 4,000 per reel.
TSSOP 5,000 per reel.
Package Type
8S1
8-lead, 0.150” wide, Plastic Gull Wing Small Outline (JEDEC SOIC)
8X
8-lead, 4.4mm body, Plastic Thin Shrink Small Outline Package (TSSOP)
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15
13.
Packaging Information
13.1
8S1 — 8-lead JEDEC SOIC
C
1
E
E1
L
N
Ø
TOP VIEW
END VIEW
e
b
COMMON DIMENSIONS
(Unit of Measure = mm)
A
A1
D
SIDE VIEW
Notes: This drawing is for general information only.
Refer to JEDEC Drawing MS-012, Variation AA
for proper dimensions, tolerances, datums, etc.
SYMBOL MIN
A
1.35
NOM
MAX
–
1.75
A1
0.10
–
0.25
b
0.31
–
0.51
C
0.17
–
0.25
D
4.80
–
5.05
E1
3.81
–
3.99
E
5.79
–
6.20
e
NOTE
1.27 BSC
L
0.40
–
1.27
Ø
0°
–
8°
6/22/11
Package Drawing Contact:
[email protected]
16
TITLE
8S1, 8-lead (0.150” Wide Body), Plastic Gull Wing
Small Outline (JEDEC SOIC)
AT24C01C/02C/04C/08C Automotive [DATASHEET]
Atmel-8819B-SEEPROM-AT24C01C-02C-04C-08C-Auto-Datasheet_072014
GPC
SWB
DRAWING NO.
REV.
8S1
G
13.2
8X — 8-lead TSSOP
C
1
Pin 1 indicator
this corner
E1
E
L1
N
L
Top View
End View
A
b
A1
e
COMMON DIMENSIONS
(Unit of Measure = mm)
A2
D
SYMBOL
Side View
Notes:
1. This drawing is for general information only.
Refer to JEDEC Drawing MO-153, Variation AA, for proper
dimensions, tolerances, datums, etc.
2. Dimension D does not include mold Flash, protrusions or gate
burrs. Mold Flash, protrusions and gate burrs shall not exceed
0.15mm (0.006in) per side.
3. Dimension E1 does not include inter-lead Flash or protrusions.
Inter-lead Flash and protrusions shall not exceed 0.25mm
(0.010in) per side.
4. Dimension b does not include Dambar protrusion.
Allowable Dambar protrusion shall be 0.08mm total in excess
of the b dimension at maximum material condition. Dambar
cannot be located on the lower radius of the foot. Minimum
space between protrusion and adjacent lead is 0.07mm.
5. Dimension D and E1 to be determined at Datum Plane H.
MIN
NOM
MAX
A
-
-
1.20
A1
0.05
-
0.15
A2
0.80
1.00
1.05
D
2.90
3.00
3.10
2, 5
4.40
4.50
3, 5
0.25
0.30
4
E
6.40 BSC
E1
4.30
b
0.19
e
L
0.65 BSC
0.45
L1
C
NOTE
0.60
0.75
1.00 REF
0.09
-
0.20
2/27/14
TITLE
Package Drawing Contact:
[email protected]
GPC
8X, 8-lead 4.4mm Body, Plastic Thin
Shrink Small Outline Package (TSSOP)
TNR
DRAWING NO.
8X
AT24C01C/02C/04C/08C Automotive [DATASHEET]
Atmel-8819B-SEEPROM-AT24C01C-02C-04C-08C-Auto-Datasheet_072014
REV.
E
17
14.
18
Revision History
Doc. Rev.
Date
8819B
07/2014
8819A
12/2012
Comments
Increase tAA maximum from 90ns to 900ns.
Update the 8X package drawing, footers, and the disclaimer page.
Initial document release.
AT24C01C/02C/04C/08C Automotive [DATASHEET]
Atmel-8819B-SEEPROM-AT24C01C-02C-04C-08C-Auto-Datasheet_072014
XXXXXX
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