Data Sheet

Document Number: AFT09H310−03S
Rev. 1, 9/2013
Freescale Semiconductor
Technical Data
RF Power LDMOS Transistors
N−Channel Enhancement−Mode Lateral MOSFETs
These 56 watt asymmetrical Doherty RF power LDMOS transistors are
designed for cellular base station applications covering the frequency range of
920 to 960 MHz.
• Typical Doherty Single−Carrier W−CDMA Performance: VDD = 28 Volts,
IDQA = 680 mA, VGSB = 0.4 Vdc, Pout = 56 Watts Avg., Input Signal
PAR = 9.9 dB @ 0.01% Probability on CCDF.
Frequency
Gps
(dB)
hD
(%)
Output PAR
(dB)
ACPR
(dBc)
920 MHz
17.9
47.4
8.2
−28.5
940 MHz
18.0
48.5
8.1
−31.2
960 MHz
18.2
47.3
7.9
−35.0
AFT09H310−03SR6
AFT09H310−04GSR6
920−960 MHz, 56 W AVG., 28 V
AIRFAST RF POWER LDMOS
TRANSISTORS
NI−1230S−4S
AFT09H310−03SR6
Features
• Advanced High Performance In−Package Doherty
• Greater Negative Gate−Source Voltage Range for Improved Class C
Operation
• Designed for Digital Predistortion Error Correction Systems
• In Tape and Reel. R6 Suffix = 150 Units, 56 mm Tape Width, 13−inch Reel.
NI−1230GS−4L
AFT09H310−04GSR6
Carrier
RFinA/VGSA 3
1 RFoutA/VDSA
RFinB/VGSB 4
2 RFoutB/VDSB
Peaking
(Top View)
Figure 1. Pin Connections
© Freescale Semiconductor, Inc., 2013. All rights reserved.
RF Device Data
Freescale Semiconductor, Inc.
AFT09H310−03SR6 AFT09H310−04GSR6
1
Table 1. Maximum Ratings
Symbol
Value
Unit
Drain−Source Voltage
Rating
VDSS
−0.5, +70
Vdc
Gate−Source Voltage
VGS
−6.0, +10
Vdc
Operating Voltage
VDD
32, +0
Vdc
Storage Temperature Range
Tstg
−65 to +150
°C
Case Operating Temperature Range
TC
−40 to +150
°C
TJ
−40 to +225
°C
CW
256
0.9
W
W/°C
Operating Junction Temperature Range
(1,2)
CW Operation @ TC = 25°C
Derate above 25°C
Table 2. Thermal Characteristics
Characteristic
Thermal Resistance, Junction to Case
Case Temperature 75°C, 56 W W−CDMA, 28 Vdc, IDQA = 680 mA, VGSB = 0.4 Vdc, 940 MHz
Symbol
Value (2,3)
Unit
RθJC
0.41
°C/W
Table 3. ESD Protection Characteristics
Test Methodology
Class
Human Body Model (per JESD22−A114)
2
Machine Model (per EIA/JESD22−A115)
B
Charge Device Model (per JESD22−C101)
IV
Table 4. Electrical Characteristics (TA = 25°C unless otherwise noted)
Symbol
Min
Typ
Max
Unit
Zero Gate Voltage Drain Leakage Current
(VDS = 65 Vdc, VGS = 0 Vdc)
IDSS
—
—
10
μAdc
Zero Gate Voltage Drain Leakage Current
(VDS = 28 Vdc, VGS = 0 Vdc)
IDSS
—
—
1
μAdc
Gate−Source Leakage Current
(VGS = 5 Vdc, VDS = 0 Vdc)
IGSS
—
—
1
μAdc
Gate Threshold Voltage
(VDS = 10 Vdc, ID = 242 μAdc)
VGS(th)
0.9
1.5
1.9
Vdc
Gate Quiescent Voltage
(VDD = 28 Vdc, IDA = 680 mAdc, Measured in Functional Test)
VGSA(Q)
1.7
2.1
2.5
Vdc
Drain−Source On−Voltage
(VGS = 10 Vdc, ID = 1.0 Adc)
VDS(on)
0.05
0.2
0.4
Vdc
Gate Threshold Voltage
(VDS = 10 Vdc, ID = 310 μAdc)
VGS(th)
0.9
1.5
1.9
Vdc
Drain−Source On−Voltage
(VGS = 10 Vdc, ID = 1.0 Adc)
VDS(on)
0.05
0.2
0.4
Vdc
Characteristic
Off Characteristics
(4)
On Characteristics − Side A (4) (Carrier)
On Characteristics − Side B (4) (Peaking)
1. Continuous use at maximum temperature will affect MTTF.
2. MTTF calculator available at http://www.freescale.com/rf. Select Software & Tools/Development Tools/Calculators to access MTTF
calculators by product.
3. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.freescale.com/rf.
Select Documentation/Application Notes − AN1955.
4. Each side of device measured separately.
(continued)
AFT09H310−03SR6 AFT09H310−04GSR6
2
RF Device Data
Freescale Semiconductor, Inc.
Table 4. Electrical Characteristics (TA = 25°C unless otherwise noted) (continued)
Characteristic
Symbol
Min
Typ
Max
Unit
Functional Tests (1,2,3) (In Freescale Doherty Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQA = 680 mA, VGSB = 0.4 Vdc, Pout = 56 W Avg.,
f = 920 MHz, Single−Carrier W−CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF. ACPR measured in
3.84 MHz Channel Bandwidth @ ±5 MHz Offset.
Power Gain
Gps
17.7
17.9
20.7
dB
Drain Efficiency
ηD
45.3
47.4
—
%
PAR
7.6
8.2
—
dB
ACPR
—
−28.5
−27.3
dBc
Output Peak−to−Average Ratio @ 0.01% Probability on CCDF
Adjacent Channel Power Ratio
Load Mismatch (In Freescale Test Fixture, 50 ohm system) IDQA = 680 mA, f = 940 MHz
VSWR 10:1 at 32 Vdc, 280 W CW(4) Output Power
(3 dB Input Overdrive from 180 W CW Rated Power)
No Device Degradation
Typical Performances (2) (In Freescale Doherty Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQA = 680 mA, VGSB = 0.4 Vdc,
920−960 MHz Bandwidth
Pout @ 1 dB Compression Point, CW
P1dB
—
180
—
W
Pout @ 3 dB Compression Point (5)
P3dB
—
390
—
W
Φ
—
31.7
—
°
VBWres
—
45
—
MHz
Gain Flatness in 40 MHz Bandwidth @ Pout = 56 W Avg.
GF
—
0.3
—
dB
Gain Variation over Temperature
(−30°C to +85°C)
ΔG
—
0.015
—
dB/°C
ΔP1dB
—
0.035
—
dB/°C
AM/PM
(Maximum value measured at the P3dB compression point across
the 920 to 960 MHz frequency range)
VBW Resonance Point
(IMD Third Order Intermodulation Inflection Point)
Output Power Variation over Temperature
(−30°C to +85°C)
1. Part internally matched both on input and output.
2. Measurements made with device in an asymmetrical Doherty configuration.
3. Measurements made with device in straight lead configuration before any lead forming operation is applied. Lead forming is used for gull
wing (GS) parts.
4. Exceeds recommended operating conditions. See CW operation data in Maximum Ratings table.
5. P3dB = Pavg + 7.0 dB where Pavg is the average output power measured using an unclipped W−CDMA single−carrier input signal where
output PAR is compressed to 7.0 dB @ 0.01% probability on CCDF.
AFT09H310−03SR6 AFT09H310−04GSR6
RF Device Data
Freescale Semiconductor, Inc.
3
VGGA
VDDA
-
C31
C11 C1
AFT09H310−4S
Rev. 5
C13
C29
C7
C5
C
C6
Z1
C9
P
R3
C8
C4
R2
CUT OUT AREA
R1
C3
C16
C15
C27
C19
C20
C22 C23
C21
C28
C26
C24
C25
C17
C10
C18
C30
C12
C2
C14
-
C32
VGGB
VDDB
Figure 2. AFT09H310−03SR6 Test Circuit Component Layout — 920−960 MHz
Table 5. AFT09H310−03SR6 Test Circuit Component Designations and Values — 920−960 MHz
Part
Description
Part Number
Manufacturer
C1, C2, C3, C4
47 pF Chip Capacitors
GQM1875C2E470JB15
Muruta
C5, C6
8.2 pF Chip Capacitors
GQM1875C2E8R2CB12D
Muruta
C7, C10
1.2 pF Chip Capacitors
GQM1875C2E1R2BB15
Muruta
C8, C9
6.8 pF Chip Capacitors
GQM1875C2E6R8BB15
Muruta
C11, C12
10 μF Chip Capacitors
GQM1875C2E6R8CB12D
Muruta
C13, C14, C15, C16,
C17, C18
68 pF Chip Capacitors
GQM2195C2E680GB15
Muruta
C19, C20, C21
6.8 pF Chip Capacitors
GQM2195C2E6R8BB15
Muruta
C22
3.3 pF Chip Capacitor
GQM2195C2E3R3BB15
Muruta
C23, C24
3.9 pF Chip Capacitors
GQM2195C2E3R9BB15
Muruta
C25, C26
4.7 pF Chip Capacitors
GQM2195C2E4R7BB15
Muruta
C27, C28
1.8 pF Chip Capacitors
GQM2195C2E1R8BB15
Muruta
C29, C30
10 μF Chip Capacitors
C5750X7S2A106M230K
TDK
C31, C32
470 μF, 63 V Chip Capacitors
MCGPR100V477M16X32-RH
Multicomp
R1, R2
5.1 Ω, 1/10 W Chip Resistors
CRCW06035R10FKEA
Vishay
R3
50 Ω, 10 W Termination
06012A25X50−2
Anaren
Z1
800−1000 MHz, 5 dB, Directional Coupler
XC0900A-05S
Anaren
PCB
0.020″, εr = 3.5
RO4350
Rogers
AFT09H310−03SR6 AFT09H310−04GSR6
4
RF Device Data
Freescale Semiconductor, Inc.
20
50
40
ηD
30
20
16
VDD = 28 Vdc, Pout = 56 W (Avg.)
IDQA = 680 mA, VGSB = 0.4 Vdc
Single-Carrier W-CDMA
3.84 MHz Channel Bandwidth
Gps
ACPR
15
14
10
PARC
13
-22
-1
-26
-1.4
-30
-34
12
Input Signal PAR = 9.9 dB @ 0.01%
Probability on CCDF
11
10
820
840
860
880
900
920
-38
940
960
-1.8
-2.2
PARC (dB)
Gps, POWER GAIN (dB)
18
17
ACPR (dBc)
19
ηD, DRAIN
EFFICIENCY (%)
TYPICAL CHARACTERISTICS
-2.6
-42
980
-3
f, FREQUENCY (MHz)
IMD, INTERMODULATION DISTORTION (dBc)
Figure 3. Single−Carrier Output Peak−to−Average Ratio Compression
(PARC) Broadband Performance @ Pout = 56 Watts Avg.
-20
VDD = 28 Vdc, Pout = 50 W (PEP)
IDQA = 680 mA, VGSB = 0.4 Vdc
IM3-L
-30
Two-Tone Measurements
(f1 + f2)/2 = Center Frequency of 940 MHz
IM3-U
-40
IM5-L
-50
IM5-U
-60
IM7-U
IM7-L
-70
10
1
100
TWO-TONE SPACING (MHz)
Figure 4. Intermodulation Distortion Products
versus Two−Tone Spacing
17
16
15
14
1
VDD = 28 Vdc, IDQA = 680 mA, VGSB = 0.4 Vdc
f = 940 MHz, Single-Carrier W-CDMA
3.84 MHz Channel Bandwidth
60
-28
50
-30
ηD
ACPR
0
40
Gps
-1
30
-2 dB = 59 W
-2
-1 dB = 33 W
20
PARC
-3
-4
15
Input Signal PAR = 9.9 dB @ 0.01%
Probability on CCDF
30
45
-3 dB = 82 W
60
-32
-34
ACPR (dBc)
18
OUTPUT COMPRESSION AT 0.01%
PROBABILITY ON CCDF (dB)
Gps, POWER GAIN (dB)
19
2
ηD, DRAIN EFFICIENCY (%)
20
-36
10
-38
0
-40
90
75
Pout, OUTPUT POWER (WATTS)
Figure 5. Output Peak−to−Average Ratio
Compression (PARC) versus Output Power
AFT09H310−03SR6 AFT09H310−04GSR6
RF Device Data
Freescale Semiconductor, Inc.
5
TYPICAL CHARACTERISTICS
940 MHz
960 MHz
920 MHz
10
50
-10
30
20
10
0
400
15
1
0
40
ACPR
920 MHz
940 MHz
960 MHz
16
60
ηD
100
-20
-30
-40
ACPR (dBc)
VDD = 28 Vdc, IDQA = 680 mA
VGSB = 0.4 Vdc, Single-Carrier W-CDMA
20 3.84 MHz, Channel Bandwidth Input
Signal PAR = 9.9 dB @ 0.01%
19 Probability on CCDF
Gps
940 MHz
18
960 MHz
920 MHz
17
ηD, DRAIN EFFICIENCY (%)
Gps, POWER GAIN (dB)
21
-50
-60
Pout, OUTPUT POWER (WATTS) AVG.
Figure 6. Single−Carrier W−CDMA Power Gain, Drain
Efficiency and ACPR versus Output Power
24
VDD = 28 Vdc
Pin = 0 dBm
IDQA = 680 mA
VGSB = 0.4 Vdc
20
GAIN (dB)
16
Gain
12
8
4
0
750
800
850
900
950
1000
1050
1100
1150
f, FREQUENCY (MHz)
Figure 7. Broadband Frequency Response
AFT09H310−03SR6 AFT09H310−04GSR6
6
RF Device Data
Freescale Semiconductor, Inc.
VDD = 28 Vdc, IDQA = 694 mA, Pulsed CW, 10 μsec(on), 10% Duty Cycle
Max Output Power
P1dB
f
(MHz)
Zsource
(W)
Zin
(W)
Zload (1)
(W)
Gain (dB)
(dBm)
(W)
hD
(%)
AM/PM
(5)
920
1.16 - j2.31
1.24 + j2.27
3.28 - j1.37
20.3
52.8
190
54.5
-8.1
940
1.35 - j2.39
1.40 + j2.40
3.44 - j1.49
20.2
52.9
193
55.0
-7.5
960
1.63 - j2.70
1.64 + j2.55
3.64 - j1.33
20.1
53.0
200
55.7
-8.2
Max Output Power
P3dB
Gain (dB)
(dBm)
(W)
hD
(%)
AM/PM
(5)
4.06 - j1.21
17.9
53.9
244
56.5
-13
1.44 + j2.60
4.14 - j1.14
18.0
53.9
247
57.5
-12
1.72 + j2.76
4.29 - j0.91
17.8
54.0
252
58.0
-13
f
(MHz)
Zsource
(W)
Zin
(W)
920
1.16 - j2.31
1.26 + j2.47
940
1.35 - j2.39
960
1.63 - j2.70
Zload
(W)
(2)
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Figure 8. Carrier Side Load Pull Performance — Maximum Power Tuning
VDD = 28 Vdc, IDQA = 694 mA, Pulsed CW, 10 μsec(on), 10% Duty Cycle
Max Drain Efficiency
P1dB
f
(MHz)
Zsource
(W)
Zin
(W)
Zload (1)
(W)
Gain (dB)
(dBm)
(W)
hD
(%)
AM/PM
(5)
920
1.16 - j2.31
0.81 + j1.89
0.96 - j0.03
24.8
49.9
99
68.9
-21
940
1.35 - j2.39
0.94 + j1.98
0.95 - j0.14
24.9
49.9
98
69.9
-21
960
1.63 - j2.70
1.07 + j2.08
0.86 - j0.21
25.0
49.6
92
71.0
-24
Max Drain Efficiency
P3dB
f
(MHz)
Zsource
(W)
Zin
(W)
920
1.16 - j2.31
0.89 + j2.16
940
1.35 - j2.39
1.06 + j2.28
960
1.63 - j2.70
1.39 + j2.49
Gain (dB)
(dBm)
(W)
hD
(%)
AM/PM
(5)
1.06 + j0.03
22.8
50.8
121
70.9
-29
1.10 - j0.07
22.8
50.9
124
72.0
-27
1.40 - j0.21
21.7
51.8
153
71.6
-23
Zload
(W)
(2)
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Figure 9. Carrier Side Load Pull Performance — Maximum Drain Efficiency Tuning
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Zsource Zin
Zload
AFT09H310−03SR6 AFT09H310−04GSR6
RF Device Data
Freescale Semiconductor, Inc.
7
VDD = 28 Vdc, VGSB = 0.4 Vdc, Pulsed CW, 10 μsec(on), 10% Duty Cycle
Max Output Power
P1dB
f
(MHz)
Zsource
(W)
Zin
(W)
Zload (1)
(W)
Gain (dB)
(dBm)
(W)
hD
(%)
AM/PM
(5)
920
1.72 - j3.65
1.84 + j3.30
4.60 - j2.13
13.7
53.8
241
55.6
-8.3
940
2.37 - j3.46
2.28 + j3.50
5.46 - j2.55
13.3
53.9
245
53.1
-7.3
960
2.89 - j3.77
2.85 + j3.70
5.68 - j2.16
13.3
54.0
250
54.1
-7.9
AM/PM
(5)
Max Output Power
P3dB
f
(MHz)
Zsource
(W)
Zin
(W)
920
1.72 - j3.65
1.99 + j3.42
940
2.37 - j3.46
2.43 + j3.61
960
2.89 - j3.77
3.06 + j3.78
Gain (dB)
(dBm)
(W)
hD
(%)
5.63 - j2.02
11.2
54.9
312
56.1
-11
6.13 - j1.80
11.1
55.0
313
55.8
-10
6.35 - j1.22
11.1
55.0
318
56.3
-10
Zload
(W)
(2)
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Figure 10. Peaking Side Load Pull Performance — Maximum Power Tuning
VDD = 28 Vdc, VGSB = 0.4 Vdc, Pulsed CW, 10 μsec(on), 10% Duty Cycle
Max Drain Efficiency
P1dB
f
(MHz)
Zsource
(W)
Zin
(W)
Zload (1)
(W)
Gain (dB)
(dBm)
(W)
hD
(%)
AM/PM
(5)
920
1.72 - j3.65
1.63 + j3.16
1.40 - j0.57
14.9
51.3
135
70.4
-15
940
2.37 - j3.46
1.95 + j3.29
0.95 - j0.75
14.8
50.1
102
72.3
-17
960
2.89 - j3.77
2.52 + j3.52
1.33 - j0.87
14.8
51.1
130
72.7
-16
Max Drain Efficiency
P3dB
f
(MHz)
Zsource
(W)
Zin
(W)
920
1.72 - j3.65
1.74 + j3.32
940
2.37 - j3.46
2.16 + j3.51
960
2.89 - j3.77
2.71 + j3.69
Gain (dB)
(dBm)
(W)
hD
(%)
AM/PM
(5)
1.57 - j0.45
12.9
52.2
167
71.4
-19
1.67 - j0.54
12.8
52.3
171
72.1
-18
1.55 - j0.69
12.8
52.2
164
73.2
-20
Zload
(W)
(2)
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Figure 11. Peaking Side Load Pull Performance — Maximum Drain Efficiency Tuning
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Zsource Zin
Zload
AFT09H310−03SR6 AFT09H310−04GSR6
8
RF Device Data
Freescale Semiconductor, Inc.
P1dB − TYPICAL CARRIER SIDE LOAD PULL CONTOURS — 940 MHz
1
1
0
52
58
0
E
E
56
IMAGINARY (Ω)
IMAGINARY (Ω)
52.5
-1
P
-2
50.5
-3
48.5
49
46
P
44
-2
42
-3
52
50
-4
50 48
54
-1
51
-4
51.5
49.5
-5
-5
0
1
2
3
4
5
6
1
0
2
3
4
5
6
REAL (Ω)
REAL (Ω)
Figure 12. P1dB Load Pull Output Power Contours (dBm)
Figure 13. P1dB Load Pull Efficiency Contours (%)
1
1
21.5
22.5
E
0
22
23
-1
E
19.5
P
19
-2
-3
-8
-10
20
21 20.5
IMAGINARY (Ω)
IMAGINARY (Ω)
0
-1
P
-12
-2
-22
-3
-4
-4
-5
-5
-14
-16
-20
-18
0
1
2
3
4
5
6
0
1
2
3
4
5
REAL (Ω)
REAL (Ω)
Figure 14. P1dB Load Pull Gain Contours (dB)
Figure 15. P1dB Load Pull AM/PM Contours (5)
NOTE:
P
= Maximum Output Power
E
= Maximum Drain Efficiency
6
Gain
Drain Efficiency
Linearity
Output Power
AFT09H310−03SR6 AFT09H310−04GSR6
RF Device Data
Freescale Semiconductor, Inc.
9
P3dB − TYPICAL CARRIER SIDE LOAD PULL CONTOURS — 940 MHz
1
1
0
0
E
E
IMAGINARY (Ω)
IMAGINARY (Ω)
56 54
-1
P
53.5
-2
53
-3
49.5
50
-2
48
-3
51.5
51
50.5
1
46
44
42
40
-4
-5
0
52
P
52.5
50
-4
-1
52
-5
2
3
4
5
6
0
1
2
3
4
5
6
REAL (Ω)
REAL (Ω)
Figure 16. P3dB Load Pull Output Power Contours (dBm)
Figure 17. P3dB Load Pull Efficiency Contours (%)
1
1
20.5
0
0
19
-1
E
18
18.5
P
17.5
IMAGINARY (Ω)
20
21
IMAGINARY (Ω)
19.5
E
17
-2
-3
-1
P
-16
-12
-14
-2
-26
-28 -24
-3
-18
-20
-22
-4
-4
-5
-5
0
1
2
3
4
5
6
0
1
2
3
4
5
REAL (Ω)
REAL (Ω)
Figure 18. P3dB Load Pull Gain Contours (dB)
Figure 19. P3dB Load Pull AM/PM Contours (5)
NOTE:
P
= Maximum Output Power
E
= Maximum Drain Efficiency
6
Gain
Drain Efficiency
Linearity
Output Power
AFT09H310−03SR6 AFT09H310−04GSR6
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RF Device Data
Freescale Semiconductor, Inc.
P1dB − TYPICAL PEAKING SIDE LOAD PULL CONTOURS — 940 MHz
0
0
60
E
-1
IMAGINARY (Ω)
-1
IMAGINARY (Ω)
48
52
56
E
-2
P
49.5
-3
51.5
50.5
52.5
54
58
50
-2
P
-3
48
53.5
53
46
-4
-4
50
51
44
52
-5
-5
0
2
1
3
4
5
6
0
7
2
1
3
4
6
5
7
REAL (Ω)
REAL (Ω)
Figure 20. P1dB Load Pull Output Power Contours (dBm)
Figure 21. P1dB Load Pull Efficiency Contours (%)
0
0
14.5 E
E
-1
IMAGINARY (Ω)
IMAGINARY (Ω)
-1
15
-2
14.5
P
14
-3
-6
-2
-14
-18
-8
-10
-12
P
-3
-16
-20
13.5
13
-4
-4
12.5
-5
-5
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
REAL (Ω)
REAL (Ω)
Figure 22. P1dB Load Pull Gain Contours (dB)
Figure 23. P1dB Load Pull AM/PM Contours (5)
NOTE:
P
= Maximum Output Power
E
= Maximum Drain Efficiency
7
Gain
Drain Efficiency
Linearity
Output Power
AFT09H310−03SR6 AFT09H310−04GSR6
RF Device Data
Freescale Semiconductor, Inc.
11
P3dB − TYPICAL PEAKING SIDE LOAD PULL CONTOURS — 940 MHz
0
0
E
E
-1
IMAGINARY (Ω)
IMAGINARY (Ω)
-1
P
-2
-3
54.5
51
-4
56
53
53.5
50
48
46
44
-3
42
54
52.5
51.5
P
54
52
-4
52
50.5
58
-2
-5
-5
0
1
2
3
5
4
6
0
7
1
2
3
4
5
6
7
REAL (Ω)
REAL (Ω)
Figure 24. P3dB Load Pull Output Power Contours (dBm)
Figure 25. P3dB Load Pull Efficiency Contours (%)
0
0
E
E
-1
P
13
-2
IMAGINARY (Ω)
IMAGINARY (Ω)
-1
12.5
11
12
-3
P
-2
-16
-18
-22
-3
11.5
-12
-20
-24
-28
-14
-4
-4
-26
10.5
-5
-5
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
REAL (Ω)
REAL (Ω)
Figure 26. P3dB Load Pull Gain Contours (dB)
Figure 27. P3dB Load Pull AM/PM Contours (5)
NOTE:
P
= Maximum Output Power
E
= Maximum Drain Efficiency
7
Gain
Drain Efficiency
Linearity
Output Power
AFT09H310−03SR6 AFT09H310−04GSR6
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RF Device Data
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PACKAGE DIMENSIONS
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RF Device Data
Freescale Semiconductor, Inc.
13
AFT09H310−03SR6 AFT09H310−04GSR6
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RF Device Data
Freescale Semiconductor, Inc.
AFT09H310−03SR6 AFT09H310−04GSR6
RF Device Data
Freescale Semiconductor, Inc.
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AFT09H310−03SR6 AFT09H310−04GSR6
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RF Device Data
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PRODUCT DOCUMENTATION, SOFTWARE AND TOOLS
Refer to the following documents, software and tools to aid your design process.
Application Notes
• AN1955: Thermal Measurement Methodology of RF Power Amplifiers
Engineering Bulletins
• EB212: Using Data Sheet Impedances for RF LDMOS Devices
Software
• Electromigration MTTF Calculator
• RF High Power Model
• .s2p File
Development Tools
• Printed Circuit Boards
For Software and Tools, do a Part Number search at http://www.freescale.com, and select the “Part Number” link. Go to the
Software & Tools tab on the part’s Product Summary page to download the respective tool.
REVISION HISTORY
The following table summarizes revisions to this document.
Revision
Date
Description
0
July 2013
• Initial Release of Data Sheet
1
Sept. 2013
• On Characteristics table, Side B (Peaking): corrected VGS(th) Typ value from 2.0 to 1.5 Vdc, p. 2
AFT09H310−03SR6 AFT09H310−04GSR6
RF Device Data
Freescale Semiconductor, Inc.
17
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E 2013 Freescale Semiconductor, Inc.
AFT09H310−03SR6 AFT09H310−04GSR6
Document Number: AFT09H310−03S
Rev.
18 1, 9/2013
RF Device Data
Freescale Semiconductor, Inc.
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