28LV010 - EEPROM, 1Mb (128K x 8) .480” Wide

28LV010
3.3V 1 Megabit (128K x 8-Bit)
EEPROM
28LV010
FEATURES:
DESCRIPTION:
• 3.3V low voltage operation 128k x 8 Bit EEPROM
• RAD-PAK® radiation-hardened against natural space
radiation
• Total dose hardness:
- > 100 krad (Si), depending upon space mission
• Excellent Single event effects @ 25°C
- SEL > 120 MeV cm2/mg (Device)
- SEU > 85 MeV cm2/mg(Memory Cells)
- SEU > 18 MeV cm2/mg (Write Mode)
- SET > 40 MeV cm2/mg (Read Mode)
• Package:
- 32 Pin RAD-PAK® flat pack
- 32 Pin RAD-PAK® DIP
- JEDEC-approved byte-wide pinout
• Address Access Time:
- 200, 250 ns maximum access times available
• High endurance:
- 10,000 erase/write (in Page Mode)
- 10-year data retention
• Page write mode:
- 1 to 128 bytes
• Automatic programming
- 15 ms automatic page/byte write
• Low power dissipation
- 20 mW/MHz active current (typ.)
- 72 µW standby (maximum)
• Standard JEDEC package width
Maxwell Technologies’ 28LV010 high density, 3.3V, 1 Megabit
EEPROM microcircuit features a greater than 100 krad (Si)
total dose tolerance, depending upon space mission. The
28LV010 is capable of in-system electrical Byte and Page programmability. It has a 128-Byte Page Programming function to
make its erase and write operations faster. It also features
Data Polling and a Ready/Busy signal to indicate the completion of erase and programming operations. In the 28LV010,
hardware data protection is provided with the RES pin, in addition to noise protection on the WE signal and write inhibit on
power on and off. Meanwhile, software data protection is
implemented using the JEDEC-optional standard algorithm.
The 28LV010 is designed for high reliability in the most
demanding space applications.
Maxwell Technologies' patented RAD-PAK® packaging technology incorporates radiation shielding in the microcircuit package. It eliminates the need for box shielding while providing
the required radiation shielding for a lifetime in orbit or space
mission. In a GEO orbit, RAD-PAK® provides greater than 100
krad (Si) radiation dose tolerance. This product is available
with screening up to Class S.
07.12.2013 Rev 9
(858) 503-3300 - Fax: (858) 503-3301- www.maxwell.com
All data sheets are subject to change without notice
1
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All rights reserved.
Memory
Logic Diagram
28LV010
3.3V 1 Megabit (128K x 8-Bit) EEPROM
TABLE 1. 28LV010 PINOUT DESCRIPTION
PIN
SYMBOL
12-5, 27, 26, 23, 25, A0-A16
4, 28, 3, 31, 2
13-15, 17-21
DESCRIPTION
Address
I/O0 - I/O7
Input/Output
24
OE
Output Enable
22
CE
Chip Enable
29
WE
Write Enable
32
VCC
Power Supply
16
VSS
Ground
1
RDY/BUSY
Ready/Busy
30
RES
Reset
Memory
TABLE 2. 28LV010 ABSOLUTE MAXIMUM RATINGS
PARAMETER
Supply Voltage (Relative to Vss)
SYMBOL
MIN
VCC
-0.6
-0.5
TYP
1
MAX
UNIT
7.0
V
7.0
V
Input Voltage (Relative to Vss)
VIN
Package Weight
RP
7.38
RT
2.69
RD
10.97
Thermal Impedence
FJC
2.17
Operating Temperature Range
TOPR
-55
125
°C
Storage Temperature Range
TSTG
-65
150
°C
Grams
°C/W
1. VIN min = -3.0 V for pulse width < 50 ns.
TABLE 3. DELTA LIMITS1
PARAMETER
VARIATION2
ICC1
±10%
ICC2
±10%
ICC3A
±10%
ICC3B
±10%
1. Parameters are measured and recorded as Deltas per
MIL-STD-883 for Class S Devices
2. Specified in Table 6
07.12.2013 Rev 9
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28LV010
3.3V 1 Megabit (128K x 8-Bit) EEPROM
TABLE 4. 28LV010 RECOMMENDED OPERATING CONDITIONS
PARAMETER
SYMBOL
MIN
MAX
UNIT
Supply Voltage
VCC
3.0
3.6
V
Input Voltage
VIL
VIH
VH
-0.3 1
2.0 2
VCC-0.5
0.8
VCC+0.3
VCC +1
V
TOPR
-55
+125
°C
SYMBOL
MIN
MAX
UNIT
CIN
--
6
pF
COUT
--
12
pF
RES_PIN
Operating Temperature Range
1. VIL min = -1.0 V for pulse width < 50 ns.
2. VIH min = 2.2 V for VCC = 3.6 V.
TABLE 5. 28LV010 CAPACITANCE
(TA = 25°C, F = 1MHZ)
PARAMETER
Output Capacitance: VOUT = 0V 1
Memory
Input Capacitance: VIN = 0V 1
1. Guaranteed by design.
TABLE 6. 28LV010 DC ELECTRICAL CHARACTERISTICS
(VCC = 3.3V ± 0.3, TA = -55 TO +125°C UNLESS OTHERWISE SPECIFIED)
PARAMETER
TEST CONDITIONS
SYMBOL SUBGROUPS
MIN
MAX
UNIT
ILI
1, 2, 3
--
21
µA
Output Leakage Current VCC = 3.6V, VOUT = 3.6V/0.4V
ILO
1, 2, 3
--
2
µA
Standby VCC Current
CE = VCC
CE = VIH
ICC1
ICC2
1, 2, 3
---
20
1
µA
mA
Operating VCC Current
IOUT = 0mA, Duty = 100%,
Cycle = 1 µs @ VCC = 3.3V
IOUT = 0mA, Duty = 100%,
Cycle = 200 ns @ VCC = 3.3V
ICC3
1, 2, 3
---
6
Input Leakage Current
VCC = 3.6V, VIN = 3.6V
mA
15
Input Voltage
VIL
VIH
VH
1, 2, 3
-2.02
VCC-0.5
0.8
---
V
Output Voltage3
VOL
VOH
VOH
1, 2, 3
-VCC x 0.8
VCC- 0.3
0.4
---
V
IOL = 2.1 mA
IOH = - 0.4 mA
IOH = - 0.1 mA
1. ILI on RES = 100 uA max.
2. VIH min = 2.2V for VCC = 3.6V.
3. Rdy/Bsy is an open collector output.
07.12.2013 Rev 9
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28LV010
3.3V 1 Megabit (128K x 8-Bit) EEPROM
TABLE 7. 28LV010 AC CHARACTERISTICS FOR READ OPERATION1
(VCC = 3.3V ± 10%, TA = -55 TO +125 °C UNLESS OTHERWISE SPECIFIED)
PARAMETER
TEST CONDITIONS
Address Access Time
-200
-250
CE = OE = VIL, WE = VIH
Chip Enable Access Time
-200
-250
OE = VIL, WE = VIH
Output Enable Access Time
-200
-250
CE = VIL, WE = VIH
SYMBOL
SUBGROUPS
tACC
9, 10, 11
tCE
tOE
tOH
Output Disable to High-Z2
-200
-250
tDF
CE = VIL, WE = VIH
Output Disable to High-Z
-200
-250
CE =OE= VIL, WE = VIH
RES to Output Delay 3
-200
-250
CE = OE = VIL WE = VIH
tDFR
tRR
MAX
---
200
250
---
200
250
0
0
110
120
0
0
---
0
0
50
50
0
0
300
350
0
0
525
600
UNIT
ns
9, 10, 11
ns
9, 10, 11
ns
9, 10, 11
ns
9, 10, 11
ns
9, 10, 11
Memory
Output Hold to Address Change
CE = OE = VIL, WE = VIH
-200
-250
MIN
ns
9, 10, 11
ns
1. Test conditions: Input pulse levels - 0.4V to 2.4V; input rise and fall times < 20 ns; output load - 1 TTL gate + 100 pF (including
scope and jig); reference levels for measuring timing - 0.8V/1.8V.
2. tDF and tDFR is defined as the time at which the output becomes an open circuit and data is no longer driven.
3. Guaranteed by design.
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28LV010
3.3V 1 Megabit (128K x 8-Bit) EEPROM
TABLE 8. 28LV010 AC ELECTRICAL CHARACTERISTICS FOR ERASE AND WRITE OPERATIONS
(VCC = 3.3V ± 10%, TA = -55 TO +125 °C UNLESS OTHERWISE SPECIFIED)
PARAMETER
SUBGROUPS
Address Setup Time
-200
-250
tAS
9, 10, 11
Chip Enable to Write Setup Time (WE controlled)
-200
-250
tCS
Write Pulse Width (CE controlled)
-200
-250
tCW
Write Pulse Width (WE controlled)
-200
-250
tWP
Address Hold Time
-200
-250
tAH
Data Setup Time
-200
-250
tDS
Data Hold Time
-200
-250
tDH
Chip Enable Hold Time (WE controlled)
-200
-250
tCH
Write Enable to Write Setup Time (CE controlled)
-200
-250
tWS
Write Enable Hold Time (CE controlled)
-200
-250
tWH
Output Enable to Write Setup Tim
-200
-250
tOES
Output Enable Hold Time
-200
-250
tOEH
Write Cycle Time 1,2
-200
-250
tWC
07.12.2013 Rev 9
MIN
MAX
0
0
---
0
0
---
200
250
---
200
250
---
125
150
---
100
100
---
10
10
---
0
0
---
0
0
---
0
0
---
0
0
---
0
0
---
---
15
15
UNIT
ns
9, 10, 11
ns
9, 10, 11
ns
9, 10, 11
ns
9, 10, 11
ns
9, 10, 11
Memory
SYMBOL
ns
9, 10, 11
ns
9, 10, 11
ns
9, 10, 11
ns
9, 10, 11
ns
9, 10, 11
ns
9, 10, 11
ns
9, 10, 11
ms
All data sheets are subject to change without notice
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©2013 Maxwell Technologies
All rights reserved.
28LV010
3.3V 1 Megabit (128K x 8-Bit) EEPROM
TABLE 8. 28LV010 AC ELECTRICAL CHARACTERISTICS FOR ERASE AND WRITE OPERATIONS
(VCC = 3.3V ± 10%, TA = -55 TO +125 °C UNLESS OTHERWISE SPECIFIED)
PARAMETER
SUBGROUPS
Byte Load Cycle
-200
-250
tBLC
9, 10, 11
Data Latch Time2
-200
-250
tDL
Byte Load Window 2
-200
-250
tBL
Time to Device Busy
-200
-250
tDB
Write Start Time
-200
-250
tDW
RES to Write Setup Time2
-200
-250
tRP
VCC to RES Setup Time 2
-200
-250
tRES
MIN
MAX
1
1
30
30
700
750
-
100
100
---
100
120
---
150
250
---
100
100
---
1
1
---
UNIT
µs
9, 10, 11
ns
9, 10, 11
µs
9, 10, 11
ns
9, 10, 11
ns
9, 10, 11
Memory
SYMBOL
µs
9, 10, 11
µs
1. tWC must be longer than this value unless polling techniques or RDY/BSY are used. This device automatically completes the
internal write operation within this value.
2. Guaranteed by design.
TABLE 9. 28LV010 MODE SELECTION1,2
MODE
CE
OE
WE
RES
RDY/BUSY
I/O
Read
VIL
VIL
VIH
VH
High-Z
DOUT
Standby
VIH
X
X
X
High-Z
High-Z
Write
VIL
VIH
VIL
VH
High-Z --> VOL
DIN
Deselect
VIL
VIH
VIH
VH
High-Z
High-Z
Write Inhibit
X
X
VIH
X
--
--
X
VIL
X
X
--
--
Data Polling
VIL
VIL
VIH
VH
VOL
Data Out (I/O7)
Program
X
X
X
VIL
High-Z
High-Z
1. X = Don’t care.
2. Refer to the recommended DC operating conditions.
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28LV010
3.3V 1 Megabit (128K x 8-Bit) EEPROM
FIGURE 1. READ TIMING WAVEFORM
Memory
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28LV010
3.3V 1 Megabit (128K x 8-Bit) EEPROM
FIGURE 2. BYTE WRITE TIMING WAVEFORM(1) (WE CONTROLLED)
Memory
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28LV010
3.3V 1 Megabit (128K x 8-Bit) EEPROM
FIGURE 3. BYTE WRITE TIMING WAVEFORM (2) (CE CONTROLLED)
Memory
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28LV010
3.3V 1 Megabit (128K x 8-Bit) EEPROM
FIGURE 4. PAGE WRITE TIMING WAVEFORM(1) (WE CONTROLLED)
Memory
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28LV010
3.3V 1 Megabit (128K x 8-Bit) EEPROM
FIGURE 5. PAGE WRITE TIMING WAVEFORM(2) (CE CONTROLLED)
Memory
FIGURE 6. SOFTWARE DATA PROTECTION TIMING WAVEFORM(1) (IN PROTECTION MODE)
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28LV010
3.3V 1 Megabit (128K x 8-Bit) EEPROM
FIGURE 7. SOFTWARE DATA PROTECTION TIMING WAVEFORM(2) (IN NON-PROTECTION MODE)
FIGURE 8. DATA POLLING TIMING WAVEFORM
Memory
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28LV010
3.3V 1 Megabit (128K x 8-Bit) EEPROM
FIGURE 9. TOGGLE BIT WAVEFORM
This application note describes the programming procedures for the EEPROM modules and with details of various
techniques to preserve data protection.
Automatic Page Write
Page-mode write feature allows 1 to 128 bytes of data to be written into the EEPROM in a single write cycle, and
allows the undefined data within 128 bytes to be written corresponding to the undefined address (A0 to A6). Loading
the first byte of data, the data load window opens 30 µs for the second byte. In the same manner each additional byte
of data can be loaded within 30µs. In case CE and WE are kept high for 100µs after data input, EEPROM enters
erase and write mode automatically and only the input data are written into the EEPROM.
WE CE Pin Operation
During a write cycle, addresses are latched by the falling edge of WE or CE, and data is latched by the rising edge of
WE or CE.
Data Polling
Data Polling function allows the status of the EEPROM to be determined. If EEPROM is set to read mode during a
write cycle, an inversion of the last byte of data to be loaded outputs from I/O 7 to indicate that the EEPROM is performing a write operation.
RDY/Busy Signal
RDY/Busy signal also allows a comparison operation to determine the status of the EEPROM. The RDY/Busy signal
has high impedance except in write cycle and is lowered to VOL after the first write signal. At the-end of a write cycle,
the RDY/Busy signal changes state to high impedance.
07.12.2013 Rev 9
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Memory
EEPROM APPLICATION NOTES
28LV010
3.3V 1 Megabit (128K x 8-Bit) EEPROM
RES Signal
When RES is LOW, the EEPROM cannot be read and programmed. Therefore, data can be protected by keeping
RES low when VCC is switched. RES should be high during read and programming because it doesn’t provide a latch
function.
Data Protection
1. Data Protection against Noise of Control Pins (CE, OE, WE) during Operation.
During readout or standby, noise on the control pins may act as a trigger and turn the EEPROM to programming mode by mistake. To prevent this phenomenon, the EEPROM has a noise cancellation function that cuts noise if its width is 20 ns or less in
programming mode. Be careful not to allow noise of a width of more than 20 ns on the control pins.
2. Data Protection at VCC on/off
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Memory
To protect the data during operation and power on/off, the EEPROM has the internal functions described below.
28LV010
3.3V 1 Megabit (128K x 8-Bit) EEPROM
When VCC is turned on or off, noise on the control pins generated by external circuits, such as CPUs, may turn the EEPROM to
programming mode by mistake. To prevent this unintentional programming, the EEPROM must be kept in unprogrammable
state during VCC on/off by using a CPU reset signal to RES pin.
RES should be kept at VSS level when VCC is turned on or off. The EEPROM breaks off programming operation when RES
become low, programming operation doesn’t finish correctly in case that RES falls low during programming operation. RES
should be kept high for 10 ms after the last data input.
Memory
15ms min
3. Software Data Protection
The software data protection function is to prevent unintentional programming caused by noise generated by external circuits.
In software data protection mode, 3 bytes of data must be input before write data as follows. These bytes can switch the nonprotection mode to the protection mode.
Software data protection mode can be canceled by inputting the following 6 bytes. Then, the EEPROM turns to the non-protection mode and can write data normally. However, when the data is input in the canceling cycle, the data cannot be written.
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28LV010
3.3V 1 Megabit (128K x 8-Bit) EEPROM
Memory
32-PIN RAD-PAK® FLAT PACKAGE
SYMBOL
DIMENSION
MIN
NOM
MAX
A
0.121
0.134
0.147
b
0.015
0.017
0.022
c
0.004
0.005
0.009
D
--
0.820
0.830
E
0.472
0.480
0.488
E1
--
--
0.498
E2
0.304
0.310
--
E3
0.030
0.085
--
e
0.050BSC
L
0.355
0.365
0.375
Q
0.020
0.035
0.045
S1
0.005
0.027
--
N
32
Note: All dimensions in inches
Top and Bottom of the package is connected internally to ground.
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28LV010
3.3V 1 Megabit (128K x 8-Bit) EEPROM
Memory
32 PIN RAD-TOLERANT FLAT PACK
SYMBOL
DIMENSION
MIN
NOM
MAX
A
0.095
0.109
0.125
b
0.015
0.017
0.022
c
0.004
0.005
0.009
D
--
0.820
0.830
E
0.472
0.480
0.488
E1
--
--
0.498
E2
0.350
0.365
--
E3
0.030
0.085
--
e
0.050BSC
L
0.355
0.365
0.375
Q
0.020
0.035
0.045
S1
0.005
0.027
--
N
32
Note: All Dimentions in Inches
Top and Bottom of the package is connected internally to ground.
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©2013 Maxwell Technologies
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28LV010
3.3V 1 Megabit (128K x 8-Bit) EEPROM
Memory
32 PIN DUAL IN-LINE PACKAGE
DIMENSION
SYMBOL
MIN
NOM
MAX
A
--
0.152
0.225
b
0.014
0.018
0.026
b2
0.045
0.050
0.065
c
0.008
0.010
0.018
D
--
1.600
1.680
E
0.510
0.590
0.620
eA
0.600 BSC
eA/2
0.300 BSC
e
0.100 BSC
L
0.135
0.145
0.155
Q
0.015
0.037
0.070
S1
0.005
0.025
--
S2
0.005
--
--
N
32
Note: All Dimentions in Inches
Top and Bottom of the package is connected internally to ground.
07.12.2013 Rev 9
All data sheets are subject to change without notice
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©2013 Maxwell Technologies
All rights reserved.
3.3V 1 Megabit (128K x 8-Bit) EEPROM
28LV010
Important Notice:
These data sheets are created using the chip manufacturers published specifications. Maxwell Technologies verifies
functionality by testing key parameters either by 100% testing, sample testing or characterization.
The specifications presented within these data sheets represent the latest and most accurate information available to
date. However, these specifications are subject to change without notice and Maxwell Technologies assumes no
responsibility for the use of this information.
Maxwell Technologies’ products are not authorized for use as critical components in life support devices or systems
without express written approval from Maxwell Technologies.
Any claim against Maxwell Technologies must be made within 90 days from the date of shipment from Maxwell Technologies. Maxwell Technologies’ liability shall be limited to replacement of defective parts.
Memory
07.12.2013 Rev 9
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©2013 Maxwell Technologies
All rights reserved.
28LV010
3.3V 1 Megabit (128K x 8-Bit) EEPROM
Product Ordering Options
Model Number
28LV010 XX
X
X
-XX
Option Details
Feature
Access Time
Screening Flow
Monolithic
S = Maxwell Class S
B = Maxwell Class B
I = Industrial (testing @ -55°C, +25°C, +125°C)
E = Engineering (testing @ +25°C)
Memory
Package
20 = 200 ns
25 = 250 ns
D = Dual In-line Package (DIP)1
F = Flat Pack
Radiation Feature2
RP = RAD-PAK® package
RT = No Radiation Guarantee
Class E and I Only
RT1 = 10 Krad (Read and Write)
RT2R = 25 Krad (Read); 15 Krad (Write)
RT4R = 40 Krad (Read); 15 Krad (Write)
RT6R = 60 Krad (Read); 15 Krad (Write)
Base Product
Nomenclature
3.3V 1 Megabit (128K x 8-Bit) EEPROM
1.) Standard Product Screening Flow MIL-STD-883, Method 2001, Constant Acceleration :For DIP package type Constant Acceleration is 3000g’s.
2.) Products are manufactured and screened to Maxwell Technologies’ self-defined Class B and
Class S.
3.) The device will meet the specified read mode TID level, at the die level, if it is not written to
during irradiation. Writing to the device during irradiation will reduce the device’s TID tolerance to
the specified write mode TID level. Writing to the device before irradiation does not alter the
device’s read mode TID level.
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