28C011T - EEPROM, 1 Mb (128kb x 8) .410” Wide

28C011T
1 Megabit (128K x 8-Bit) EEPROM
VCC
High Voltage
Generator
VSS
I/O0
I/O7
RDY/Busy
RES
I/O Buffer and
Input Latch
OE
CE
Control Logic Timing
WE
RES
28C011T
A0
Y Decoder
Y Gating
X Decoder
Memory Array
A6
Address
Buffer and
Latch
A7
A16
Data Latch
Memory
Logic Diagram
FEATURES:
DESCRIPTION:
• 128k x 8-bit EEPROM
• RAD-PAK® radiation-hardened against natural space radiation
• Total dose hardness:
- > 100 krad (Si), depending upon space mission
• Excellent Single event effects @ 25°C
- SELTH > 120 MeV cm2/mg (Device)
- SEUTH > 90 MeV cm2/mg(Memory Cells)
- SEU TH > 18 MeV cm2/mg (Write Mode)
- SETTH > 40 MeV cm2/mg (Read Mode)
• Package:
- 32-pin RAD-PAK® flat package
- 32-pin Rad-Tolerant flat package
- JEDEC-approved byte-wide pinout
• High speed:
- 120, 150, and 200 ns maximum access times available
• High endurance:
- 10,000 erase/write (in Page Mode),
- 10 year data retention
• Page write mode:
- 1 to 128 bytes
• Low power dissipation
- 20 mW/MHz active (typical)
- 110 µW standby (maximum)
Maxwell Technologies’ 28C011T high-density 1 Megabit (128K
x 8-Bit) EEPROM microcircuit features a greater than 100
krad (Si) total dose tolerance, depending upon space mission.
The 28C011T is capable of in-system electrical byte and page
programmability. It has a 128-byte page programming function
to make its erase and write operations faster. It also features
data polling and a Ready/Busy signal to indicate the completion of erase and programming operations. In the 28C010T,
hardware data protection is provided with the RES pin, in addition to noise protection on the WE signal and write inhibit on
power on and off. Software data protection is implemented
using the JEDEC optional standard algorithm.
Maxwell Technologies' patented RAD-PAK® packaging technology incorporates radiation shielding in the microcircuit package. It eliminates the need for box shielding while providing
the required radiation shielding for a lifetime in orbit or space
mission. In a GEO orbit, RAD-PAK® provides greater than 100
krad (Si) radiation dose tolerance. This product is available
with screening up to Maxwell’s self-defined Class S.
03.24.15 Rev 14
(858) 503-3300- Fax: (858) 503-3301 - www.maxwell.com
All data sheets are subject to change without notice
1
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All rights reserved.
28C011T
1 Megabit (128K x 8-Bit) EEPROM
TABLE 1. 28C011T PINOUT DESCRIPTION
PIN
SYMBOL
DESCRIPTION
12-5, 27, 26, 23, 25, 4, 28, 3, 31, 2
A0-A16
24
OE
Output Enable
22
CE
Chip Enable
29
WE
Write Enable
32
VCC
Power Supply
16
VSS
Ground
1
RDY/BUSY
30
RES
Address
Ready/Busy
Reset
TABLE 2. 28C011T ABSOLUTE MAXIMUM RATINGS
SYMBOL
MIN
MAX
UNITS
Supply Voltage (Relative to VSS)
VCC
-0.6
+7.0
V
Input Voltage (Relative to VSS)
VIN
-0.5
+7.0
V
-55
+125
°C
Operating Temperature Range
TOPR
Storage Temperature Range
TSTG
-65
+150
°C
1
Memory
PARAMETER
1. VIN min = -3.0V for pulse width < 50ns.
TABLE 3. DELTA LIMITS
PARAMETER
VARIATION
ICC1
±10%
ICC2
±10%
ICC3A
±10%
ICC3B
±10%
TABLE 4. 28C011T RECOMMENDED OPERATING CONDITIONS
PARAMETER
SYMBOL
MIN
MAX
UNITS
Supply Voltage
VCC
4.5
5.5
V
Input Voltage
VIL
-0.31
0.8
V
VIH
2.2
VCC +0.3
VH
VCC -0.5
VCC +1
TOPR
-55
+125
RES_PIN
Operating Temperature Range
°C
1. VIL min = -1.0V for pulse width < 50 ns
03.24.15 Rev 14
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28C011T
1 Megabit (128K x 8-Bit) EEPROM
TABLE 5. 28C011T CAPACITANCE
(TA = 25 °C, f = 1 MHZ)
PARAMETER
Input Capacitance: VIN = 0V 1
Output Capacitance: VOUT = 0V 1
SYMBOL
MIN
MAX
UNITS
CIN
--
6
pF
COUT
--
12
pF
1. Guaranteed by design.
TABLE 6. 28C011T DC ELECTRICAL CHARACTERISTICS
(VCC = 5V ± 10%, TA = -55 TO +125 °C, UNLESS OTHERWISE SPECIFIED)
PARAMETER
TEST CONDITION
Input Leakage Current
SYMBOL
MIN
MAX
UNITS
VCC = 5.5V, VIN = 5.5V
1, 2, 3
IIL
--
21
µA
Output Leakage Current
VCC = 5.5V, VOUT = 5.5V/0.4V
1, 2, 3
ILO
--
2
µA
Standby VCC Current
CE = VCC
1, 2, 3
ICC1
--
20
µA
ICC2
--
1
mA
ICC3
--
15
mA
--
50
VIL
--
0.8
VIH
2.2
--
VH
VCC -0.5
--
VOL
--
0.4
IOH = -0.4 mA
VOH
2.4
--
IOH = -0.1mA
VOH
VCC-0.3V
CE = VIH
Operating VCC Current
IOUT = 0mA, Duty = 100%, Cycle =
1µs at VCC = 5.5V
1, 2, 3
IOUT = 0mA, Duty = 100%, Cycle =
150ns at VCC = 5.5V
1, 2, 3
1, 2, 3
Input Voltage
RES_PIN
Output Voltage
IOL = 2.1 mA
1, 2, 3
Memory
SUBGROUPS
V
V
1. ILI on RES = 100 uA max.
TABLE 7. 28C011T AC ELECTRICAL CHARACTERISTICS FOR READ OPERATION 1
(VCC = 5V + 10%, TA = -55 TO +125 °C)
PARAMETER
SYMBOL
SUBGROUPS
Address Access Time
CE = OE = VIL, WE = VIH
-120
-150
-200
tACC
9, 10, 11
Chip Enable Access Time
OE = VIL, WE = VIH
-120
-150
-200
tCE
MIN
UNITS
ns
----
120
150
200
ns
9, 10, 11
----
03.24.15 Rev 14
MAX
120
150
200
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28C011T
1 Megabit (128K x 8-Bit) EEPROM
TABLE 7. 28C011T AC ELECTRICAL CHARACTERISTICS FOR READ OPERATION 1
(VCC = 5V + 10%, TA = -55 TO +125 °C)
PARAMETER
SYMBOL
SUBGROUPS
Output Enable Access Time
CE = VIL, WE = VIH
-120
-150
-200
tOE
9, 10, 11
Output Hold to Address Change
CE = OE = VIL, WE = VIH
-120
-150
-200
tOH
MIN
MAX
ns
0
0
0
75
75
100
ns
9, 10, 11
0
0
0
---ns
9, 10, 11
tDF
tDFR
RES to Output Delay3
CE = OE = VIL, WE = VIH
-120
-150
-200
tRR
0
0
0
50
50
60
0
0
0
300
350
450
Memory
Output Disable to High-Z 2
CE = VIL, WE = VIH
-120
-150
-200
CE = OE = VIL, WE = VIH
-120
-150
-200
UNITS
ns
9, 10, 11
----
400
450
650
1. Test conditions: Input pulse levels - 0.4V to 2.4V; input rise and fall times < 20ns; output load - 1 TTL gate + 100pF (including
scope and jig); reference levels for measuring timing - 0.8V/1.8V.
2. tDF and tDFR are defined as the time at which the output becomes an open circuit and data is no longer driven.
3. Guaranteed by design.
TABLE 8. 28C011T AC ELECTRICAL CHARACTERISTICS FOR PAGE/BYTE ERASE AND BYTE WRITE
OPERATIONS
(VCC = 5V + 10%, TA = -55 TO +125 °C)
PARAMETER
SYMBOL
SUBGROUPS
Address Setup Time
-120
-150
-200
tAS
9, 10, 11
Chip Enable to Write Setup Time (WE controlled)
-120
-150
-200
tCS
9, 10, 11
03.24.15 Rev 14
MIN 1
MAX
0
0
0
----
0
0
0
----
UNITS
ns
ns
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28C011T
1 Megabit (128K x 8-Bit) EEPROM
TABLE 8. 28C011T AC ELECTRICAL CHARACTERISTICS FOR PAGE/BYTE ERASE AND BYTE WRITE
OPERATIONS
(VCC = 5V + 10%, TA = -55 TO +125 °C)
PARAMETER
Write Pulse Width
CE controlled
-120
-150
-200
WE controlled
-120
-150
-200
SYMBOL
SUBGROUPS
MIN 1
MAX
200
250
350
----
200
250
350
----
150
150
200
----
75
100
150
----
10
10
10
----
0
0
0
----
0
0
0
----
0
0
0
----
0
0
0
----
0
0
0
----
UNITS
9, 10, 11
ns
tCW
tWP
tAH
9, 10, 11
Data Setup Time
-120
-150
-200
tDS
9, 10, 11
Data Hold Time
-120
-150
-200
tDH
9, 10, 11
Chip Enable Hold Time (WE controlled)
-120
-150
-2000
tCH
9, 10, 11
Write Enable to Write Setup Time (CE controlled)
-120
-150
-200
tWS
9, 10, 11
Write Enable Hold Time (CE controlled)
-120
-150
-200
tWH
9, 10, 11
Output Enable to Write Setup Time
-120
-150
-200
tOES
9, 10, 11
Output Enable Hold Time
-120
-150
-200
tOEH
9, 10, 11
03.24.15 Rev 14
ns
Memory
Address Hold Time
-120
-150
-200
ns
ns
ns
ns
ns
ns
ns
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28C011T
1 Megabit (128K x 8-Bit) EEPROM
TABLE 8. 28C011T AC ELECTRICAL CHARACTERISTICS FOR PAGE/BYTE ERASE AND BYTE WRITE
OPERATIONS
(VCC = 5V + 10%, TA = -55 TO +125 °C)
PARAMETER
SUBGROUPS
Write Cycle Time2
-120
-150
-200
tWC
9, 10, 11
Data Latch Time
-120
-150
-200
tDL
9, 10, 11
Byte Load Window
-120
-150
-200
tBL
9, 10, 11
Byte Load Cycle
-120
-150
-200
tBLC
9, 10, 11
Time to Device Busy
-120
-150
-200
tDB
9, 10, 11
Write Start Time3
-120
-150
-200
tDW
9, 10, 11
RES to Write Setup Time
-120
-150
-200
tRP
9, 10, 11
VCC to RES Setup Time4
-120
-150
-200
tRES
9, 10, 11
MIN 1
MAX
----
10
10
10
250
300
400
----
100
100
200
----
0.55
0.55
0.95
30
30
30
100
120
170
----
150
150
250
----
100
100
200
----
1
1
3
----
UNITS
ms
ns
µs
µs
Memory
SYMBOL
ns
ns
µs
µs
1. Use this device in a longer cycle than this value.
2. tWC must be longer than this value unless polling techniques or RDY/BUSY are used. This device automatically completes the
internal write operation within this value.
3. Next read or write operation can be initiated after tDW if polling techniques or RDY/BUSY are used.
4. Gauranteed by design.
03.24.15 Rev 14
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28C011T
1 Megabit (128K x 8-Bit) EEPROM
TABLE 9. 28C011T MODE SELECTION 1
PARAMETER
CE
OE
WE
I/O
RES
RDY/BUSY
Read
VIL
VIL
VIH
DOUT
VH
High-Z
Standby
VIH
X
X
High-Z
X
High-Z
Write
VIL
VIH
VIL
DIN
VH
High-Z --> VOL
Deselect
VIL
VIH
VIH
High-Z
VH
High-Z
Write Inhibit
X
X
VIH
--
X
--
X
VIL
X
--
X
--
Data Polling
VIL
VIL
VIH
Data Out (I/O7)
VH
VOL
Program
X
X
X
High-Z
VIL
High-Z
1. X = Don’t care.
FIGURE 1. READ TIMING WAVEFORM
Memory
03.24.15 Rev 14
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28C011T
1 Megabit (128K x 8-Bit) EEPROM
FIGURE 2. BYTE WRITE TIMING WAVEFORM(1) (WE CONTROLLED)
Memory
03.24.15 Rev 14
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28C011T
1 Megabit (128K x 8-Bit) EEPROM
FIGURE 3. BYTE WRITE TIMING WAVEFORM (2) (CE CONTROLLED)
Memory
03.24.15 Rev 14
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28C011T
1 Megabit (128K x 8-Bit) EEPROM
FIGURE 4. PAGE WRITE TIMING WAVEFORM(1) (WE CONTROLLED)
Memory
03.24.15 Rev 14
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28C011T
1 Megabit (128K x 8-Bit) EEPROM
FIGURE 5. PAGE WRITE TIMING WAVEFORM(2) (CE CONTROLLED)
Memory
FIGURE 6. DATA POLLING TIMING WAVEFORM
03.24.15 Rev 14
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1 Megabit (128K x 8-Bit) EEPROM
28C011T
FIGURE 7. SOFTWARE DATA PROTECTION TIMING WAVEFORM(1) (IN PROTECTION MODE)
FIGURE 8. SOFTWARE DATA PROTECTION TIMING WAVEFORM(2) (IN NON-PROTECTION MODE)
Memory
EEPROM APPLICATION NOTES
This application note describes the programming procedures for the EEPROM modules and with details of various
techniques to preserve data protection.
Automatic Page Write
Page-mode write feature allows 1 to 128 bytes of data to be written into the EEPROM in a single write cycle, and
allows the undefined data within 128 bytes to be written corresponding to the undefined address (A0 to A6). Loading
the first byte of data, the data load window opens 30µs for the second byte. In the same manner each additional byte
of data can be loaded within 30µs. In case CE and WE are kept high for 100 µs after data input, EEPROM enters
erase and write mode automatically and only the input data are written into the EEPROM.
03.24.15 Rev 14
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All rights reserved.
28C011T
1 Megabit (128K x 8-Bit) EEPROM
WE, CE Pin Operation
During a write cycle, addresses are latched by the falling edge of WE or CE, and data is latched by the rising edge of
WE or CE.
Data Polling
Data Polling function allows the status of the EEPROM to be determined. If EEPROM is set to read mode during a
write cycle, an inversion of the last byte of data to be loaded outputs from I/O 7 to indicate that the EEPROM is performing a write operation.
RDY/Busy Signal
RDY/Busy signal also allows a comparison operation to determine the status of the EEPROM. The RDY/Busy signal
has high impedance except in write cycle and is lowered to VOL after the first write signal. At the-end of a write cycle,
the RDY/Busy signal changes state to high impedance.
RES Signal
Data Protection
To protect the data during operation and power on/off, the EEPROM has the internal functions described below.
1. Data Protection against Noise of Control Pins (CE, OE, WE) during Operation.
03.24.15 Rev 14
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Memory
When RES is LOW, the EEPROM cannot be read and programmed. Therefore, data can be protected by keeping
RES low when VCC is switched. RES should be high during read and programming because it doesn’t provide a latch
function.
1 Megabit (128K x 8-Bit) EEPROM
28C011T
During readout or standby, noise on the control pins may act as a trigger and turn the EEPROM to programming mode by mistake. To prevent this phenomenon, the EEPROM has a noise cancellation function that cuts noise if its width is 20ns or less in
programming mode. Be careful not to allow noise of a width of more than 20ns on the control pins.
2. Data Protection at VCC on/off
RES should be kept at VSS level when VCC is turned on or off. The EEPROM breaks off programming operation when RES
become low, programming operation doesn’t finish correctly in case that RES falls low during programming operation. RES
should be kept high for 10 ms after the last data input.
3. Software Data Protection
03.24.15 Rev 14
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Memory
When VCC is turned on or off, noise on the control pins generated by external circuits, such as CPUs, may turn the EEPROM to
programming mode by mistake. To prevent this unintentional programming, the EEPROM must be kept in unprogrammable
state during VCC on/off by using a CPU reset signal to RES pin.
1 Megabit (128K x 8-Bit) EEPROM
28C011T
The software data protection function is to prevent unintentional programming caused by noise generated by external circuits.
In software data protection mode, 3 bytes of data must be input before write data as follows. These bytes can switch the nonprotection mode to the protection mode.
Software data protection mode can be canceled by inputting the following 6 bytes. Then, the EEPROM turns to the non-protection mode and can write data normally. However, when the data is input in the canceling cycle, the data cannot be written.
Memory
03.24.15 Rev 14
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28C011T
1 Megabit (128K x 8-Bit) EEPROM
Memory
32-PIN RAD-PAK® FLAT PACKAGE
SYMBOL
DIMENSION
MIN
NOM
MAX
A
0.117
0.130
0.143
b
0.015
0.017
0.022
c
0.004
0.005
0.009
D
--
0.820
0.830
E
0.404
0.410
0.416
E1
--
--
0.440
e
0.050BSC
L
0.350
0.370
0.390
Q
0.021
0.033
0.036
S1
0.005
0.027
--
N
32
Note: All dimensions in inches
Top and Bottom of the package are connected internally to ground.
03.24.15 Rev 14
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28C011T
1 Megabit (128K x 8-Bit) EEPROM
Memory
28C011T 32-PIN RAD-TOLERANT FLAT PACKAGE
SYMBOL
DIMENSION
MIN
NOM
MAX
A
0.078
0.087
0.096
b
0.015
0.017
0.022
c
0.004
0.005
0.009
D
--
0.820
0.830
E
0.404
0.410
0.416
E1
--
--
0.426
e
0.050BSC
L
0.390
0.400
0.410
Q
0.020
0.035
0.045
S1
0.005
0.027
--
N
32
Note: All dimensions in inches.
Top and Bottom of the package are connected internally to ground.
03.24.15 Rev 14
All data sheets are subject to change without notice
17
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All rights reserved.
1 Megabit (128K x 8-Bit) EEPROM
28C011T
Important Notice:
These data sheets are created using the chip manufacturers published specifications. Maxwell Technologies verifies
functionality by testing key parameters either by 100% testing, sample testing or characterization.
The specifications presented within these data sheets represent the latest and most accurate information available to
date. However, these specifications are subject to change without notice and Maxwell Technologies assumes no
responsibility for the use of this information.
Maxwell Technologies’ products are not authorized for use as critical components in life support devices or systems
without express written approval from Maxwell Technologies.
Any claim against Maxwell Technologies must be made within 90 days from the date of shipment from Maxwell Technologies. Maxwell Technologies’ liability shall be limited to replacement of defective parts.
Memory
03.24.15 Rev 14
All data sheets are subject to change without notice
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All rights reserved.
28C011T
1 Megabit (128K x 8-Bit) EEPROM
Product Ordering Options
Model Number
28C011T XX
F
X
-XX
Option Details
Feature
Access Time
Screening Flow
Radiation Feature1
Base Product
Nomenclature
Monolithic
S = Maxwell Class S
B = Maxwell Class B
I = Industrial (testing @ -55°C, +25°C, +125°C)
E = Engineering (testing @ +25°C)
Memory
Package
12 = 120 ns
15 = 150 ns
20 = 200 ns
F = Flat Pack
RP = RAD-PAK® package
RT = No Radiation Guarentee - Class E and I Only
RT1 = 10 Krad (Read/Write)
RT2 = 25 Krad (Read/Write);
RT4 = 40 Krad (Read/Write)
RT6 = 60 Krad (Read/Write)
RT4R = 40 Krad (Read); 25 Krad (Write)
RT6R = 60 Krad (Write), 25 Krad (Write)
1 Megabit (128k x 8-bit) EEPROM
1) Products are manufactured and screened to Maxwell Technologies’ self-defined Class B and Class S.
2) The device will meet the specified read mode TID level, at the die level, if it is not written to during irradiation.
Writing
to the device during irradiation will reduce the device’s TID tolerance to the specified write mode TID
level. Writing to the device before irradiation does not alter thedevice’s read mode TID level.
03.24.15 Rev 14
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