79C0832 - EEPROM, 8 Mb (256kb x 32)

79C0832
8 Megabit (256K x 32-Bit)
EEPROM MCM
DESCRIPTION:
• 256k x 32-bit EEPROM MCM
• RAD-PAK® radiation-hardened against natural space radiation
• Total dose hardness:
- >100 krad (Si)
- Dependent upon orbit
• Excellent Single event effects
- SEL > 120 MeV cm2/mg (Device)
- SEU > 90 MeV cm2/mg(Memory Cells)
- SEU > 18 MeV cm2/mg (Write Mode)
- SET > 40 MeV cm2/mg (Read Mode)
• High endurance
- 10,000 cycles/byte (Page Programming Mode)
- 10 year data retention
• Page Write Mode: 1 to 8 X 128 byte page
• High Speed:
- 150 and 200 ns maximum access times
• Automatic programming
- 10 ms automatic Page/Byte write
• Low power dissipation
- 160 mW/MHz active current
- 880 µW standby current
Maxwell Technologies’ 79C0832 multi-chip module (MCM)
memory features a greater than 100 krad (Si) total dose tolerance, dependent upon orbit. Using Maxwell Technologies’ patented radiation-hardened RAD-PAK® MCM packaging
technology, the 79C0832 is the first radiation-hardened 8
megabit MCM EEPROM for space applications. The 79C0832
uses eight 1 Megabit high speed CMOS die to yield an 8
megabit product. The 79C0832 is capable of in-system electrical byte and page programmability. It has a 128 x 8 byte page
programming function to make its erase and write operations
faster. It also features Data Polling and a Ready/Busy signal to
indicate the completion of erase and programming operations.
In the 79C0832, hardware data protection is provided with the
RES pin, in addition to noise protection on the WE signal and
write inhibit on power on and off. Software data protection is
implemented using the JEDEC optional standard algorithm.
Maxwell Technologies' patented RAD-PAK® packaging technology incorporates radiation shielding in the microcircuit package. It eliminates the need for box shielding while providing
the required radiation shielding for a lifetime in orbit or space
mission. In a GEO orbit, RAD-PAK provides greater than 100
krad (Si) radiation dose tolerance. This product is available
with screening up to Maxwell Technologies’ self-defined Class
K.
12.01.15 Rev 19
(858) 503-3300 - Fax: (858) 503-3301 - www.maxwell.com
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1
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Memory
FEATURES:
79C0832
8 Megabit (256K x 32-Bit) EEPROM MCM
Memory
TABLE 1. 79C0832 PINOUT DESCRIPTION
PIN
SYMBOL
DESCRIPTION
84-77, 29-37
ADDR0 to ADDR16
48-55, 66-73, 96,
1-7, 18-25
I/O0 to I/O31
61
OE
41, 43
CE0-1
45
WE
Write Enable
10, 17, 28, 40, 44,
58, 65, 76, 87, 93
5V
Power Supply
8, 9, 11-16, 26, 27,
38, 42, 46, 56, 57,
59, 60, 62-64, 74,
75, 85, 86, 88-92,
94, 95
GND
39
RDY/BUSY
47
RES
Address Input
Data Input/Output
Output Enable
Chip Enable 0 through 1
Ground
Ready/Busy
Reset
12.01.15 Rev 19
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79C0832
8 Megabit (256K x 32-Bit) EEPROM MCM
TABLE 2. 79C0832 ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
MIN
Supply Voltage
VCC
Input Voltage
VIN
Thermal Impedance
RP
3
RT
5.4
RP
45
RT
38
Mass
TYP
MAX
UNIT
-0.6
7.0
V
-0.51
7.0
V
°C/W
Grams
Operating Temperature Range
TOPR
-55
125
°C
Storage Temperature Range
TSTG
-65
150
°C
1. VIN min = -3.0V for pulse width <50ns.
PARAMETER
SYMBOL
MIN
MAX
UNIT
VCC
4.5
5.5
V
VIL
VIH
VH
-0.31
2.2
VCC-0.5
0.8
VCC +0.3
VCC +1
V
V
V
TOPR
-55
125
°C
Supply Voltage
Input Voltage
RES_PIN
Operating Temperature Range
Memory
TABLE 3. 79C0832 RECOMMENDED DC OPERATING CONDITIONS
1. VIL min = -1.0V for pulse width < 50 ns
TABLE 4. DELTA LIMITS
PARAMETER
VARIATION
ICC1A
+/- 10 % per Table 6
ICC1D
+/- 10 % per Table 6
ICC2A
+/- 10 % per Table 6
ILI - ADDR, CE, OE, WE
+/- 10 % per Table 6
ILI - D0-D31
+/- 10 % per Table 6
1. Parameters are measured and recorded per MIL-STD-883 for Class K devices.
12.01.15 Rev 19
All data sheets are subject to change without notice
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79C0832
8 Megabit (256K x 32-Bit) EEPROM MCM
TABLE 5. 79C0832 CAPACITANCE
(TA = 25 °C, f = 1 MHz)
PARAMETER
SYMBOL
Input Capacitance : VIN = 0V1
Output Capacitance: VOUT = 0V1
MIN
MAX
UNIT
CIN OE
6
pF
CIN WE
6
CIN CE0-1
6
CIN A0-A16
6
CIN RES
48
COut RDY/BSY
6
CO ut D0-D31
--
pF
12
1. Guaranteed by design.
TABLE 6. 79C0832 DC ELECTRICAL CHARACTERISTICS
(VCC = 5V ±10%, TA = -55 TO +125°C)
TEST CONDITION
Input Leakage Current1
A0-A16, CE,WE, OE
VIN = VCC
Input Leakage Current
D0-D31
VIN=VCC
SYMBOL
SUBGROUPS
MIN
MAX
UNITS
ILI
1, 2, 3
--
10 2
µA
1.12
mA
4
µA
VIN = 0V
ILI
1, 2, 3
ILO
1, 2, 3
--
4
µA
CE = ADDR=WE=OE =VCC
ICC1A
1, 2, 3
--
80
µA
CE = VIH; ADDR=WE=OE =VCC
ICC1B
4
mA
CE = ADDR=WE=OE =VIH
ICC1C
--
45
mA
CE =VIH, ADDR=WE=OE =0V
ICC1D
--
25
mA
OE = 0V ADDR=WE=VCC
IOUT = 0mA, CE Duty = 100%,
Cycle = 1 us at VCC = 5.5V
ICC2A
1, 2, 3
60
mA
OE =ADDR=WE=0V
IOUT = 0mA, CE Duty = 100%,
Cycle = 1 us at VCC = 5.5V
ICC2B
1, 2, 3
--
85
mA
OE = 0V ADDR=WE=VCC
IOUT = 0mA, CE Duty = 100%,
Cycle = 150 ns at VCC = 5.5V
ICC2C
1, 2, 3
--
200
mA
OE =ADDR=WE=0V
IOUT = 0mA, CE Duty = 100%,
Cycle = 150 ns at VCC = 5.5V
ICC2D
1, 2, 3
225
mA
VIL
VIH
1, 2, 3
0.8
V
Output Leakage Current (VCC = 5.5V, VOUT = 5.5V/0.4V)
Standby VCC Current1
Operating
VCC Current1,3
Input Voltage
VH
RES_PIN
12.01.15 Rev 19
Memory
PARAMETER
2.2
VCC -0.5
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79C0832
8 Megabit (256K x 32-Bit) EEPROM MCM
TABLE 6. 79C0832 DC ELECTRICAL CHARACTERISTICS
(VCC = 5V ±10%, TA = -55 TO +125°C)
PARAMETER
TEST CONDITION
SYMBOL
SUBGROUPS
MIN
MAX
UNITS
1, 2, 3
--
0.4
0.4
----
V
V
V
V
V
VOL
Data Lines: VCCMin, IOL= 2.1mA
RDY/BSY_Line: VCC Min, IOL = 12mA
VOL
Data Lines: VCC Min, IOH = -400µA
VOH
RDY/BSY_Line: VCC Min, IOH = -12mA
VOH
All Outputs: VCCMin , IOH = -100uA
1. All Inputs are tied to VCC with a 5.5KW resistor, except for RES which is 30KW.
Output Voltage
2.4
3.15
VCC - 0.3V
2. For RES ILI=800uA max.
3. Only one CE Active (Low)
TABLE 7. 79C0832 AC ELECTRICAL CHARACTERISTICS FOR READ OPERATION 1
(VCC = 5V ±10%, TA = -55 TO +125°C)
PARAMETER
SUBGROUPS
Address Access Time CE = OE = VIL, WE = VIH
-150
-200
tACC
9, 10, 11
Chip Enable Access Time OE = VIL, WE = VIH
-150
-200
tCE
9, 10, 11
Output Enable Access TIme CE = VIL, WE = VIH
-150
-200
tOE
9, 10, 11
Output Hold to Address Change CE = OE =VIL, WE = VIH
-150
-200
tOH
9, 10, 11
Output Disable to High-Z 2
CE = VIL, WE = VIH
-150
-200
CE = OE = VIL, WE = VIH
-150
-200
RES to Output Delay CE = OE = VIL, WE = VIH3
-150
-200
MIN
MAX
---
150
200
---
150
200
0
0
75
125
0
0
---
0
0
50
60
0
0
350
450
0
0
450
650
UNIT
ns
Memory
SYMBOL
ns
ns
ns
9, 10, 11
ns
tDF
ns
tDFR
TRR
9, 10, 11
ns
1. Test conditions: input pulse levels = 0.4V to 2.4V; input rise and fall times < 20 ns; output load = 1 TTL gate + 100 pF (including
scope and jig); reference levels for measuring timing = 0.8 V/1.8 V.
2. tDF and tDFR are defined as the time at which the output becomes an open circuit and data is no longer driven.
3. Guaranteed by design.
12.01.15 Rev 19
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79C0832
8 Megabit (256K x 32-Bit) EEPROM MCM
TABLE 8. 79C0832 AC ELECTRICAL CHARACTERISTICS FOR WRITE OPERATION
(VCC = 5V ±10%, TA = -55 TO +125°C)
PARAMETER
SYMBOL
SUBGROUPS
Address Setup Time
-150
-200
tAS
9, 10, 11
Chip Enable to Write Setup Time (WE controlled)
-150
-200
tCS
9, 10, 11
Write Pulse Width
CE controlled
-150
-200
WE controlled
-150
-200
MIN 1
MAX
0
0
---
0
0
---
250
350
---
250
350
---
150
200
---
100
150
---
10
10
---
0
0
---
0
0
---
0
0
---
0
0
---
0
0
---
---
10
10
UNITS
ns
ns
9, 10, 11
ns
tCW
ns
tWP
tAH
9, 10, 11
Data Setup Time
-150
-200
tDS
9, 10, 11
Data Hold Time
-150
-200
tDH
9, 10, 11
Chip Enable Hold Time (WE controlled)
-150
-200
tCH
9, 10, 11
Write Enable to Write Setup Time (CE controlled)
-150
-200
tWS
9, 10, 11
Write Enable Hold Time (CE controlled)
-150
-200
tWH
9, 10, 11
Output Enable to Write Setup Time
-150
-200
tOES
9, 10, 11
Output Enable Hold Time
-150
-200
tOEH
9, 10, 11
Write Cycle Time 2
-150
-200
tWC
9, 10, 11
12.01.15 Rev 19
ns
Memory
Address Hold Time
-150
-200
ns
ns
ns
ns
ns
ns
ns
ms
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79C0832
8 Megabit (256K x 32-Bit) EEPROM MCM
TABLE 8. 79C0832 AC ELECTRICAL CHARACTERISTICS FOR WRITE OPERATION
(VCC = 5V ±10%, TA = -55 TO +125°C)
PARAMETER
SYMBOL
SUBGROUPS
Data Latch Time
-150
-200
tDL
9, 10, 11
Byte Load Window
-150
-200
tBL
9, 10, 11
Byte Load Cycle
-150
-200
tBLC
9, 10, 11
Time to Device Busy
-150
-200
tDB
9, 10, 11
Write Start Time 3
-150
-200
tDW
9, 10, 11
RES to Write Setup Time
-150
-200
tRP
9, 10, 11
VCC to RES Setup Time4
-150
-200
tRES
9, 10, 11
MIN 1
MAX
300
400
---
100
200
---
.55
.95
30
30
120
170
---
150
250
---
100
200
---
1
3
---
UNITS
ns
µs
µs
ns
ns
Memory
µs
µs
1. Use this device in a longer cycle than this value.
2. tWC must be longer than this value unless polling techniques or RDY/BUSY are used. This device automatically completes the
internal write operation within this value.
3. Next read or write operation can be initiated after tDW if polling techniques or RDY/BUSY are used.
4. Guaranteed by design.
TABLE 9. 79C0832 MODE SELECTION 1
PARAMETER
CE 2
OE
WE
I/O
RES
RDY/BUSY
Read
VIL
VIL
VIH
DOUT
VH
VOH
Standby
VIH
X
X
High-Z
X
VOH
Write
VIL
VIH
VIL
DIN
VH
VOH --> VOL
Deselect
VIL
VIH
VIH
High-Z
VH
VOH
Write Inhibit
X
X
VIH
--
X
--
X
VIL
X
--
X
--
VIL
VIL
VIH
Data Out (I/O7)
VH
VOL
Program Reset
X
X
1. Refer to the recommended DC operating conditions.
X
High-Z
VL
VOH
Data Polling
2. For CE0-1 only one CE can be used (“on”) at a time.
12.01.15 Rev 19
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79C0832
8 Megabit (256K x 32-Bit) EEPROM MCM
FIGURE 1. READ TIMING WAVEFORM
Memory
FIGURE 2. BYTE WRITE TIMING WAVEFORM (1) (WE CONTROLLED)
12.01.15 Rev 19
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79C0832
8 Megabit (256K x 32-Bit) EEPROM MCM
FIGURE 3. BYTE WRITE TIMING WAVEFORM (2) (CE CONTROLLED)
Memory
FIGURE 4. PAGE WRITE TIMING WAVEFORM (1) (WE CONTROLLED)
1) A7-A16 are Page Addresses and must be the same within a Page Write Operation.
12.01.15 Rev 19
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79C0832
8 Megabit (256K x 32-Bit) EEPROM MCM
FIGURE 5. PAGE WRITE TIMING WAVEFORM (2) (CE CONTROLLED)
1
Memory
1) A7-A16 are Page Addresses and must be the same within a Page Write Operation.
FIGURE 6. DATA POLLING TIMING WAVEFORM
12.01.15 Rev 19
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8 Megabit (256K x 32-Bit) EEPROM MCM
79C0832
FIGURE 7. SOFTWARE DATA PROTECTION TIMING WAVEFORM (1) (IN PROTECTION MODE)
FIGURE 8. SOFTWARE DATA PROTECTION WAVEFORM (2) (IN NON-PROTECTION MODE)
Memory
EEPROM APPLICATION NOTES
This application note describes the programming procedures for the EEPROM modules and with details of various
techniques to preserve data integrity.
Automatic Page Write
Page-mode write feature allows 1 to 128 bytes of data to be written into the EEPROM in a single write cycle. Loading
the first byte of data, the data load window opens 30µs for the second byte. In the same manner each additional byte
of data can be loaded within 30µs of the preceding falling edge of either WE or CE. When CE and WE are kept high
for 100µs after data input, the EEPROM enters the write mode automatically and the data input is written into the
EEPROM.
WE, CE Pin Operation
During a write cycle, addresses are latched by the falling edge of WE or CE, and data is latched by the rising edge of
WE or CE.
12.01.15 Rev 19
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79C0832
8 Megabit (256K x 32-Bit) EEPROM MCM
Data Polling
Data Polling function allows the status of the EEPROM to be determined. If EEPROM is set to read mode during a
write cycle, an inversion of the last byte of data to be loaded outputs from I/O 7 to indicate that the EEPROM is performing a write operation.
RDY/Busy Signal
RDY/Busy signal also allows a comparison operation to determine the status of the EEPROM. The RDY/Busy signal
goes low (VOL) after the first write signal. At the end of the write cycle, the RDY/Busy returns to a high state ( VOH).
RES Signal
When RES is LOW (VL), the EEPROM cannot be read or programmed. The EEPROM data must be protected by
keeping RES low when VCC is power on and off. RES should be high (VH) during read and programming operations.
Memory
Data Protection
To protect the data during operation and power on/off, the EEPROM has the internal functions described below.
1. Data Protection against Noise of Control Pins (CE, OE, WE) during Operation.
During readout or standby, noise on the control pins may act as a trigger and turn the EEPROM to programming
mode by mistake. To prevent this phenomenon, the EEPROM has a noise cancellation function that cuts noise if its
width is 20ns or less in programming mode. Be careful not to allow noise of a width more than 20ns on the control
pins.
12.01.15 Rev 19
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79C0832
8 Megabit (256K x 32-Bit) EEPROM MCM
2. Data Protection at VCC on/off
When VCC is turned on or off, noise on the control pins generated by external circuits, such as CPUs, may turn the EEPROM to
programming mode by mistake. To prevent this unintentional programming, the EEPROM must be kept in unprogrammable
state during VCC on/off by using a CPU reset signal to RES pin.
3. RES Signal
RES should be kept at VSS level when VCC is turned on or off. The EEPROM breaks off programming operation when RES
become low, programming operation doesn’t finish correctly in case that RES falls low during programming operation. RES
should be kept high for 10 ms after the last data is input
.
Memory
10ms
4. Software Data Protection Enable
The 79C0832 contains a software controlled write protection feature that allows the user to inhibit all write operations to the
device. This is useful in protecting the device from unwanted write cycles due to uncontrollable circuit noise or inadvertent
writes caused by minor bus contentions. Software data protection is enabled by writing the following data sequence to the
EEPROM and allowing the write cycle period (tWC) of 10ms to elapse:
.
Software Data Protection Enable Sequence
Address
Data
5555
AAAA or 2AAA
AA AA AA AA
55 55 55 55
5555
A0 A0 A0 A0
12.01.15 Rev 19
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79C0832
8 Megabit (256K x 32-Bit) EEPROM MCM
5. Writing to the Memory with Software Data Protection Enabled
To write to the device once Software protection is enabled, the enable sequence must precede the data to be written. This
sequence allows the write to occur while at the same time keeping the software protection enabled
Sequence for Writing Data with Software Protection Enabled.
Address
Data
5555
AAAA or 2AAA
AA AA AA AA
55 55 55 55
5555
A0 A0 A0 A0
Write Address(s)
Normal Data Input
Memory
6. Disabling Software Protection
Software data protection mode can be disabled by inputting the following 6 bytes sequence. Once the software protection
sequence has been written, no data can be written to the memory until the write cycle (TWC) has elapsed.
Software Protection Disable Sequence
Address
Data
5555
AA AA AA AA
AAAA or 2AAA
55 55 55 55
5555
80 80 80 80
5555
AA AA AA AA
AAAA or 2AAA
55 55 55 55
5555
20 20 20 20
Devices are shipped in the “unprotected” state, meaning that the contents of the memory can be changed as
required by the user. After the software data protection is enabled, the device enters the Protect Mode
where no further write commands have any effect on the memory contents.
12.01.15 Rev 19
All data sheets are subject to change without notice
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79C0832
8 Megabit (256K x 32-Bit) EEPROM MCM
Memory
96-PIN RAD-PAK® QUAD FLAT PACKAGE
DIMENSION
SYMBOL
MIN
NOM
MAX
A
.184
.200
.216
b
.010
.012
.013
c
---
.009
.012
D
1.408
1.420
1.432
D1
1.162
e
.050
S1
.129
L
---
2.528
2.543
L1
2.485
2.500
2.505
L2
---
1.700
A1
.152
.165
N
.178
96
Note: All dimensions in inches
Top and Bottom of the package are tied internally to ground.
12.01.15 Rev 19
All data sheets are subject to change without notice
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©2015 Maxwell Technologies
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79C0832
8 Megabit (256K x 32-Bit) EEPROM MCM
A1
Pin #1 ID
c
S1
MAXWELL
e
TECHNOLOGIES
L2
b
Memory
D1
D(sq)
L1(sq)
A
L(sq)
96 PIN RAD-TOLERANT QUAD FLAT PACKAGE
DIMENSION
SYMBOL
MIN
NOM
MAX
A
0.180
0.195
0.210
b
0.010
0.012
0.014
c
--
0.009
0.012
D
1.408
1.420
1.432
D1
1.162
e
0.050
S1
0.129
F1
1.175
1.180
1.185
L
--
2.528
2.543
L1
2.485
2.500
2.505
L2
1.700
A1
0.148
0.160
N
.0172
96
.
Note: All dimensions in inches
Top and bottom of package tied internally to ground
12.01.15 Rev 19
All data sheets are subject to change without notice
16
©2015 Maxwell Technologies
All rights reserved
79C0832
8 Megabit (256K x 32-Bit) EEPROM MCM
Important Notice:
These data sheets are created using the chip manufacturers published specifications. Maxwell Technologies verifies
functionality by testing key parameters either by 100% testing, sample testing or characterization.
The specifications presented within these data sheets represent the latest and most accurate information available to
date. However, these specifications are subject to change without notice and Maxwell Technologies assumes no
responsibility for the use of this information.
Maxwell Technologies’ products are not authorized for use as critical components in life support devices or systems
without express written approval from Maxwell Technologies.
Any claim against Maxwell Technologies must be made within 90 days from the date of shipment from Maxwell Technologies. Maxwell Technologies’ liability shall be limited to replacement of defective parts.
Memory
Top and Bottom of the package are tied internally to ground.
12.01.15 Rev 19
All data sheets are subject to change without notice
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©2015 Maxwell Technologies
All rights reserved
79C0832
8 Megabit (256K x 32-Bit) EEPROM MCM
Product Ordering Options
Model Number
79C0832
XX
Q
Feature
X
Option Details
-XX
Access Time
15 = 150 ns
20 = 200 ns
Screening Flow
Multi Chip Module (MCM)1
K = Maxwell Self-Defined Class K
H = Maxwell Self-Defined Class H
I = Industrial (Testing @-55C, +25C , +125C)
E = Engineering (Testing @ +25C)
Memory
Package
Q = Quad Flat Pack
Radiation Features2 RP = Rad-Pak® Package
RT = No Radiation Guarentee
Class E and I only
RT1 = 10 krad (Read/Write)
RT2 = 25 krad (Read/Wite)
RT4 = 40 krad (Read/Write)
RT6 = 60 krad (Read/Write)
RT4R = 40 krad (Read); 25 krad (Write)
RT6R = 60 krad (Read), 25 krad (Write)
Base Product
Nomenclature
8 Megabyte (256K x 32-Bit) EEPROM
1) Products are manufacturered and screened to Maxwell Technologies’ self-defined Class H and Class K.
2) The device will meet the specified read mode TID level, at the die level, if it is not written to during irradiation.
Writing to the device during irradiation will reduce the device’s TID tolerance to the specified write mode TID level.
Writing to the device before irradiation does not alter the device’s read mode TID level.
12.01.15 Rev 19
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