2N6504 Series Preferred Device Silicon Controlled Rectifiers Reverse Blocking Thyristors Designed primarily for half-wave ac control applications, such as motor controls, heating controls and power supply crowbar circuits. • Glass Passivated Junctions with Center Gate Fire for Greater Parameter Uniformity and Stability • Small, Rugged, Thermowatt Constructed for Low Thermal Resistance, High Heat Dissipation and Durability • Blocking Voltage to 800 Volts • 300 A Surge Current Capability • Device Marking: Logo, Device Type, e.g., 2N6504, Date Code http://onsemi.com SCRs 25 AMPERES RMS 50 thru 800 VOLTS G A MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Symbol *Peak Repetitive Off–State Voltage (Note 1.) (Gate Open, Sine Wave 50 to 60 Hz, TJ = 25 to 125°C) 2N6504 2N6505 2N6507 2N6508 2N6509 VDRM, VRRM On-State RMS Current (180° Conduction Angles; TC = 85°C) IT(RMS) 25 A Average On-State Current (180° Conduction Angles; TC = 85°C) IT(AV) 16 A Peak Non-repetitive Surge Current (1/2 Cycle, Sine Wave 60 Hz, TJ = 100°C) ITSM 250 A Forward Peak Gate Power (Pulse Width ≤ 1.0 µs, TC = 85°C) PGM 20 Watts PG(AV) 0.5 Watts Forward Peak Gate Current (Pulse Width ≤ 1.0 µs, TC = 85°C) IGM 2.0 A Operating Junction Temperature Range TJ –40 to +125 °C –40 to +150 °C Forward Average Gate Power (t = 8.3 ms, TC = 85°C) Storage Temperature Range Value Unit Volts MARKING DIAGRAM 50 100 400 600 800 4 TO–220AB CASE 221A STYLE 3 YY WW 650x 1 2 x = 4, 5, 7, 8 or 9 YY = Year WW = Work Week 3 Tstg K PIN ASSIGNMENT 1 Cathode 2 Anode 3 Gate 4 Anode ORDERING INFORMATION *Indicates JEDEC Registered Data 1. VDRM and VRRM for all types can be applied on a continuous basis. Ratings apply for zero or negative gate voltage; however, positive gate voltage shall not be applied concurrent with negative potential on the anode. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded. Device Package Shipping 2N6504 TO220AB 500/Box 2N6505 TO220AB 500/Box 2N6507 TO220AB 500/Box 2N6508 TO220AB 500/Box 2N6509 TO220AB 500/Box Preferred devices are recommended choices for future use and best overall value. Semiconductor Components Industries, LLC, 2001 April, 2001 – Rev. 4 1 Publication Order Number: 2N6504/D 2N6504 Series *THERMAL CHARACTERISTICS Characteristic Thermal Resistance, Junction to Case Maximum Lead Temperature for Soldering Purposes 1/8″ from Case for 10 Seconds Symbol Max Unit RθJC 1.5 °C/W TL 260 °C ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted.) Characteristic Symbol Min Typ Max Unit – – – – 10 2.0 µA mA VTM – – 1.8 Volts IGT – – 9.0 – 30 75 mA *Gate Trigger Voltage (Continuous dc) (VAK = 12 Vdc, RL = 100 Ohms, TC = –40°C) VGT – 1.0 1.5 Volts Gate Non-Trigger Voltage (VAK = 12 Vdc, RL = 100 Ohms, TJ = 125°C) VGD 0.2 – – Volts IH – 18 40 mA – – 80 – 1.5 2.0 – – 15 35 – – – 50 – OFF CHARACTERISTICS *Peak Repetitive Forward or Reverse Blocking Current (VAK = Rated VDRM or VRRM, Gate Open) IDRM, IRRM TJ = 25°C TJ = 125°C ON CHARACTERISTICS *Forward On–State Voltage (Note 2.) (ITM = 50 A) *Gate Trigger Current (Continuous dc) (VAK = 12 Vdc, RL = 100 Ohms) *Holding Current (VAK = 12 Vdc, Initiating Current = 200 mA, Gate Open) TC = 25°C TC = –40°C TC = 25°C TC = –40°C *Turn-On Time (ITM = 25 A, IGT = 50 mAdc) tgt Turn-Off Time (VDRM = rated voltage) (ITM = 25 A, IR = 25 A) (ITM = 25 A, IR = 25 A, TJ = 125°C) tq µs µs DYNAMIC CHARACTERISTICS Critical Rate of Rise of Off-State Voltage (Gate Open, Rated VDRM, Exponential Waveform) dv/dt *Indicates JEDEC Registered Data. 2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2%. http://onsemi.com 2 V/µs 2N6504 Series Voltage Current Characteristic of SCR + Current Symbol Parameter VDRM Peak Repetitive Off State Forward Voltage IDRM Peak Forward Blocking Current VRRM Peak Repetitive Off State Reverse Voltage IRRM Peak Reverse Blocking Current VTM Peak On State Voltage IH Holding Current Anode + VTM on state IH IRRM at VRRM Reverse Blocking Region (off state) Reverse Avalanche Region + Voltage IDRM at VDRM Forward Blocking Region (off state) 13 0 32 12 0 P(AV) , AVERAGE POWER (WATTS) TC , MAXIMUM CASE TEMPERATURE ( °C) Anode – α α = CONDUCTION ANGLE 110 10 0 α = 30° 90 80 0 60° 90° 180° dc 4.0 8.0 12 16 IT(AV), ONSTATE FORWARD CURRENT (AMPS) Figure 1. Average Current Derating 180° 90° dc 16 TJ = 125°C 8.0 0 20 α α = CONDUCTION ANGLE 60° α = 30° 24 0 4.0 8.0 12 16 IT(AV), AVERAGE ONSTATE FORWARD CURRENT (AMPS) 20 Figure 2. Maximum On–State Power Dissipation http://onsemi.com 3 2N6504 Series 100 70 50 30 125°C 25°C 10 7.0 5.0 3.0 2.0 300 1.0 275 0.7 250 0.5 225 0.3 0.2 0.1 TC = 85°C f = 60 Hz 200 0 0.4 0.8 1.2 1.6 2.0 vF, INSTANTANEOUS VOLTAGE (VOLTS) 2.4 175 1.0 2.8 SURGE IS PRECEDED AND FOLLOWED BY RATED CURRENT 2.0 3.0 4.0 6.0 8.0 10 NUMBER OF CYCLES Figure 3. Typical On–State Characteristics r(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED) 1 CYCLE I TSM , PEAK SURGE CURRENT (AMP) iF , INSTANTANEOUS FORWARD CURRENT (AMPS) 20 Figure 4. Maximum Non–Repetitive Surge Current 1.0 0.7 0.5 0.3 0.2 ZθJC(t) = RθJC • r(t) 0.1 0.07 0.05 0.03 0.02 0.01 0.1 0.2 0.3 0.5 1.0 2.0 3.0 5.0 10 20 30 50 t, TIME (ms) 100 Figure 5. Thermal Response http://onsemi.com 4 200 300 500 1.0 k 2.0 k 3.0 k 5.0 k 10 k 2N6504 Series TYPICAL TRIGGER CHARACTERISTICS VGT, GATE TRIGGER VOLTAGE (VOLTS) 10 1 -40 -25 -10 5 20 35 50 65 80 TJ, JUNCTION TEMPERATURE (°C) 95 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 -40 -25 -10 110 125 5 20 35 65 80 95 Figure 7. Typical Gate Trigger Voltage versus Junction Temperature 100 10 1 -40 -25 -10 50 TJ, JUNCTION TEMPERATURE (°C) Figure 6. Typical Gate Trigger Current versus Junction Temperature IH , HOLDING CURRENT (mA) I GT, GATE TRIGGER CURRENT (mA) 100 5 20 35 50 65 80 95 TJ, JUNCTION TEMPERATURE (°C) Figure 8. Typical Holding Current versus Junction Temperature http://onsemi.com 5 110 125 110 125 2N6504 Series PACKAGE DIMENSIONS TO–220AB CASE 221A–07 ISSUE AA –T– B F T SEATING PLANE C S 4 Q A 1 2 3 U H K Z R L V J G D N NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. DIM A B C D F G H J K L N Q R S T U V Z INCHES MIN MAX 0.570 0.620 0.380 0.405 0.160 0.190 0.025 0.035 0.142 0.147 0.095 0.105 0.110 0.155 0.014 0.022 0.500 0.562 0.045 0.060 0.190 0.210 0.100 0.120 0.080 0.110 0.045 0.055 0.235 0.255 0.000 0.050 0.045 ----0.080 STYLE 3: PIN 1. 2. 3. 4. http://onsemi.com 6 CATHODE ANODE GATE ANODE MILLIMETERS MIN MAX 14.48 15.75 9.66 10.28 4.07 4.82 0.64 0.88 3.61 3.73 2.42 2.66 2.80 3.93 0.36 0.55 12.70 14.27 1.15 1.52 4.83 5.33 2.54 3.04 2.04 2.79 1.15 1.39 5.97 6.47 0.00 1.27 1.15 ----2.04 2N6504 Series Notes http://onsemi.com 7 2N6504 Series ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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