CMUDM7005 SURFACE MOUNT N-CHANNEL ENHANCEMENT-MODE SILICON MOSFET w w w. c e n t r a l s e m i . c o m DESCRIPTION: The CENTRAL SEMICONDUCTOR CMUDM7005 is an Enhancement-mode N-Channel MOSFET, manufactured by the N-Channel DMOS Process, designed for high speed pulsed amplifier and driver applications. This MOSFET offers Low rDS(ON) and Low Theshold Voltage. MARKING CODE: 5C7 FEATURES: SOT-523 CASE • Load/Power Switches • Power Supply Converter Circuits • Battery Powered Portable Equipment • • • • • • MAXIMUM RATINGS: (TA=25°C) Drain-Source Voltage SYMBOL VDS 20 VGS ID 8.0 V 650 mA IS IDM PD 280 mA 1.3 A 300 mW TJ, Tstg -65 to +150 °C APPLICATIONS: Gate-Source Voltage Continuous Drain Current (Steady State - Note 1) Continuous Source Current (Body Diode) Maximum Pulsed Drain Current Power Dissipation (Note 1) Operating and Storage Junction Temperature ESD Protection up to 2kV 300mW Power Dissipation Very Low rDS(ON) Low Threshold Voltage Logic Level Compatible Small, SOT-523 Surface Mount Package ELECTRICAL CHARACTERISTICS: (TA=25°C unless otherwise noted) SYMBOL TEST CONDITIONS MIN TYP IGSSF, IGSSR VGS=4.5V, VDS=0 IDSS BVDSS VGS(th) VSD rDS(ON) rDS(ON) rDS(ON) rDS(ON) Qg(tot) Qgs Qgd VDS=16V, VGS=0 VGS=0, ID=250μA UNITS V MAX 1.0 UNITS μA 100 nA 20 VDS=VGS, ID=250μA VGS=0, IS=200mA V 0.5 1.1 V 1.1 V VGS=4.5V, ID=600mA VGS=2.5V, ID=500mA 0.23 Ω 0.275 Ω VGS=1.8V, ID=350mA VGS=1.5V, ID=40mA 0.7 Ω 9.5 Ω VDS=10V, VGS=4.5V, VDS=10V, VGS=4.5V, VDS=10V, VGS=4.5V, ID=500mA ID=500mA ID=500mA 1.58 nC 0.17 nC 0.24 nC Notes: (1) Mounted on 2 inch square FR-4 PCB with copper mounting pad area of 1.13in2 R2 (3-March 2011) CMUDM7005 SURFACE MOUNT N-CHANNEL ENHANCEMENT-MODE SILICON MOSFET ELECTRICAL CHARACTERISTICS: (TA=25°C unless otherwise noted) SYMBOL TEST CONDITIONS MIN gFS VDS=10V, ID=400mA 1.0 Crss Ciss Coss VDS=16V, VGS=0, f=1.0MHz VDS=16V, VGS=0, f=1.0MHz TYP UNITS S 18 pF 100 pF 16 pF ton VDS=16V, VGS=0, f=1.0MHz VDD=10V, VGS=4.5V, ID=200mA, RG=10Ω 10 ns toff VDD=10V, VGS=4.5V, ID=200mA, RG=10Ω 25 ns SOT-523 CASE - MECHANICAL OUTLINE PIN CONFIGURATION (Bottom View) LEAD CODE: 1) Gate 2) Source 3) Drain MARKING CODE: 5C7 R2 (3-March 2011) w w w. c e n t r a l s e m i . c o m