IXYS IXFC26N50

ADVANCE TECHNICAL INFORMATION
VDSS
HiPerFETTM MOSFETs
ISOPLUS220TM
IXFC 26N50
IXFC 24N50
Electrically Isolated Back Surface
ID25
500 V
23 A
500 V
21 A
trr ≤ 250 ns
RDS(on)
0.20 Ω
0.23 Ω
N-Channel Enhancement Mode
High dV/dt, Low trr, HDMOSTM Family
Symbol
Test Conditions
VDSS
VDGR
TJ = 25°C to 150°C
TJ = 25°C to 150°C; RGS = 1 MΩ
500
500
V
V
VGS
VGSM
Continuous
Transient
±20
±30
V
V
ID25
TC = 25°C
IDM
TC = 25°C, Pulse width limited by TJM
IAR
TC = 25°C
23
21
92
84
26
24
A
A
A
A
A
A
EAR
TC = 25°C
30
mJ
dv/dt
IS ≤ IDM, di/dt ≤ 100 A/µs, VDD ≤ VDSS
TJ ≤ 150°C, RG = 2 Ω
5
V/ns
PD
Maximum Ratings
ISOPLUS 220TM
G
D
S
26N50
24N50
26N50
24N50
26N50
24N50
TC = 25°C
TJ
TJM
Tstg
TL
1.6 mm (0.062 in.) from case for 10 s
VISOL
50/60 Hz, RMS
230
W
-55 ... +150
150
-55 ... +150
°C
°C
°C
300
°C
2500
V~
3
g
t = 1 minute leads-to-tab
Weight
Symbol
Test Conditions
VDSS
VGS = 0 V, ID = 250uA
VGS(th)
VDS = VGS, ID = 4mA
IGSS
VGS = ±20 VDC, VDS = 0
IDSS
VDS = 0.8 VDSS
VGS = 0 V
RDS(on)
VGS = 10 V, ID = IT
Notes 1 & 2
© 2000 IXYS All rights reserved
Characteristic Values
(TJ = 25°C, unless otherwise specified)
min. typ. max.
500
2
V
4
V
±100
nA
TJ = 25°C
TJ = 125°C
200
1
µA
mA
26N50
24N50
0.20
0.23
Ω
Ω
G = Gate
S = Source
Isolated back surface*
D = Drain
* Patent pending
Features
l
Silicon chip on Direct-Copper-Bond
substrate
- High power dissipation
- Isolated mounting surface
- 2500V electrical isolation
l
Low drain to tab capacitance(<35pF)
l
Low RDS (on) HDMOSTM process
l
Rugged polysilicon gate cell structure
l
Unclamped Inductive Switching (UIS)
rated
l
Fast intrinsic Rectifier
Applications
l
DC-DC converters
l
Battery chargers
l
Switched-mode and resonant-mode
power supplies
l
DC choppers
l
AC motor control
Advantages
l
Easy assembly: no screws, or isolation
foils required
l
Space savings
l
High power density
l
Low collector capacitance to ground
(low EMI)
98755 (10/00)
IXFC 26N50
IXFC 24N50
Symbol
Test Conditions
Characteristic Values
(TJ = 25°C, unless otherwise specified)
min. typ. max.
gfs
V DS = 15 V; ID = IT
Note 1
21
S
4200
pF
450
pF
Crss
135
pF
td(on)
16
ns
33
ns
Ciss
Coss
11
VGS = 0 V, VDS = 25 V, f = 1 MHz
tr
VGS = 10 V, VDS = 0.5 VDSS, ID = IT
td(off)
RG = 1 Ω (External),
tf
Qg(on)
Qgs
VGS = 10 V, VDS = 0.5 VDSS, ID = IT
Qgd
65
ns
30
ns
135
nC
28
nC
62
nC
0.54
RthJC
Source-Drain Diode
Test Conditions
IS
VGS = 0 V
ISM
Repetitive; pulse width limited by TJM
VSD
IF = IS, VGS = 0 V, Note 1
t rr
IRM
IF = Is, -di/dt = 100 A/µs,
VR = 100 V
K/W
Characteristic Values
(TJ = 25°C, unless otherwise specified)
min. typ. max.
Symbol
QRM
K/W
0.30
RthCK
TJ = 25°C
TJ = 125°C
TJ = 25°C
TJ = 125°C
TJ = 25°C
TJ = 125°C
1
2
10
15
ISOPLUS220 OUTLINE
26
A
104
A
1.5
V
250
400
1
Note: All terminals are solder plated.
1 - Gate
2 - Drain
3 - Source
ns
ns
µC
µC
A
A
Note: 1. Pulse test, t ≤ 300 µs, duty cycle d ≤ 2 %
2. IT test current:
IXFC26N50
IT = 13A
IXFC24N50
IT = 12A
3. See IXFH26N50 data sheet for characteristic curves.
IXYS reserves the right to change limits, test conditions, and dimensions.
IXYS MOSFETS and IGBTs are covered by one or more of the following U.S. patents:
4,835,592
4,850,072
4,881,106
4,931,844
5,017,508
5,034,796
5,049,961
5,063,307
5,187,117
5,237,481
5,486,715
5,381,025