NEC 2SK3510

DATA SHEET
MOS FIELD EFFECT TRANSISTOR
2SK3510
SWITCHING
N-CHANNEL POWER MOS FET
ORDERING INFORMATION
DESCRIPTION
The 2SK3510 is N-channel MOS Field Effect Transistor
PART NUMBER
PACKAGE
2SK3510
TO-220AB
2SK3510-S
TO-262
2SK3510-ZJ
TO-263
2SK3510-Z
TO-220SMDNote
designed for high current switching applications.
FEATURES
• Super low on-state resistance:
RDS(on) = 8.5 mΩ MAX. (VGS = 10 V, ID = 42 A)
Note TO-220SMD package is produced only
• Low Ciss: Ciss = 8500 pF TYP.
in Japan.
• Built-in gate protection diode
(TO-220AB)
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)
Drain to Source Voltage (VGS = 0 V)
VDSS
75
V
Gate to Source Voltage (VDS = 0 V)
VGSS
±20
V
ID(DC)
±83
A
ID(pulse)
±332
A
Total Power Dissipation (TC = 25°C)
PT1
125
W
Total Power Dissipation (TA = 25°C)
PT2
1.5
W
Channel Temperature
Tch
150
°C
Drain Current (DC) (TC = 25°C)
Drain Current (pulse)
Note1
Tstg
–55 to +150
°C
Single Avalanche Current
Note2
IAS
69
A
Single Avalanche Energy
Note2
EAS
450
mJ
Storage Temperature
(TO-262)
Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1%
2. Starting Tch = 25°C, VDD = 35 V, RG = 25 Ω, VGS = 20 → 0 V
(TO-263, TO-220SMD)
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No.
D15687EJ1V0DS00 (1st edition)
Date Published May 2002 NS CP(K)
Printed in Japan
©
2001
2SK3510
ELECTRICAL CHARACTERISTICS (TA = 25°C)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Zero Gate Voltage Drain Current
IDSS
VDS = 75 V, VGS = 0 V
10
µA
Gate Leakage Current
IGSS
VGS = ±20 V, VDS = 0 V
±10
µA
VGS(off)
VDS = 10 V, ID = 1 mA
2.0
3.0
4.0
V
| yfs |
VDS = 10 V, ID = 42 A
30
60
RDS(on)
VGS = 10 V, ID = 42 A
Gate Cut-off Voltage
Forward Transfer Admittance
Drain to Source On-state Resistance
S
6.5
8.5
mΩ
Input Capacitance
Ciss
VDS = 10 V
8500
pF
Output Capacitance
Coss
VGS = 0 V
1300
pF
Reverse Transfer Capacitance
Crss
f = 1 MHz
650
pF
Turn-on Delay Time
td(on)
VDD = 38 V, ID = 42 A
35
ns
VGS = 10 V
28
ns
RG = 0 Ω
105
ns
16
ns
Rise Time
tr
Turn-off Delay Time
td(off)
Fall Time
tf
Total Gate Charge
QG
VDD = 60 V
150
nC
Gate to Source Charge
QGS
VGS = 10 V
30
nC
Gate to Drain Charge
QGD
ID = 83 A
52
nC
VF(S-D)
IF = 83 A, VGS = 0 V
1.0
V
Reverse Recovery Time
trr
IF = 83 A, VGS = 0 V
80
ns
Reverse Recovery Charge
Qrr
di/dt = 100 A/ µs
240
nC
Body Diode Forward Voltage
TEST CIRCUIT 1 AVALANCHE CAPABILITY
D.U.T.
RG = 25 Ω
PG.
VGS = 20 → 0 V
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
L
50 Ω
VGS
RL
Wave Form
RG
PG.
VDD
VGS
0
VGS
10%
90%
VDD
VDS
90%
IAS
VDS
VDS
ID
Starting Tch
τ
τ = 1 µs
Duty Cycle ≤ 1%
TEST CIRCUIT 3 GATE CHARGE
PG.
2
50 Ω
10%
0
10%
Wave Form
VDD
D.U.T.
IG = 2 mA
90%
VDS
VGS
0
BVDSS
RL
VDD
Data Sheet D15687EJ1V0DS
td(on)
tr
ton
td(off)
tf
toff
2SK3510
TYPICAL CHARACTERISTICS (TA = 25°C)
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
TOTAL POWER DISSIPATION vs.
CASE TEMPERATURE
150
PT - Total Power Dissipation - W
dT - Percentage of Rated Power - %
120
100
80
60
40
20
125
100
75
50
25
0
0
0
25
50
75
100
125
150
175
0
25
TC - Case Temperature - °C
50
75
100
125
150
175
TC - Case Temperature - °C
FORWARD BIAS SAFE OPERATING AREA
1000
100
d
ite )
Lim 10 V
=
S
R t VG
(a
ID(pulse)
PW
=1
0µ
s
10
0µ
s
ID(DC)
DC
1m
s
10
Po
m
s
Lim we
ite r Di
d ss
ipa
tio
n
10
1
TC = 25˚C
Single Pulse
0.1
0.1
1
10
VDS - Drain to Source Voltage - V
100
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
1000
rth(t) - Transient Thermal Resistance - °C/W
ID - Drain Current - A
o
(
DS
n)
100
10
Channel to Ambient
Rth(ch-A) = 83.3˚C/W
1
Channel to Case
Rth(ch-C) = 1.0˚C/W
0.1
Single Pulse
0.01
10 µ
100 µ
1m
10 m
100 m
1
10
100
1000
PW - Pulse Width - s
Data Sheet D15687EJ1V0DS
3
2SK3510
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
FORWARD TRANSFER CHARACTERISTICS
100 0
400
V D S = 10 V
P ulsed
P ulsed
300
ID - Drain Current - A
ID - Drain Current - A
350
250
200
V G S = 10 V
150
100
100
10
T A = 150°C
75°C
25°C
−55°C
1
50
0.1
0
0
1
2
3
1
4
2
VDS - Drain to Source Voltage - V
3.0
2.5
2.0
1.5
1.0
0.5
0.0
0
50
100
150
200
| yfs | - Forward Transfer Admittance - S
VGS(off) – Gate Cut-off Voltage - V
V DS = 10 V
ID = 1 mA
-50
VDS = 10 V
P u ls e d
10
T A = 1 50 °C
7 5 °C
2 5 °C
−5 5 °C
1
0 .1
0 .0 1
0 .0 1
0 .1
16
14
12
10
V G S = 10 V
6
4
2
0
100
1000
RDS(on) - Drain to Source On-state Resistance - mΩ
RDS(on) - Drain to Source On-state Resistance - mΩ
P ulse d
10
10
100
10
ID - Drain Current - A
4
1
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
20
1
7
ID - Drain Current - A
DRAIN TO SOURCE ON-STATE
RESISTANCE vs. DRAIN CURRENT
8
6
100
Tch - Channel Temperature - °C
18
5
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
4.0
-100
4
VGS - Gate to Source Voltage - V
GATE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
3.5
3
P ulse d
8
I D = 42 A
6
4
2
0
0
2
4
6
8
10
12
14
16
VGS - Gate to Source Voltage - V
Data Sheet D15687EJ1V0DS
18
20
2SK3510
CAPACITANCE vs.
DRAIN TO SOURCE VOLTAGE
1 4 .0
100000
V GS = 0 V
f = 1 MHz
P u ls e d
1 2 .0
Ciss, Coss, Crss - Capacitance - pF
1 0 .0
8 .0
6 .0
4 .0
VGS = 10 V
ID = 4 2 A
2 .0
C is s
10000
C oss
C rs s
1000
0 .0
100
-1 0 0
-5 0
0
50
100
150
200
0 .1
10
100
VDS - Drain to Source Voltage - V
SWITCHING CHARACTERISTICS
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
1000
80
VDS - Drain to Source Voltage - V
td(on), tr, td(off), tf - Switching Time - ns
1
Tch - Channel Temperature - °C
td(off)
100
td(on)
tr
tf
10
VDD = 38 V
VGS = 10 V
RG = 0 Ω
1
0.1
1
10
16
ID = 8 3 A
70
V DD = 60 V
60
V DD = 38 V
12
50
V DD = 15 V
10
14
40
8
6
30
V GS
20
4
10
2
V DS
0
0
100
VGS - Gate to Source Voltage - V
RDS(on) - Drain to Source On-state Resistance - mΩ
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
0
50
ID - Drain Current - A
100
150
200
QG - Gate Charge - nC
SOURCE TO DRAIN DIODE
FORWARD VOLTAGE
REVERSE RECOVERY TIME vs. DRAIN CURRENT
1000
100
trr - Reverse Recovery Time - ns
ISD - Diode Forward Current - A
P u ls e d
100
VGS = 0 V
10
VGS = 10 V
1
0 .1
0 .0 1
VGS = 0 V
d i/ d t = 1 0 0 A / µ s
10
0
0 .2 0 .4 0 .6 0 .8
1
1 .2 1 .4 1 .6 1 .8
2
VSD - Source to Drain Voltage - V
0 .1
1
10
100
IF - Drain Current - A
Data Sheet D15687EJ1V0DS
5
2SK3510
SINGLE AVALANCHE CURRENT vs.
INDUCTIVE LOAD
SINGLE AVALANCHE ENERGY
DERATING FACTOR
160
VDD = 35 V
R G = 25 Ω
VGS = 20 → 0 V
100
10
1
0 .0 0 1
Energy Derating Factor - %
IAS - Single Avalanche Current - A
1000
IA S = 6 9 A
E
0 .0 1
AS
= 450 m J
0 .1
1
10
120
100
80
60
40
20
0
25
50
75
100
125
150
Starting Tch - Starting Channel Temperature - °C
L - Inductive Load - mH
6
VDD = 35 V
RG = 25 Ω
VGS = 20 → 0 V
IAS ≤ 69 A
140
Data Sheet D15687EJ1V0DS
2SK3510
PACKAGE DRAWINGS (Unit: mm)
1) TO-220AB (MP-25)
φ 3.6±0.2
1.0±0.5
4.8 MAX.
10.6 MAX.
3.0±0.3
2) TO-262 (MP-25 Fin Cut)
10 TYP.
1.3±0.2
3
0.5±0.2
0.75±0.3
2.54 TYP.
0.5±0.2
0.75±0.1
2.54 TYP.
2
1.3±0.2
12.7 MIN.
6.0 MAX.
1 2 3
1.3±0.2
8.5±0.2
4
1
1.3±0.2
12.7 MIN.
4
15.5 MAX.
5.9 MIN.
10.0 TYP.
4.8 MAX.
2.8±0.2
1.Gate
2.Drain
3.Source
4.Fin (Drain)
2.54 TYP.
1.Gate
2.Drain
3.Source
4.Fin (Drain)
Note
3) TO-263 (MP-25ZJ)
4) TO-220SMD (MP-25Z)
4.8 MAX.
10 TYP.
4.8 MAX.
10 TYP.
1.3±0.2
1.3±0.2
4
2.8±0.2
2.54 TYP.
TY
.
YP
R
0.8
T
1.4±0.2
0.5±0.2
0.75±0.3
2.54 TYP.
1.Gate
2.Drain
3.Source
4.Fin (Drain)
8.5±0.2
3
3.0±0.5
0.7±0.2
2.54 TYP.
P.
R
0.5
2
P.
TY P.
R
5
TY
0.
R
0.8
2.54 TYP.
2.8±0.2
1.4±0.2
1
1.1±0.4
8.5±0.2
3
5.7±0.4
2
1.0±0.5
4
1.0±0.5
1
2.8±0.2
2.54 TYP.
0.5±0.2
1.Gate
2.Drain
3.Source
4.Fin (Drain)
Note This package is produced only in Japan.
EQUIVALENT CIRCUIT
Drain
Remark
Body
Diode
Gate
The diode connected between the gate and source of the transistor
serves as a protector against ESD. When this device actually used,
an additional protection circuit is externally required if a voltage
exceeding the rated voltage may be applied to this device.
Gate
Protection
Diode
Source
Data Sheet D15687EJ1V0DS
7
2SK3510
• The information in this document is current as of May, 2002. The information is subject to change
without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data
books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products
and/or types are available in every country. Please check with an NEC sales representative for
availability and additional information.
• No part of this document may be copied or reproduced in any form or by any means without prior
written consent of NEC. NEC assumes no responsibility for any errors that may appear in this document.
• NEC does not assume any liability for infringement of patents, copyrights or other intellectual property rights of
third parties by or arising from the use of NEC semiconductor products listed in this document or any other
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patents, copyrights or other intellectual property rights of NEC or others.
• Descriptions of circuits, software and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these
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parties arising from the use of these circuits, software and information.
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M8E 00. 4