NEC 2SK3116-S

DATA SHEET
MOS FIELD EFFECT TRANSISTOR
2SK3116
SWITCHING
N-CHANNEL POWER MOS FET
DESCRIPTION
ORDERING INFORMATION
The 2SK3116 is N-channel DMOS FET device that features a
PART NUMBER
PACKAGE
2SK3116
TO-220AB
2SK3116-S
TO-262
2SK3116-ZJ
TO-263
low gate charge and excellent switching characteristics, and
designed for high voltage applications such as switching power
supply, AC adapter.
FEATURES
•Low gate charge
QG = 26 nC TYP. (ID = 7.5 A, VDD = 450 V, VGS = 10 V)
•Gate voltage rating ±30 V
•Low on-state resistance
RDS(on) = 1.2 Ω MAX. (VGS = 10 V, ID = 3.75 A)
•Avalanche capability ratings
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)
Drain to Source Voltage (VGS = 0 V)
VDSS
600
V
Gate to Source Voltage (VDS = 0 V)
VGSS
±30
V
Drain Current (DC)
ID(DC)
±7.5
A
ID(pulse)
±30
A
Total Power Dissipation (TA = 25°C)
PT1
1.5
W
Total Power Dissipation (TC = 25°C)
PT2
70
W
Channel Temperature
Tch
150
°C
Drain Current (pulse)
Note1
Tstg
−55 to +150
°C
Single Avalanche Current
Note2
IAS
7.5
A
Single Avalanche Energy
Note2
EAS
37.5
mJ
dv/dt
3.5
V/ns
Storage Temperature
Diode Recovery dv/dt
Note3
Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1%
2. Starting Tch = 25°C, VDD = 150 V, RG = 25 Ω , VGS = 20 → 0 V
3. IF ≤ 3.0 A, Vclamp = 600 V, di/dt ≤ 100 A/ µs, TA = 25°C
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. D13339EJ2V0DS00 (2nd edition)
Date Published May 2002 NS CP (K)
Printed in Japan
The mark ★ shows major revised points.
©
1998
2SK3116
ELECTRICAL CHARACTERISTICS (TA = 25°C)
CHRACTERISTICS
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Zero Gate Voltage Drain Current
IDSS
VDS = 600 V, VGS = 0 V
100
µA
Gate Leakage Current
IGSS
VGS = ±30 V, VDS = 0 V
±100
nA
VGS(off)
VDS = 10 V, ID = 1 mA
2.5
3.5
V
| yfs |
VDS = 10 V, ID = 3.75 A
2.0
RDS(on)
VGS = 10 V, ID = 3.75 A
Gate Cut-off Voltage
Forward Transfer Admittance
Drain to Source On-state Resistance
S
0.9
Ω
1.2
Input Capacitance
Ciss
VDS = 10 V
1100
pF
Output Capacitance
Coss
VGS = 0 V
200
pF
Reverse Transfer Capacitance
Crss
f = 1 MHz
20
pF
Turn-on Delay Time
td(on)
VDD = 150 V, ID = 3.75 A
18
ns
tr
VGS = 10 V
15
ns
td(off)
RG = 10 Ω
50
ns
tf
RL = 50 Ω
15
ns
Rise Time
Turn-off Delay Time
Fall Time
Total Gate Charge
QG
VDD = 450 V
26
nC
Gate to Source Charge
QGS
VGS = 10 V
6
nC
Gate to Drain Charge
QGD
ID = 7.5 A
10
nC
VF(S-D)
IF = 7.5 A, VGS = 0 V
1.0
V
Reverse Recovery Time
Trr
IF = 7.5 A, VGS = 0 V
1.6
µs
Reverse Recovery Charge
Qrr
di/dt = 50 A/ µs
7.6
µC
Body Diode Forward Voltage
TEST CIRCUIT 1 AVALANCHE CAPABILITY
D.U.T.
D.U.T.
RG = 25 Ω
PG.
VGS = 20 → 0 V
TEST CIRCUIT 2 SWITCHING TIME
L
50 Ω
VGS
RL
RG
RG = 10 Ω
PG.
VDD
VGS
Wave Form
0
VGS
10%
90%
VDD
ID
90%
90%
BVDSS
IAS
ID
VGS
0
ID
VDS
ID
τ
VDD
Starting Tch
τ = 1 µs
Duty Cycle ≤ 1%
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
IG = 2 mA
PG.
2
50 Ω
0
10%
10%
Wave Form
RL
VDD
Data Sheet D13339EJ2V0DS
td(on)
tr
ton
td(off)
tf
toff
2SK3116
TYPICAL CHARACTERISTICS (TA = 25°C)
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
FORWARD TRANSFER CHARACTERISTICS
Pulsed
100
VGS = 10 V
20
ID - Drain Current - A
ID - Drain Current - A
25
8V
15
6V
10
Tch = 125˚C
75˚C
10
Tch = 25˚C
−25˚C
1.0
0.1
5
0
10
20
30
0
40
5
VGS - Gate to Source Voltage - V
VDS - Drain to Source Voltage - V
GATE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
| yfs | - Forward Transfer Admittance - S
VGS(off) - Gate Cut-off Voltage - V
5.0
4.0
3.0
2.0
1.0
VDS = 10 V
ID = 1 mA
0
−50
0
50
100
150
10
Tch = −25˚C
25˚C
75˚C
125˚C
1.0
VDS = 10 V
Pulsed
0.1
0.1
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
3.0
Pulsed
2.0
ID = 4.0 A
7.5 A
1.0
5
10
VGS - Gate to Source Voltage - V
1.0
10
ID - Drain Current - A
15
RDS(on) - Drain to Source On-State Resistance - Ω
RDS (on) - Drain to Source On-State Resistance - Ω
Tch - Channel Temperature - ˚C
0
0
10
VDS = 10 V
Pulsed
15
DRAIN TO SOURCE ON-STATE
RESISTANCE vs. DRAIN CURRENT
Pulsed
3.0
2.0
VGS = 10 V
20 V
1.0
0
Data Sheet D13339EJ2V0DS
1.0
10
ID - Drain Current - A
100
3
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
4.0
3.0
2.0
ID = 7.5 A
4.0 A
1.0
0
−50
VGS = 10 V
Pulsed
50
0
SOURCE TO DRAIN DIODE
FORWARD VOLTAGE
ISD - Diode Forward Current - A
RDS (on) - Drain to Source On-State Resistance - Ω
2SK3116
100
10
1.0
0.1
0V
Pulsed
150
100
VGS = 10 V
0
Tch - Channel Temperature - ˚C
0.5
1.0
1.5
VSD - Source to Drain Voltage - V
CAPACITANCE vs. DRAIN TO
SOURCE VOLTAGE
SWITCHING CHARACTERISTICS
td(on), tr, td(off), tf - Switching Time - ns
10000
Ciss
1000
Coss
100
10
1
1.0
VGS = 0 V
f = 1 MHz
Crss
10
100
td(off)
tf
td(on)
10
tr
1
VDD = 150 V
VGS = 10 V
RG = 10 Ω
0.1
0.1
1000
1
VDS - Drain to Source Voltage - V
REVERSE RECOVERY TIME vs.
DRAIN CURRENT
di/dt = 50 A/ µs
VGS = 0 V
VDS - Drain to Source Voltage - V
trr - Reverse Recovery Time - ns
10000
1000
100
10
0.1
1.0
10
100
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
16
ID = 7.5 A
14
600
VDD = 450 V
300 V
150 V
12
VGS
400
10
8
6
200
4
VDS
0
8
2
12
20
QG - Gate Charge - nC
ID - Drain Current - A
4
10
ID - Drain Current - A
Data Sheet D13339EJ2V0DS
0
32
VGS - Gate to Source Voltage - V
Ciss, Coss, Crss - Capacitance - pF
100
2SK3116
★
★
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
TOTAL POWER DISSIPATION vs.
CASE TEMPERATURE
80
PT - Total Power Dissipation - W
dT - Percentage of Rated Power - %
100
80
60
40
20
0
0
20
40
60
80
100
120 140
160
70
60
50
40
30
20
10
0
20
TC - Case Temperature - ˚C
40
60
80
100
120 140
160
TC - Case Temperature - ˚C
FORWARD BIAS SAFE OPERATING AREA
100
ID(pulse)
ID - Drain Current - A
PW
d
ite
10
)
on
S(
Lim
10
0
ID(DC)
1
RD
Po
we
r
1
0.1
1
=
10
µs
µs
m
s
3
10 ms
3
m
10 0 m s
0 s
DC ms
Di
ss
ipa
tio
n
Lim
ite
d
TC = 25˚C
Single Pulse
10
100
1000
VDS - Drain to Source Voltage - V
★
rth(t) - Transient Thermal Resistance - ˚C/W
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
Rth(ch-A) = 83.3˚C/W
100
10
Rth(ch-C) = 1.79˚C/W
1
0.1
0.01
10 µ
100 µ
1m
10 m
100 m
1
10
100
1000
PW - Pulse Width - s
Data Sheet D13339EJ2V0DS
5
2SK3116
SINGLE AVALANCHE ENERGY
DERATING FACTOR
SINGLE AVALANCHE CURRENT vs.
INDUCTIVE LOAD
120
IAS = 7.5 A
10
EAS
7.5
mJ
1.0
RG = 25 Ω
VDD = 150 V
VGS = 20 → 0 V
Starting Tch = 25˚C
0.1
10 µ
100 µ
1m
L - Inductive Load - H
6
=3
Energy Derating Factor - %
IAS - Single Avalanche Current - A
100
10 m
VDD = 150 V
RG = 25 Ω
VGS = 20 → 0 V
IAS ≤ 7.5 A
100
80
60
40
20
0
25
50
75
100
125
150
Starting Tch - Starting Channel Temperature - ˚C
Data Sheet D13339EJ2V0DS
2SK3116
★ PACKAGE DRAWINGS (Unit: mm)
φ 3.6±0.2
10 TYP.
1.3±0.2
4
1
1 2 3
6.0 MAX.
1.3±0.2
12.7 MIN.
1.3±0.2
0.75±0.3
2.54 TYP.
0.5±0.2
0.75±0.1
2.54 TYP.
2
3
4.8 MAX.
1.3±0.2
12.7 MIN.
5.9 MIN.
4
15.5 MAX.
10.0 TYP.
1.0±0.5
4.8 MAX.
10.6 MAX.
3.0±0.3
2) TO-262 (MP-25 Fin Cut)
8.5±0.2
1) TO-220AB (MP-25)
0.5±0.2
2.8±0.2
2.54 TYP.
2.8±0.2
1.Gate
2.Drain
3.Source
4.Fin (Drain)
2.54 TYP.
1.Gate
2.Drain
3.Source
4.Fin (Drain)
3) TO-263 (MP-25ZJ)
4.8 MAX.
10 TYP.
1.3±0.2
4
2
3
5.7±0.4
1
8.5±0.2
1.0±0.5
EQUIVALENT CIRCUIT
1.4±0.2
0.7±0.2
Remark
P.
R
0.5
2.54 TYP.
2.8±0.2
2.54 TYP.
Drain (D)
TY
R
0.8
P.
TY
Body
Diode
Gate (G)
0.5±0.2
1.Gate
2.Drain
3.Source
4.Fin (Drain)
Source (S)
Strong electric field, when exposed to this device, can cause destruction of the gate oxide and ultimately degrade
the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly
dissipate it once, when it has occurred.
Data Sheet D13339EJ2V0DS
7
2SK3116
• The information in this document is current as of May, 2002. The information is subject to change
without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data
books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products
and/or types are available in every country. Please check with an NEC sales representative for
availability and additional information.
• No part of this document may be copied or reproduced in any form or by any means without prior
written consent of NEC. NEC assumes no responsibility for any errors that may appear in this document.
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• Descriptions of circuits, software and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these
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parties arising from the use of these circuits, software and information.
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agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize
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The quality grade of NEC semiconductor products is "Standard" unless otherwise expressly specified in NEC's
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(Note)
(1) "NEC" as used in this statement means NEC Corporation and also includes its majority-owned subsidiaries.
(2) "NEC semiconductor products" means any semiconductor product developed or manufactured by or for
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M8E 00. 4