CYSTEKEC MEN9971J3

Spec. No. : C432J3
Issued Date : 2008.12.09
Revised Date : 2009.02.04
Page No. : 1/8
CYStech Electronics Corp.
N-Channel Enhancement Mode Power MOSFET
MEN9971J3
BVDSS
60V
ID
25A
RDSON(MAX)
20mΩ
Features
• Low Gate Charge
• Simple Drive Requirement
• Repetitive Avalanche Rated
• Fast Switching Characteristic
• RoHS compliant package
Symbol
Outline
MEN9971J3
TO-252
G:Gate
D:Drain
S:Source
G D S
Absolute Maximum Ratings (TC=25°C, unless otherwise noted)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current @ TC=25°C
Continuous Drain Current @ TC=100°C
Pulsed Drain Current
Avalanche Current
Avalanche Energy @ L=0.1mH, ID=20A,RG=25Ω
Repetitive Avalanche Energy @ L=0.05mH *2
Total Power Dissipation (TC=25℃)
Linear Derating Factor
Operating Junction and Storage Temperature Range
Note : *1. Pulse width limited by maximum junction temperature
Symbol
VDS
VGS
ID
ID
IDM
IAS
EAS
EAR
Pd
Tj, Tstg
Limits
60
±20
25
16
100 *1
20
20
10
50
0.31
-55~+175
Unit
V
A
mJ
W
W/°C
°C
*2. Duty cycle ≤ 1%
MEN9971J3
CYStek Product Specification
Spec. No. : C432J3
Issued Date : 2008.12.09
Revised Date : 2009.02.04
Page No. : 2/8
CYStech Electronics Corp.
Thermal Data
Parameter
Thermal Resistance, Junction-to-case, max
Thermal Resistance, Junction-to-ambient, max
Symbol
Rth,j-c
Rth,j-a
Value
3
75
Unit
°C/W
°C/W
Characteristics (Tc=25°C, unless otherwise specified)
Symbol
Min.
Static
BVDSS
60
VGS(th)
1
GFS
IGSS
IDSS
IDSS
ID(ON)
25
*RDS(ON)
*RDS(ON)
Dynamic
*Qg
*Qgs
*Qgd
*td(ON)
*tr
*td(OFF)
*tf
Ciss
Coss
Crss
Rg
Source-Drain Diode
*IS
*ISM
*VSD
*trr
*Qrr
-
Typ.
Max.
Unit
Test Conditions
1.8
25
16
19
2.5
±100
1
25
20
24
V
V
S
nA
μA
μA
A
mΩ
mΩ
VGS=0, ID=250μA
VDS = VGS, ID=250μA
VDS =5V, ID=20A
VGS=±20, VDS=0
VDS =48V, VGS =0
VDS =40V, VGS =0, Tj=125°C
VDS =5V, VGS =10V
VGS =10V, ID=20A
VGS =7V, ID=15A
43
7.2
11
20
12
50
25
3330
256
207
2
-
nC
ID=20A, VDS=30V, VGS=10V
ns
VDS=30V, ID=1A, VGS=10V,
RG=6Ω
pF
VGS=0V, VDS=25V, f=1MHz
Ω
VGS=15mV, VDS=0, f=1MHz
60
42
25
100
1.3
-
A
V
ns
nC
IF=IS, VGS=0V
IF=25A, VGS=0, dIF/dt=100A/μs
*Pulse Test : Pulse Width ≤300μs, Duty Cycle≤2%
Ordering Information
Device
MEN9971J3
MEN9971J3
Package
TO-252
(RoHS compliant)
Shipping
Marking
2500 pcs / Tape & Reel
9971
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C432J3
Issued Date : 2008.12.09
Revised Date : 2009.02.04
Page No. : 3/8
Characteristic Curves
MEN9971J3
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C432J3
Issued Date : 2008.12.09
Revised Date : 2009.02.04
Page No. : 4/8
Characteristic Curves(Cont.)
MEN9971J3
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C432J3
Issued Date : 2008.12.09
Revised Date : 2009.02.04
Page No. : 5/8
Reel Dimension
Carrier Tape Dimension
MEN9971J3
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C432J3
Issued Date : 2008.12.09
Revised Date : 2009.02.04
Page No. : 6/8
Recommended soldering footprint
MEN9971J3
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C432J3
Issued Date : 2008.12.09
Revised Date : 2009.02.04
Page No. : 7/8
Recommended wave soldering condition
Product
Peak Temperature
Soldering Time
Pb-free devices
260 +0/-5 °C
5 +1/-1 seconds
Recommended temperature profile for IR reflow
Profile feature
Sn-Pb eutectic Assembly
Average ramp-up rate
3°C/second max.
(Tsmax to Tp)
Preheat
100°C
−Temperature Min(TS min)
−Temperature Max(TS max)
150°C
−Time(ts min to ts max)
60-120 seconds
Time maintained above:
−Temperature (TL)
183°C
− Time (tL)
60-150 seconds
Peak Temperature(TP)
240 +0/-5 °C
Time within 5°C of actual peak
10-30 seconds
temperature(tp)
Ramp down rate
6°C/second max.
6 minutes max.
Time 25 °C to peak temperature
Pb-free Assembly
3°C/second max.
150°C
200°C
60-180 seconds
217°C
60-150 seconds
260 +0/-5 °C
20-40 seconds
6°C/second max.
8 minutes max.
Note : All temperatures refer to topside of the package, measured on the package body surface.
MEN9971J3
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C432J3
Issued Date : 2008.12.09
Revised Date : 2009.02.04
Page No. : 8/8
TO-252 Dimension
C
A
D
B
Device Name
Date code
G
F
L
Marking:
9971
□□□□
3
H
E
K
2
I
Style: Pin 1.Gate 2.Drain 3.Source
1
J
3-Lead TO-252 Plastic Surface Mount Package
CYStek Package Code: J3
*: Typical
Inches
Min.
Max.
0.0177 0.0217
0.0650 0.0768
0.0354 0.0591
0.0177 0.0236
0.2441 0.2677
0.2125 0.2283
DIM
A
B
C
D
E
F
Millimeters
Min.
Max.
0.45
0.55
1.65
1.95
0.90
1.50
0.45
0.60
6.20
6.80
5.40
5.80
DIM
G
H
I
J
K
L
Inches
Min.
Max.
0.0866 0.1102
*0.0906
0.0449
0.0346
0.2047 0.2165
0.0551 0.0630
Millimeters
Min.
Max.
2.20
2.80
*2.30
1.14
0.88
5.20
5.50
1.40
1.60
Notes: 1.Controlling dimension: millimeters.
2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material.
3.If there is any question with packing specification or packing method, please contact your local CYStek sales office.
Material:
• Lead : KFC; Pure tin plated
• Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0
Important Notice:
• All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.
• CYStek reserves the right to make changes to its products without notice.
• CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.
• CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.
MEN9971J3
CYStek Product Specification