HANBIT HMF6M32M6VA

HANBit
HMF6M32M6VA
FLASH-ROM MODULE 24MByte (6M x 32-Bit) ,72pin-SIMM, 3.0V
Part No. HMF6M32M6VA
GENERAL DESCRIPTION
The HMF6M32M6VA is a high-speed flash read only memory (FROM) module containing 12,582,912 words organized in a
x32bit configuration. The module consists of six 2M x 16 FROM mounted on a 72-pin, both-sided, FR4-printed circuit board.
Commands are written to the command register using standard microprocessor write timings.
Register contents serve as input to an internal state-machine, which controls the erase and programming circuitry. Write cycles
also internally latch addresses and data needed for the programming and erase operations. Reading data out of the device is
similar to reading from other flash or EPROM devices.
Output enable (/OE) and write enable (/WE) can set the memory input and output.
When FROM module is disable condition the module is becoming power standby mode, system designer can get low-power
design. All module components may be powered from a single +3.0V DC power supply.
PIN ASSIGNMENT
FEATURES
PIN
w Access time : 90, 120ns
SYMBOL
PIN
SYMBOL
PIN
SYMBOL
1
Vss
25
DQ17
49
/WE
w High-density 24MByte design
2
/RESET
26
DQ18
50
A18
w High-reliability, low-power design
3
DQ0
27
DQ19
51
A17
w Single + 3V ± 0.3V power supply
4
DQ1
28
DQ20
52
A16
w Easy memory expansion
5
DQ2
29
DQ21
53
A15
6
DQ3
30
Vcc
54
A14
7
DQ4
31
DQ22
55
A13
8
DQ5
32
DQ23
56
A12
w Low profile 72-pin SIMM
9
DQ6
33
/CE_1H
57
A11
w Minimum 1,000,000 write/erase cycle
10
Vcc
34
/CE_2H
58
A10
11
DQ7
35
DQ24
59
Vcc
12
/CE_1L
36
DQ25
60
A9
w Embedded algorithms
13
/CE_2L
37
DQ26
61
A8
w Erase suspend / Erase resume
14
DQ8
38
DQ27
62
A7
15
DQ9
39
Vss
63
A6
16
DQ10
40
DQ28
64
A5
17
DQ11
41
DQ29
65
A4
18
DQ12
42
DQ30
66
A3
w Hardware reset pin(RESET#)
w FR4-PCB design
w Flexible sector architecture
OPTIONS
MARKING
w Timing
19
DQ13
43
DQ31
67
A2
90ns access
- 90
20
DQ14
44
NC
68
A1
120ns access
-120
21
DQ15
45
NC
69
A0
22
23
24
NC
/CE_3H
DQ16
46
47
48
/CE_3L
A19
/OE
70
71
72
A20
NC
Vss
w Packages
72-pin SIMM
M
72-PIN SIMM
TOP VIEW
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HANBit Electronics Co., Ltd.
HANBit
HMF6M32M6VA
FUNCTIONAL BLOCK DIAGRAM
DQ0 - DQ31
A0 – A20
32
21
A0-20
/WE
/WE
/OE
/CE_1L
DQ 0-15
A0-20
DQ16-31
/WE
U1
/OE
/CE
A0-20
DQ 16-31
DQ 0-15
/CE_2L
/WE
/WE
/OE
U2
/CE
A0-20
/WE
/OE
/OE
/CE
/CE_3L
/Reset
DQ16-31
U4
/CE
/CE_2H
DQ16-31
DQ 16-31
/Reset
/Reset
/WE
/CE_1H
/Reset
A0-20
/OE
U3
/CE
/Reset
/WE
DQ16-31
A0-20
DQ0-15
/WE
U5
/OE
U6
/CE_3H
/CE
/Reset
/Reset
/CE_3L
Option resister
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REV.02(August,2002)
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HMF6M32M6VA
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
RATING
VCC
-0.5V to +4.0V
A9, /OE, /RESET, /WP_ACC Relative to Vss
VIN,OUT
-0.5V to +12.5V
Voltage on All other Pins Relative to Vss
VIN,OUT
-0.5V to +4.0V
Voltage on Vcc Supply Relative to Vss
Power Dissipation
Storage Temperature
Operating Temperature ( Industrial )
PD
6W
TSTG
-65oC to +150oC
TA
-40oC to +85oC
Operating Temperature ( Extended )
-55oC to +125oC
w Stresses greater than those listed under " Absolute Maximum Ratings" may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at these or any other conditions above those indicated
in the operating section of this specification is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
SYMBOL
MIN
TYP.
MAX
Supply Voltage
VCC
2.7V
3.0V
3.6V
Ground
VSS
0
0
0
Input High Voltage
VIH
2.0
-
Vcc+0.3V
Input Low Voltage
VIL
-0.5
-
0.8V
PARAMETER
DC CHARACTERISTICS (CMOS Compatible)
PARAMET
DESCRIPTION
TEST CONDITIONS
MIN
TYP.
MAX
UNIT
±3.0
uA
35
uA
±1.0
uA
ER
ILI
Input Load Current
VIN=Vss to Vcc, Vcc=Vcc max
ILIT
A9 Input Load Current
Vcc= Vcc max ; A9=12.5V
ILO
Output Leakage Current
VOUT= Vss to Vcc, Vcc= Vcc max
Vcc Active Read Current
/CE=VIL, /OE=VIH
5MHZ
60
96
(Note1)
Word Mode
1MHZ
12
24
/CE=VIL, /OE=VIH
90
180
mA
Vcc=Vcc max ; /CE,/Reset=Vcc±0.3V
1.2
30
uA
Vcc=Vcc max ; /Reset=Vss±0.3V
1.2
30
uA
1.2
30
uA
ICC1
mA
Vcc Active Write Current
ICC2
(Note 2 and 4)
ICC3
Vcc Standby Current
Vcc Standby Current
ICC4
During Reset
Automatic Sleep
VIH=Vcc±0.3V;
Mode(Note3)
VIL=Vss±0.3V
ICC5
VIL
Input Low Voltage
-0.5
0.8
V
VIH
Input High Voltage
0.7xVcc
Vcc+0.3
V
VID
Voltage for Autoselect and
11.5
12.5
V
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REV.02(August,2002)
Vcc=3.0V ± 10%
3
HANBit Electronics Co., Ltd.
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HMF6M32M6VA
Temporary Unprotect
VOL
Output Low Voltage
IOL=4.0mA, Vcc=Vcc min
VOH1
0.45
V
IOH=-2.0mA, Vcc=Vcc min
0.85xVcc
V
IOH=-100uA, Vcc= Vcc min
Vcc-0.4
V
Output High Voltage
VOH2
VLKO
Low Vcc Lock-Out Voltage
2.3
2.5
V
Note :
1.
The Icc current listed is typically less 2mA/MHz, with /OE at VIH.
2.
Icc active while Embedded Erase or Embedded Program is progress.
3.
Automatic sleep mode enables the low power mode when addresses remain stable for tACC+30ns.
Typical sleep mode current is 200nA.
4.
Not 100% tested.
LATCHUP CHARACTERISTICS
DESCRIPTION
MIN
MAX
-1.0V
12.5V
-1.0V
Vcc+1.0V
-100mA
+100mA
Input Voltage with respect to Vss on all pins except I/O Pins
(Including A9,/OE, and /Reset)
Input Voltage with respect to Vss on all I/O Pins
Vcc Current
Includes all pins except Vcc. Test conditions: Vcc=3.0V, one pin at a time.
DATA RETENTION
PARAMETER
TEST CONDITIONS
Minimum Pattern Data
MIN
UNIT
O
10
Years
O
20
Years
150 C
Retention Time
125 C
ERASE AND PROGRAMMING PERFORMANCE
TYP
PARAMETER
MAX (NOTE2)
UNIT
COMMENTS
15
sec
Excludes 00h programming prior to
sec
erasure (Note4)
(NOTE1)
Sector Erase Time
1.6
Chip Erase Time
112
Word Programming Time
11
360
us
Chip Programming Time (Word Mode)
24
72
sec
Excludes
system
level
overhead
(Note5)
(Note3)
Notes :
O
1. Typical program and erase times assume the following conditions: 25 C, 3.0V Vcc, 1,000,000 cycles. Additionally
programming typical assume checkerboard pattern.
O
2. Under worst case conditions of 90 C, Vcc=2.7V, 1,000,000 cycles.
3. The typical chip programming time is considerably less than the maximum chip programming time listed, since
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REV.02(August,2002)
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HANBit Electronics Co., Ltd.
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HMF6M32M6VA
most bytes program faster than the maximum program times listed
4. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.
5. System-level overhead is the time required to execute the two-or four-bus-cycle sequence for the program command.
See table 9 for further information on command definitions.
6. The device has a minimum erase and program cycle endurance of 1,000,000 cycles.
SOP/TSOP PIN CAPACITANCE
PARAMETER
PARAMETER
SYMBOL
CIN
TEST SETUP
TYP.
MAX
UNIT
VIN = 0
36
45
pF
VOUT = 0
51
72
pF
VIN = 0
45
54
pF
DESCRIPTION
Input Capacitance
COUT
Output Capacitance
CIN2
Control Pin Capacitance
Notes :
1. Sampled, not 100% tested
o
2.Test conditions TA = 25 C, f=1.0 MHz.
TEST SPECIFICATIONS
TEST CONDITION
80R
-90/ -120
Output load
UNIT
1TTL gate
Output load capacitance,
30
100
pF
CL (Including jig capacitance)
Input rise and fall times
5
ns
0.0 - 3.0
V
Input timing measurement reference levels
1.5
V
Output timing measurement reference levels
1.5
V
Input pulse levels
3.3V
2.7kΩ
IN3064
or Equivalent
Device
Under
Test
CL
6.2kΩ
Diodes = IN3064
or Equivalent
AC
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REV.02(August,2002)
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HANBit Electronics Co., Ltd.
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HMF6M32M6VA
CHARACTERISTICS
u Erase / Program Operations
PARAMETER SYMBOLS
DESCRIPTION
-90
-120
UNIT
90
120
ns
JEDEC
Standard
tAVAV
tWC
Write Cycle Time (Note1)
Min
tAVWL
tAS
Address Setup Time
Min
tWLAX
tAH
Address Hold Time
Min
45
50
ns
tDVWH
tDS
Data Setup Time
Min
45
50
ns
tWHDX
tDH
Data Hold Time
Min
0
ns
Output Enable High durning toggle bit polling
Min
20
ns
Min
0
ns
tOEPH
0
ns
Read Recovery Time Before Write(/OE High to /WE
tGHWL
tGHWL
Low)
tELWL
tCS
/CE Setup Time
Min
0
ns
tWHEH
tCH
/CE Hold Time
Min
0
ns
tWLWH
tWP
Write Pulse Width
Min
tWHWL
tWPH
Write Pulse Width High
Min
30
ns
tWHWH1
tWHWH1
Programming Operation (Note2)
Typ
11
us
tWHWH2
tWHWH2
Sector Erase Operation (Note2)
Typ
1.6
sec
tVCS
Vcc Setup Time (Note1)
Min
50
us
tRB
Recovery Time from RY//BY
Min
0
ns
Program/ Erase Valid to RY//BY Delay
Min
90
ns
tBUSY
Word
35
50
ns
Note:
1. Not 100% tested.
2. See the "Erase and Programming Performance" section for more Information
u Alternate /CE Controlled Erase/ Program Operations
PARAMETER SYMBOLS
DESCRIPTION
-90
-120
UNIT
90
120
ns
JEDEC
Standard
tAVAV
tWC
Write Cycle Time (Note1)
Min
tAVEL
tAS
Address Setup Time
Min
tELAX
tAH
Address Hold Time
Min
45
50
ns
tDVEH
tDS
Data Setup Time
Min
45
50
ns
tEHDX
tDH
Data Hold Time
Min
0
ns
tOES
Output Enable Setup Time
Min
20
ns
Min
0
ns
Min
0
ns
0
ns
Read Recovery Time Before Write(/OE High to /WE
tGHEL
tGHEL
Low)
tWLEL
tWS
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REV.02(August,2002)
/WE Setup Time
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HANBit Electronics Co., Ltd.
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HMF6M32M6VA
tEHWH
tWH
/WE Hold Time
Min
tELEH
tCP
/CE Pulse Width
Min
tEHEL
tCPH
/CE Pulse Width High
Min
30
ns
tWHWH1
tWHWH1
Programming Operation (Note2)
Typ
11
us
tWHWH2
tWHWH2
Sector Erase Operation (Note2)
Typ
1.6
sec
Word
0
35
ns
50
ns
Note:
1. Not 100% tested.
2. See the "Erase and Programming Performance" section for more Information.
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REV.02(August,2002)
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HMF6M32M6VA
u READ OPERATIONS TIMING
u RESET TIMING
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REV.02(August,2002)
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HMF6M32M6VA
u PROGRAM OPERATIONS TIMING
u CHIP/SECTOR ERASE OPERATION TIMINGS
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REV.02(August,2002)
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HANBit
HMF6M32M6VA
u DATA# POLLING TIMES(DURING EMBEDDED ALGORITHMS)
u TOGGLE# BIT TIMINGS (DURING EMBEDDED ALGORITHMS)
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Ltd.
REV.02(August,2002)
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HMF6M32M6VA
u SECTOR PROTECT UNPROTECT TIMEING DIAGRAM
u ALTERNATE CE# CONTROLLED WRITE OPERATING TIMINGS
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REV.02(August,2002)
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HMF6M32M6VA
PACKAGE DIMENSIONS
2.54 mm
MIN
0.25 mm MAX
1.27 mm
Gold: 1.04±0.10 mm
Solder: 0.914±0.10 mm
1.27±0.08 mm
(Solder & Gold Plating)
ORDERING INFORMATION
Part Number
Density
Org.
Package
HMF6M32M6VA-90
24MByte
6MX 32bit
72 Pin-SIMM
HMF6M32M6VA-120
24MByte
6MX 32bit
72 Pin-SIMM
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Ltd.
REV.02(August,2002)
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Component
Vcc
Speed
6EA
3.0V
90ns
6EA
3.0V
120ns
Number
HANBit Electronics Co.,
HANBit
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Ltd.
REV.02(August,2002)
HMF6M32M6VA
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HANBit Electronics Co.,