DATA SHEET MOS FIELD EFFECT TRANSISTOR μ PA2791GR SWITCHING N- AND P-CHANNEL POWER MOS FET PACKAGE DRAWING (Unit: mm) DESCRIPTION The μ PA2791GR is N- and P-channel MOS Field Effect Transistors designed for switching application. 8 5 N-channel 1 : Source 1 2 : Gate 1 7, 8 : Drain 1 FEATURES P-channel 3 : Source 2 4 : Gate 2 5, 6 : Drain 2 6.0 ± 0.3 4 4.4 5.37 MAX. 0.8 0.05 MIN. 0.15 +0.10 –0.05 1.44 1 1.8 MAX. • Low on-state resistance N-channel RDS(on)1 = 36.0 mΩ MAX. (VGS = 10 V, ID = 3.0 A) RDS(on)2 = 50.0 mΩ MAX. (VGS = 4.5 V, ID = 3.0 A) P-channel RDS(on)1 = 82 mΩ MAX. (VGS = −10 V, ID = −3.0 A) RDS(on)2 = 110 mΩ MAX. (VGS = −4.5 V, ID = −3.0 A) • Low gate charge N-channel QG = 10 nC TYP. (VGS = 10 V) P-channel QG = 8.3 nC TYP. (VGS = −10 V) • Built-in gate protection diode • Small and surface mount package (Power SOP8) 0.5 ± 0.2 1.27 0.78 MAX. 0.40 +0.10 –0.05 0.10 0.12 M ORDERING INFORMATION PART NUMBER μ PA2791GR-E1-AT Note μ PA2791GR-E2-AT Note LEAD PLATING PACKING PACKAGE Pure Sn Tape 2500 p/reel Power SOP8 Note Pb-free (This product does not contain Pb in the external electrode and other parts.) EQUIVALENT CIRCUIT N-channel P-channel Drain Drain Body Diode Gate Gate Protection Diode Source Body Diode Gate Gate Protection Diode Source Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device. Caution This product is electrostatic-sensitive device due to low ESD capability and should be handled with caution for electrostatic discharge. VESD ± 600 V TYP. (C = 100 pF, R = 1.5 kΩ) The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. Document No. G18207EJ2V0DS00 (2nd edition) Date Published November 2007 NS Printed in Japan The mark <R> shows major revised points. The revised points can be easily searched by copying an "<R>" in the PDF file and specifying it in the "Find what:" field. 2006, 2007 μ PA2791GR ABSOLUTE MAXIMUM RATINGS (TA = 25°C. All terminals are connected.) PARAMETER SYMBOL N-CHANNEL P-CHANNEL UNIT Drain to Source Voltage (VGS = 0 V) VDSS 30 −30 V Gate to Source Voltage (VDS = 0 V) VGSS ±20 m20 V ID(DC) ±5 m5 A ID(pulse) ±20 m20 A Drain Current (DC) (TC = 25°C) Drain Current (pulse) Note2 Note1 Total Power Dissipation (1 unit) Note2 Total Power Dissipation (2 units) Note2 Channel Temperature Storage Temperature 1.7 PT1 PT2 2.0 W Tch 150 °C Tstg −55 to +150 °C <R> Single Avalanche Current Note3 IAS <R> Single Avalanche Energy Note3 EAS −5 5 2.5 Notes 1. PW ≤ 10 μs, Duty Cycle ≤ 1% 2 2. Mounted on ceramic substrate of 2000 mm x 1.6 mmt 3. Starting Tch = 25°C, VDD = 1/2 x VDSS, RG = 25 Ω, L = 100 μH, VGS = VGSS → 0 V <R> 2 W Data Sheet G18207EJ2V0DS A mJ μ PA2791GR ELECTRICAL CHARACTERISTICS (TA = 25°C. All terminals are connected.) N-channel CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT 10 μA ±10 μA 2.5 V Zero Gate Voltage Drain Current IDSS VDS = 30 V, VGS = 0 V Gate Leakage Current IGSS VGS = ±16 V, VDS = 0 V VGS(off) VDS = 10 V, ID = 1 mA 1.0 | yfs | VDS = 10 V, ID = 3 A 2.0 RDS(on)1 VGS = 10 V, ID = 3.0 A 28.5 36.0 mΩ RDS(on)2 VGS = 4.5 V, ID = 3.0 A 36.0 50.0 mΩ Input Capacitance Ciss VDS = 10 V, 400 pF Output Capacitance Coss VGS = 0 V, 80 pF Reverse Transfer Capacitance Crss f = 1 MHz 50 pF Turn-on Delay Time td(on) VDD = 15 V, ID = 3 A, 7 ns Rise Time tr VGS = 10 V, 4 ns Turn-off Delay Time td(off) RG = 10 Ω 21 ns Fall Time tf 5 ns Total Gate Charge QG ID = 5 A, 10 nC Gate to Source Charge QGS VDD = 24 V, 1.5 nC QGD VGS = 10 V 2.7 nC VF(S-D) IF = 5 A, VGS = 0 V 0.86 V Reverse Recovery Time trr IF = 5 A, VGS = 0 V, 20 ns Reverse Recovery Charge Qrr di/dt = 50 A/μs 16 nC Gate to Source Cut-off Voltage Forward Transfer Admittance Note Drain to Source On-state Resistance Note Gate to Drain Charge Body Diode Forward Voltage Note S Note Pulsed <R> TEST CIRCUIT 1 AVALANCHE CAPABILITY D.U.T. RG = 25 Ω PG. VGS = 20 → 0 V TEST CIRCUIT 2 SWITCHING TIME D.U.T. L 50 Ω VGS RL Wave Form RG PG. VDD VGS 0 VGS 10% 90% VDD VDS 90% BVDSS IAS 90% VDS VGS 0 VDS 10% 0 10% Wave Form VDS ID τ VDD Starting Tch τ = 1 μs Duty Cycle ≤ 1% td(on) tr ton td(off) tf toff TEST CIRCUIT 3 GATE CHARGE D.U.T. IG = 2 mA PG. 50 Ω RL VDD Data Sheet G18207EJ2V0DS 3 μ PA2791GR P-channel CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Zero Gate Voltage Drain Current IDSS VDS = −30 V, VGS = 0 V −10 μA Gate Leakage Current IGSS VGS = m16 V, VDS = 0 V m10 μA VGS(off) VDS = −10 V, ID = −1 mA −1.0 −2.5 V | yfs | VDS = −10 V, ID = −3 A 1.0 RDS(on)1 VGS = −10 V, ID = −3.0 A 63 82 mΩ RDS(on)2 VGS = −4.5 V, ID = −3.0 A 79 110 mΩ Input Capacitance Ciss VDS = −10 V, 300 pF Output Capacitance Coss VGS = 0 V, 75 pF Reverse Transfer Capacitance Crss f = 1 MHz 60 pF Turn-on Delay Time td(on) VDD = −15 V, ID = −3 A, 8 ns Rise Time tr VGS = −10 V, 14 ns Turn-off Delay Time td(off) RG = 10 Ω 50 ns Fall Time tf 40 ns Total Gate Charge QG ID = −5 A, 8.3 nC Gate to Source Charge QGS VDD = −24 V, 1.2 nC QGD VGS = −10 V 2.4 nC VF(S-D) IF = 5 A, VGS = 0 V 0.96 V Reverse Recovery Time trr IF = 5 A, VGS = 0 V, 37 ns Reverse Recovery Charge Qrr di/dt = 50 A/μs 29 nC Gate to Source Cut-off Voltage Forward Transfer Admittance Note Drain to Source On-state Resistance Note Gate to Drain Charge Body Diode Forward Voltage Note S Note Pulsed <R> TEST CIRCUIT 1 AVALANCHE CAPABILITY TEST CIRCUIT 2 SWITCHING TIME D.U.T. RG = 25 Ω D.U.T. L RL 50 Ω PG. VGS = −20 → 0 V VDD RG PG. VGS(−) VGS Wave Form 0 VGS 10% 90% VDD VDS(−) − IAS BVDSS VDS ID VGS(−) 0 VDS Wave Form τ VDD Starting Tch τ = 1 μs Duty Cycle ≤ 1% TEST CIRCUIT 3 GATE CHARGE D.U.T. PG. 4 IG = −2 mA RL 50 Ω VDD Data Sheet G18207EJ2V0DS VDS 90% 90% 10% 10% 0 td(on) tr td(off) ton tf toff μ PA2791GR TYPICAL CHARACTERISTICS (TA = 25°C) (1) N-channel DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA TOTAL POWER DISSIPATION vs. AMBIENT TEMPERATURE 2.5 PT - Total Power Dissipation - W dT - Percentage of Rated Power - % 120 100 80 60 40 20 Mounted on ceramic substrate of 2 2000 mm x 1.6 mmt 2 units 2 1 unit 1.5 1 0.5 0 0 0 20 40 60 80 0 100 120 140 160 20 40 60 80 100 120 140 160 TA - Ambient Temperature - °C TA - Ambient Temperature - °C FORWARD BIAS SAFE OPERATING AREA 100 10 ID(DC) (V G 20 d it e m Li V ) 0 i 1 = S DC 0 m μs 1i 0 0 m s i s D 1i 0 i R S( ) on = m 1 0.1 PW 1i s i Po w er D is si p Mounted on ceramic substrate of at io n Li m it e d 2000 mm2 x 1.6 mmt, 1 unit TA = 25°C Single pulse 0.01 0.01 0.1 1 10 100 VDS - Drain to Source Voltage - V TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH 1000 rth(t) - Transient Thermal Resistance - °C/W ID - Drain Current - A ID(pulse) Rth(ch-A) = 73.5°C/Wi 100 10 1 Mounted on ceramic substrate of 2000 mm2 x 1.6 mmt, 1 unit TA = 25°C Single pulse 0.1 100 μ 1m 10 m 100 m 1 PW - Pulse Width – s Data Sheet G18207EJ2V0DS 10 100 1000 5 μ PA2791GR DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE FORWARD TRANSFER CHARACTERISTICS 25 100 VGS = 10 V ID - Drain Current - A ID - Drain Current - A 20 4.5 V 15 VDS = 10 V Pulsed 10 10 5 1 TA = 150°C 75°C 25°C −25°C 0.1 0.01 0.001 Pulsed 0 0.0001 0.5 1 1.5 2 2.5 3 0 1 4 GATE TO SOURCE CUT-OFF VOLTAGE vs. CHANNEL TEMPERATURE FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT 2.5 2 1.5 1 0.5 VDS = 10 V ID = 1 mA 0 -50 0 50 100 10 1 0.1 −25°C 25°C 75°C TA = 150°C 0.01 100 μ 1m 80 VGS = 4.5 V 40 10 V 0 1 10 100 m 1 10 100 DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE RDS(on) - Drain to Source On-state Resistance - mΩ Pulsed 20 10 m ID - Drain Current - A 100 60 VDS = 10 V Pulsed 0.001 150 DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT RDS(on) - Drain to Source On-state Resistance - mΩ 3 VGS - Gate to Source Voltage - V Tch - Channel Temperature - °C 100 ID - Drain Current - A 6 2 VDS - Drain to Source Voltage - V | yfs | - Forward Transfer Admittance - S VGS(off) - Gate to Source Cut-off Voltage - V 0 ID = 3.0 A Pulsed 80 60 40 20 0 0 5 10 15 VGS - Gate to Source Voltage - V Data Sheet G18207EJ2V0DS 20 μ PA2791GR CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE 1000 ID = 3.0 A Pulsed 80 60 VGS = 4.5 V 40 10 V 20 0 50 100 150 Crss VGS = 0 V f = 1 MHz 0.1 1 10 100 Tch - Channel Temperature - °C SWITCHING CHARACTERISTICS DYNAMIC INPUT/OUTPUT CHARACTERISTICS 12 30 VDD = 15 V VGS = 10 V RG = 10 Ω td(off) tf 10 td(on) tr VDS - Drain to Source Voltage - V td(on), tr, td(off), tf - Switching Time - ns 100 VDS - Drain to Source Voltage - V 100 1 25 10 VDD = 24 V 15 V 6V 20 8 6 15 10 4 VGS 5 2 VDS ID = 5 A 0 0 0.1 1 10 100 0 2 4 6 8 10 ID - Drain Current - A QG - Gate Charge - nC SOURCE TO DRAIN DIODE FORWARD VOLTAGE REVERSE RECOVERY TIME vs. DIODE FORWARD CURRENT 12 100 trr - Reverse Recovery Time - ns 100 IF - Diode Forward Current - A Coss 10 0.01 0 -50 Ciss VGS - Gate to Source Voltage - V 100 Ciss, Coss, Crss - Capacitance - pF RDS(on) - Drain to Source On-state Resistance - mΩ DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE 10 VGS = 4.5 V 1 0V 0.1 0.01 Pulsed 10 VGS = 0 V di/dt = 50 A/μs 1 0.001 0 0.5 1 1.5 VF(S-D) - Source to Drain Voltage - V Data Sheet G18207EJ2V0DS 0.1 1 10 100 IF - Diode Forward Current - A 7 μ PA2791GR (2) P-channel DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA TOTAL POWER DISSIPATION vs. AMBIENT TEMPERATURE 2.5 PT - Total Power Dissipation - W dT - Percentage of Rated Power - % 120 100 80 60 40 20 Mounted on ceramic substrate of 2000 mm2 x 1.6 mmt 2 units 2 1 unit 1.5 1 0.5 0 0 0 20 40 60 80 0 100 120 140 160 20 40 60 80 100 120 140 160 TA - Ambient Temperature - °C TA - Ambient Temperature - °C FORWARD BIAS SAFE OPERATING AREA -100 ID - Drain Current - A ID(pulse) -10 PW ID(DC) 1i 0 1i = m 20 s i m 0 μs 1i 0 0 m s i s i DC -0.1 Po w d it e ) m Li i 0 V n) 1 o − S( = D R GS (V -1 er D is si Mounted on ceramic substrate of pa t io n Li m it e d 2000 mm2 x 1.6 mmt, 1 unit TA = 25°C Single pulse -0.01 -0.01 -0.1 -1 -10 -100 VDS - Drain to Source Voltage - V TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH rth(t) - Transient Thermal Resistance - °C/W 1000 8 Rth(ch-A) = 73.5°C/Wi 100 10 1 2 Mounted on ceramic substrate of 2000 mm x 1.6 mmt, 1 unit TA = 25°C Single pulse 0.1 100 μ 1m 10 m 100 m 1 PW - Pulse Width - s Data Sheet G18207EJ2V0DS 10 100 1000 μ PA2791GR DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE FORWARD TRANSFER CHARACTERISTICS -100 -25 -20 VGS = −10 V -15 ID - Drain Current - A ID - Drain Current - A VDS = −10 V Pulsed -10 −4.5 V -10 -5 -1 TA = 150°C 75°C 25°C −25°C -0.1 -0.01 -0.001 Pulsed 0 -0.0001 0 -0.5 -1 -1.5 -2 -2.5 -3 0 -1 VDS - Drain to Source Voltage - V -2 -1.5 -1 VDS = −10 V ID = −1 mA -50 0 50 100 150 10 1 0.1 −25°C 25°C 75°C TA = 150°C 0.01 0.001 -100 μ -1 m 160 140 VGS = −4.5 V 100 80 −10 V 40 20 Pulsed 0 -1 -10 -100 m -1 -10 -100 DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE RDS(on) - Drain to Source On-state Resistance - mΩ RDS(on) - Drain to Source On-state Resistance - mΩ DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT 60 -10 m VDS = −10 V Pulsed ID - Drain Current - A Tch - Channel Temperature - °C 120 -4 FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT | yfs | - Forward Transfer Admittance - S VGS(off) - Gate to Source Cut-off Voltage - V -2.5 0 -3 VGS - Gate to Source Voltage - V GATE TO SOURCE CUT-OFF VOLTAGE vs. CHANNEL TEMPERATURE -0.5 -2 160 ID = −3.0 A Pulsed 140 120 100 80 60 40 20 0 0 -5 -10 -15 -20 VGS - Gate to Source Voltage - V ID - Drain Current - A Data Sheet G18207EJ2V0DS 9 μ PA2791GR CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE 1000 160 140 Ciss, Coss, Crss - Capacitance - pF 120 VGS = −4.5 V 100 80 −10 V 60 40 ID = −3.0 A Pulsed 20 0 50 100 Coss 100 Crss VGS = 0 V f = 1 MHz 10 -0.01 0 -50 Ciss 150 SWITCHING CHARACTERISTICS -100 -30 td(off) VDS - Drain to Source Voltage - V td(on), tr, td(off), tf - Switching Time - ns -10 DYNAMIC INPUT/OUTPUT CHARACTERISTICS 100 tf tr 10 td(on) VDD = −15 V VGS = −10 V RG = 10 Ω 1 -0.1 -12 VDD = −24 V −15 V −6 V -25 -20 -10 -8 -15 -6 VGS -10 -4 -5 -2 VDS ID = −5 A 0 -1 -10 0 -100 0 ID - Drain Current - A 2 4 6 8 10 12 QG - Gate Charge - nC SOURCE TO DRAIN DIODE FORWARD VOLTAGE REVERSE RECOVERY TIME vs. DIODE FORWARD CURRENT 100 10 VGS = −4.5 V 1 0V 0.1 0.01 Pulsed 0.001 trr - Reverse Recovery Time - ns 100 IF - Diode Forward Current - A -1 VDS - Drain to Source Voltage - V Tch - Channel Temperature - °C 10 VGS = 0 V di/dt = 50 A/μs 1 0 0.5 1 1.5 0.1 VF(S-D) - Source to Drain Voltage - V 10 -0.1 Data Sheet G18207EJ2V0DS 1 10 IF - Diode Forward Current - A 100 VGS - Gate to Source Voltage - V RDS(on) - Drain to Source On-state Resistance - mΩ DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE μ PA2791GR TAPE INFORMATION There are two types (-E1, -E2) of taping depending on the direction of the device. Reel side Draw-out side −E1 TYPE −E2 TYPE MARKING INFORMATION A2791 Lot code 1 pin mark Pb-free plating marking RECOMMENDED SOLDERING CONDITIONS The μ PA2791GR should be soldered and mounted under the following recommended conditions. For soldering methods and conditions other than those recommended below, please contact an NEC Electronics sales representative. For technical information, see the following website. Semiconductor Device Mount Manual (http://www.necel.com/pkg/en/mount/index.html) Soldering Method Infrared reflow Soldering Conditions Maximum temperature (Package's surface temperature): 260°C or below Recommended Condition Symbol IR60-00-3 Time at maximum temperature: 10 seconds or less Time of temperature higher than 220°C: 60 seconds or less Preheating time at 160 to 180°C: 60 to 120 seconds Maximum number of reflow processes: 3 times Maximum chlorine content of rosin flux (percentage mass): 0.2% or less Partial heating Maximum temperature (Pin temperature): 350°C or below P350 Time (per side of the device): 3 seconds or less Maximum chlorine content of rosin flux: 0.2% (wt.) or less Caution Do not use different soldering methods together (except for partial heating). Data Sheet G18207EJ2V0DS 11 μ PA2791GR • The information in this document is current as of November, 2007. The information is subject to change without notice. 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(2) "NEC Electronics products" means any product developed or manufactured by or for NEC Electronics (as defined above). M8E 02. 11-1