DATA SHEET MOS FIELD EFFECT TRANSISTOR µ PA1772 SWITCHING P-CHANNEL POWER MOS FET PACKAGE DRAWING (Unit : mm) DESCRIPTION The µPA1772 is Dual P-Channel MOS Field Effect Transistor designed for power management applications of portable machines. 8 5 1 : Source 1 2 : Gate 1 7, 8 : Drain 1 FEATURES PACKAGE µPA1772G Power SOP8 4.4 5.37 MAX. 0.15 0.05 MIN. ORDERING INFORMATION PART NUMBER 6.0 ±0.3 4 0.8 +0.10 –0.05 1.44 1 1.8 MAX. • Dual chip type • Low on-state resistance RDS(on)1 = 20.0 mΩ MAX. (VGS = −10 V, ID = −4 A) RDS(on)2 = 29.5 mΩ MAX. (VGS = −4.5 V, ID = −4 A) RDS(on)3 = 34.0 mΩ MAX. (VGS = −4.0 V, ID = −4 A) • Low Ciss: Ciss = 1500 pF TYP. (VDS = −10 V, VGS = 0 V) • Built-in G-S protection diode • Small and surface mount package (Power SOP8) 3 : Source 2 4 : Gate 2 5, 6 : Drain 2 0.5 ±0.2 0.10 1.27 0.78 MAX. 0.40 +0.10 –0.05 0.12 M ABSOLUTE MAXIMUM RATINGS (TA = 25°C, All terminals are connected.) Drain to Source Voltage (VGS = 0 V) VDSS −30 V Gate to Source Voltage (VDS = 0 V) VGSS m20 V Drain Current (DC) ID(DC) m8 A ID(pulse) m32 A PT 2.0 W PT 1.7 W Drain Current (pulse) Note1 Total Power Dissipation (2 unit) Note2 Total Power Dissipation (1 unit) Note2 Channel Temperature Tch 150 °C Storage Temperature Tstg –55 to + 150 °C Notes 1. PW ≤ 10 µs, Duty cycle ≤ 1% 2 2. TA = 25°C, Mounted on ceramic substrate of 2000 mm x 2.2 mm EQUIVALENT CIRCUIT (1/2 circuit) Drain Body Diode Gate Gate Protection Diode Source Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device.. The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. Document No. G15830EJ1V0DS00 (1st edition) Date Published January 2003 NS CP(K) Printed in Japan 2001, 2003 µPA1772 ELECTRICAL CHARACTERISTICS (TA = 25°C, All terminals are connected.) CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Zero Gate Voltage Drain Current IDSS VDS = −30 V, VGS = 0 V −1 µA Gate Leakage Current IGSS VGS = m20 V, VDS = 0 V m10 µA VGS(off) VDS = −10 V, ID = −1 mA −2.5 V Gate Cut-off Voltage Note Forward Transfer Admittance Note Drain to Source On-state Resistance Note −1.0 −1.7 6 12 | yfs | VDS = −10 V, ID = −4 A RDS(on)1 VGS = −10 V, ID = −4 A 17.4 20.0 mΩ RDS(on)2 VGS = −4.5 V, ID = −4 A 23.5 29.5 mΩ RDS(on)3 VGS = −4.0 V, ID = −4 A 25.8 34.0 mΩ S Input Capacitance Ciss VDS = −10 V 1500 pF Output Capacitance Coss VGS = 0 V 550 pF Reverse Transfer Capacitance Crss f = 1 MHz 240 pF Turn-on Delay Time td(on) VDD = −15 V, ID = −4 A 13 ns VGS = −10 V 11 ns RG = 10 Ω 120 ns 70 ns Rise Time tr Turn-off Delay Time td(off) Fall Time tf Total Gate Charge QG VDD = −24 V 34 nC Gate to Source Charge QGS VGS = −10 V 5 nC Gate to Drain Charge QGD ID = −8 A 9 nC Body Diode Forward Voltage VF(S-D) IF = 8 A, VGS = 0 V 0.84 1.2 V Reverse Recovery Time trr IF = 8 A, VGS = 0 V 50 ns Reverse Recovery Charge Qrr di/dt = 100 A/µs 37 nC Note Pulsed: PW ≤ 350 µs, Duty cycle ≤ 2% TEST CIRCUIT 1 SWITCHING TIME TEST CIRCUIT 2 GATE CHARGE D.U.T. D.U.T. VGS(−) RL VGS RG PG. Wave Form VDD 0 VGS 10% PG. 90% τ τ = 1 µs Duty Cycle ≤ 1% 2 90% VDS VDS 10% 0 10% Wave Form td(on) tr ton RL 50 Ω VDD 90% VDS(−) VGS(−) 0 IG = −2 mA td(off) tf toff Data Sheet G15830EJ1V0DS µPA1772 TYPICAL CHARACTERISTICS (TA = 25°C) TOTAL POWER DISSIPATION vs. AMBIENT TEMPERATURE 120 2.8 PT - Total Power Dissipation - W dT - Percentage of Rated Power - % DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA 100 80 60 40 20 Mounted on ceramic 2 substrate of 2000 mm x 2.2 mm 2.4 2 unit 2 1.6 1 unit 1.2 0.8 0.4 0 0 0 25 50 75 100 125 150 175 0 25 TA - Ambient Temperature - °C 50 75 100 125 150 175 TA - Ambient Temperature - °C FORWARD BIAS SAFE OPERATING AREA - 1 00 PW = 1 0 0 µs - 10 I D (D C ) 1 ms 10 ms R D S (o n ) L im ite d ( VGS = 10 V) -1 100 ms P o w e r D is s ip a tio n L im ite d - 0 .1 T A = 2 5 °C M o u n te d o n c e ra m ic s u b s tra te o f 2 2 0 0 0 m m x 2 .2 m m - 0 .0 1 - 0 .0 1 - 0 .1 -1 DC - 10 - 1 00 VDS - Drain to Source Voltage - V TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH 1000 rth(t) - Transient Thermal Resistance - °C/W ID - Drain Current - A I D (p u ls e ) Rth(ch-A) = 73.5°C/W 100 10 1 Mounted on ceramic substrate of 2 2000 mm x 2.2 mm Single pulse 1unit, TA = 25°C 0.1 0.01 100 µ 1m 10 m 100 m 1 10 100 1000 PW - Pulse Width - s Data Sheet G15830EJ1V0DS 3 µPA1772 DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE FORWARD TRANSFER CHARACTERISTICS - 50 - 100 VDS = −10 V Pulsed - 40 V G S = −10 V ID - Drain Current - A ID - Drain Current - A Pulsed −4.5 V - 30 −4.0 V - 20 - 10 0 T A = 150°C 75°C 25°C −25°C -1 - 0.1 - 0.01 - 0.2 - 0.4 - 0.6 - 0.8 -1 - 1.2 - 1.4 -2 - 1.5 -1 - 0.5 0 0 50 100 V D S = −10 V Pulsed T A = −25°C 25°C 75°C 150°C 10 1 0.1 - 0.01 150 DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT 40 Pulsed V GS = −4.0 V −4.5 V 20 −10 V 10 -1 - 10 - 0.1 -1 - 10 - 100 ID - Drain Current - A - 100 RDS(on) - Drain to Source On-state Resistance - mΩ RDS(on) - Drain to Source On-state Resistance - mΩ -4 100 Tch - Channel Temperature - °C DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE 80 ID = −4 A Pulsed 60 40 20 0 0 -5 - 10 - 15 VGS - Gate to Source Voltage - V ID - Drain Current - A 4 -3 FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT - 2.5 0 - 0.1 -2 GATE CUT-OFF VOLTAGE vs. CHANNEL TEMPERATURE VDS = −10 V ID = −1 mA 30 -1 VGS - Gate to Source Voltage - V -3 -50 0 VDS - Drain to Source Voltage - V | yfs | - Forward Transfer Admittance - S 0 VGS(off) - Gate Cut-off Voltage - V - 10 Data Sheet G15830EJ1V0DS - 20 DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE 10000 50 ID = −4 A Pulsed Ciss, Coss, Crss - Capacitance - pF 40 V GS = −4.0 V 30 −4.5 V 20 −10 V 10 V GS = 0 V f = 1 MHz C os s 0 50 100 C rss 100 0 -50 C iss 1000 10 - 0.1 150 Tch - Channel Temperature - °C VDS - Drain to Source Voltage - V td(on), tr, td(off), tf - Switching Time - ns DYNAMIC INPUT/OUTPUT CHARACTERISTICS t d(off) tf t d(on) tr 10 - 100 - 30 V D D = −15 V V G S = −10 V R G = 10 Ω 100 - 10 VDS - Drain to Source Voltage - V SWITCHING CHARACTERISTICS 1000 -1 - 15 ID = − 8 A VGS VDD = 24 V 15 V 6 V - 20 - 10 - 10 -5 VDS 1 - 0.1 0 -1 - 10 - 100 0 0 ID - Drain Current - A 20 30 40 50 QG - Gate Charge - nC SOURCE TO DRAIN DIODE FORWARD VOLTAGE REVERSE RECOVERY TIME vs. DIODE FORWARD CURRENT 100 1000 VGS = 0 V Pulsed trr - Reverse Recovery Time - ns IF - Diode Forward Current - A 10 10 1 0.1 0.01 di/dt = 100 A/µs VGS = 0 V 100 10 1 0 0.2 0.4 0.6 0.8 1 1.2 1.4 VF(S-D) - Source to Drain Voltage - V 0.1 1 10 100 IF - Diode Forward Current - A Data Sheet G15830EJ1V0DS 5 VGS - Gate to Source Voltage - V RDS(on) - Drain to Source On-state Resistance - mΩ µPA1772 µPA1772 • The information in this document is current as of January, 2003. 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