PHILIPS BLF4G10-160

BLF4G10-160
UHF power LDMOS transistor
Rev. 01 — 22 June 2007
Product data sheet
1. Product profile
1.1 General description
160 W LDMOS power transistor for base station applications at frequencies from
800 MHz to 1000 MHz.
Table 1.
Typical performance
RF performance at Tcase = 25 °C in a common source class-AB test circuit.
Mode of operation f
VDS PL
PL(AV) Gp
ηD
ACPR400 ACPR600 ACPR750 ACPR1980 EVMrms IMD3
(MHz) (V)
(W) (W)
(dB) (%)
(dBc)
(dBc)
(dBc)
(dBc)
(%)
(dBc)
CW
894
28
200 -
19.0 59
-
-
-
-
-
-
2-tone
894
28
-
19.7 42.5 -
-
-
-
-
−29
−72[1]
-
-
3.0
-
-
−45[2]
−64[2]
-
-
GSM EDGE
CDMA
894
881.5
28
28
-
80
80
40
19.7 41.5
−61[1]
19.0 29.5 -
[1]
ACPR400 and ACPR600 at 30 kHz resolution bandwidth.
[2]
Test signal: IS-95, with PAR = 9.9 dB at 0.01 % probability.
CAUTION
This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken
during transport and handling.
1.2 Features
n Typical GSM EDGE performance at f = 894 MHz, VDS = 28 V and IDq = 900 mA:
u Average output power = 80 W
u Gain = 19.7 dB
u Efficiency = 41.5 %
u ACPR400 = −61 dBc
u ACPR600 = −72 dBc
u EVMrms = 3.0 %
n Easy power control
n Excellent ruggedness
n High efficiency
n Excellent thermal stability
n Designed for broadband operation (800 MHz to 1000 MHz)
n Internally matched for ease of use
BLF4G10-160
NXP Semiconductors
UHF power LDMOS transistor
1.3 Applications
n RF power amplifiers for GSM, GSM EDGE and CDMA base stations and multi carrier
applications in the 800 MHz to 1000 MHz frequency range.
2. Pinning information
Table 2.
Pinning
Pin
Description
1
drain
2
gate
3
source
Simplified outline
Symbol
1
1
3
[1]
2
2
3
sym112
[1]
Connected to flange
3. Ordering information
Table 3.
Ordering information
Type number
Package
Name
Description
Version
BLF4G10-160
-
flanged LDMOST ceramic package; 2 mounting holes; 2
leads
SOT502A
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Min
Max
Unit
VDS
drain-source voltage
Conditions
-
65
V
VGS
gate-source voltage
−0.5
+15
V
ID
drain current
-
15
A
Tstg
storage temperature
−65
+150
°C
Tj
junction temperature
-
200
°C
5. Thermal characteristics
Table 5.
Thermal characteristics
Symbol
Parameter
Conditions
Typ
Max
Unit
Rth(j-case)
thermal resistance from junction
to case
Tcase = 80 °C;
PL = 50 W
0.55
0.64
K/W
BLF4G10-160_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 22 June 2007
2 of 14
BLF4G10-160
NXP Semiconductors
UHF power LDMOS transistor
6. Characteristics
Table 6.
Characteristics
Tj = 25 °C; unless otherwise specified.
Symbol
Parameter
V(BR)DSS drain-source breakdown
voltage
Conditions
Min
Typ
Max Unit
VGS = 0 V; ID = 2.1 mA
65
-
-
V
2.9
3.5
V
VGS(th)
gate-source threshold voltage
VDS = 10 V; ID = 230 mA
2.5
VGSq
gate-source quiescent voltage
VDS = 28 V; ID = 900 mA
2.65 3.15
3.65 V
IDSS
drain leakage current
VGS = 0 V; VDS = 28 V
-
-
5
µA
IDSX
drain cut-off current
VGS = VGS(th) + 6 V;
VDS = 10 V
35
42
-
A
IGSS
gate leakage current
VGS = 15 V; VDS = 0 V
-
-
420
nA
gfs
forward transconductance
VDS = 10 V; ID = 7.5 A
-
11
-
S
RDS(on)
drain-source on-state
resistance
VGS = VGS(th) + 6 V;
ID = 7.5 A
-
0.065
-
Ω
Crs
feedback capacitance
VGS = 0 V; VDS = 28 V;
f = 1 MHz
-
3.0
-
pF
7. Application information
Table 7.
Application information
Mode of operation: 2-tone; f1 = 894 MHz; f2 = 894.2 MHz; RF performance at VDS = 28 V;
IDq = 900 mA; Tcase = 25 °C; unless otherwise specified; in a class-AB test circuit.
Symbol Parameter
Conditions
Min
Typ
Max Unit
PL(PEP) = 160 W
18.5 19.7 -
Gp
power gain
RLin
input return loss
PL(PEP) = 160 W
-
−10
ηD
drain efficiency
PL(PEP) = 160 W
40
42.5 -
%
IMD3
third order intermodulation distortion
PL(PEP) = 160 W
-
−29
−26
dBc
IMD5
fifth order intermodulation distortion
PL(PEP) = 160 W
-
−38
−35
dBc
IMD7
seventh order intermodulation distortion
PL(PEP) = 160 W
-
−57
−53
dBc
−6
dB
dB
7.1 Ruggedness in class-AB operation
The BLF4G10-160 is capable of withstanding a load mismatch corresponding to
VSWR = 10 : 1 through all phases under the following conditions: VDS = 28 V;
IDq = 900 mA; PL = 160 W (CW); f = 894 MHz.
BLF4G10-160_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 22 June 2007
3 of 14
BLF4G10-160
NXP Semiconductors
UHF power LDMOS transistor
001aag546
21
Gp
(dB)
60
ηD
(%)
Gp
19
ηD
001aag547
22
60
ηD
(%)
Gp
(dB)
40
20
20
18
Gp
40
ηD
17
15
0
80
0
240
160
20
16
0
40
PL (W)
PL(AV) (W)
VDS = 28 V; IDq = 900 mA; Tcase = 25 °C;
f = 894 MHz.
VDS = 28 V; IDq = 900 mA; Tcase = 25 °C;
f = 894 MHz.
Fig 1. One-tone CW power gain and drain efficiency
as functions of load power; typical values
001aag548
0
0
120
80
IMD
(dBc)
Fig 2. Two-tone power gain and drain efficiency as
functions of average load power; typical values
001aag549
0
IMD3
(dBc)
−20
−20
IMD3
IMD5
−40
1
−40
2
3
IMD7
−60
4
−60
−80
−80
0
40
80
120
0
PL(AV) (W)
40
80
120
PL(AV) (W)
VDS = 28 V; IDq = 900 mA; Tcase = 25 °C;
f = 894 MHz.
VDS = 28 V; Tcase = 25 °C; f = 894 MHz.
(1) IDq = 800 mA.
(2) IDq = 900 mA.
(3) IDq = 1000 mA.
(4) IDq = 1100 mA.
Fig 3. Intermodulation distortion a function of
average load power; typical values
Fig 4. IMD3 as a function of average load power;
typical values
BLF4G10-160_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 22 June 2007
4 of 14
BLF4G10-160
NXP Semiconductors
UHF power LDMOS transistor
001aag550
21
50
ηD
(%)
Gp
(dB)
Gp
20
40
001aag551
−50
ACPR
(dBc)
−60
ACPR400
30
19
ηD
18
20
ACPR600
−70
10
17
16
0
20
40
60
0
80
100
PL(AV) (W)
−80
0
VDS = 28 V; IDq = 900 mA; Tcase = 25 °C;
f = 894 MHz.
40
60
80
100
PL(AV) (W)
VDS = 28 V; IDq = 900 mA; Tcase = 25 °C;
f = 894 MHz.
Fig 5. GSM EDGE power gain and drain efficiency as
functions of average load power; typical values
001aag552
16
20
EVM
(%)
Fig 6. GSM EDGE ACPR at 400 kHz and at 600 kHz as
a function of average load power; typical values
001aag553
−56
4
ACPR
(dBc)
EVM
(%)
−60
12
3
ACPR400
−64
EVMM
8
2
−68
4
1
EVMrms
EVMrms
−72
0
0
20
40
60
80
100
PL(AV) (W)
VDS = 28 V; IDq = 900 mA; Tcase = 25 °C;
f = 894 MHz.
0
0
40
ηD (%)
60
VDS = 28 V; IDq = 900 mA; Tcase = 25 °C;
f = 894 MHz.
Fig 7. GSM EDGE rms EVM and peak EVM as
functions of average load power; typical values
Fig 8. GSM EDGE ACPR and rms EVM as functions of
drain efficiency; typical values
BLF4G10-160_1
Product data sheet
20
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 22 June 2007
5 of 14
BLF4G10-160
NXP Semiconductors
UHF power LDMOS transistor
001aag554
20
Gp
(dB)
40
ηD
(%)
Gp
Gp
(dB)
30
19
001aag555
20
1
19
2
3
18
20
18
10
17
ηD
17
16
28
32
36
0
44
48
PL(AV) (dBm)
40
16
28
VDS = 28 V; IDq = 1100 mA; f = 881.5 MHz.
Test signal: IS-95 with PAR = 9.9 dB at 0.01 %
probability.
32
36
40
44
48
PL(AV) (dBm)
VDS = 28 V; IDq = 1100 mA.
(1) f = 869 MHz.
(2) f = 881.5 MHz.
(3) f = 894 MHz.
Fig 9. CDMA power gain and drain efficiency as
functions of average load power; typical values,
measured in a CDMA demo test circuit
Fig 10. CDMA power gain as a function of average load
power at various frequencies; typical values,
measured in a CDMA demo test circuit
001aag556
−35
ACPR
(dBc)
−45
−55
ACPR750
−65
ACPR1980
−75
28
32
36
40
44
48
PL(AV) (dBm)
VDS = 28 V; IDq = 1100 mA; Tcase = 25 °C; f = 881.5 MHz.
Fig 11. CDMA ACPR at 750 kHz and at 1980 kHz as functions of average load power; typical values, measured in a
CDMA demo test circuit
BLF4G10-160_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 22 June 2007
6 of 14
BLF4G10-160
NXP Semiconductors
UHF power LDMOS transistor
8. Test information
VDD
Vbias
C6
R1
C7
L5
C8
C9
C10
L6
C5
L4
L7
L3
RF in
L1
C1
L8
L9
L2
C4
L10
RF out
C3
C2
001aag557
See Table 8 for a list of components
Fig 12. Circuit schematic for 894 MHz production test circuit
+Vbias
VDD
L6
C7
C8 C9
C10
L5
C6
C5
L1
C1
R1
L2
L10
L3
L4
L7
L8
C2
C3
L9
C4
BLF4G10-160
Input-Rev1
BLF4G10-160
Output-Rev1
001aag558
The striplines are on a double copper-clad Rogers 6006 Printed-Circuit Board (PCB) with εr = 6.15 and
thickness = 0.635 mm.
See Table 8 for a list of components.
Fig 13. Component layout for 894 MHz production test circuit
BLF4G10-160_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 22 June 2007
7 of 14
BLF4G10-160
NXP Semiconductors
UHF power LDMOS transistor
Table 8.
List of components (see Figure 12 and Figure 13).
Component
Description
Value
C1, C4, C6, C7
multilayer ceramic chip
capacitor
68 pF
C2
multilayer ceramic chip
capacitor
1.5 pF
[1]
C3
multilayer ceramic chip
capacitor
1.4 pF
[1]
C5, C9
tantalum capacitor
10 µF
C8
ceramic capacitor
1 µF
C10
electrolytic capacitor
220 µF
L1
stripline
-
[2]
(W × L) 0.914 mm × 10.160 mm
L2
stripline
-
[2]
(W × L) 0.914 mm × 24.384 mm
(W1 × W2 × L)
0.914 mm × 19.812 mm × 11.024 mm
1812X7R105KL2AB
L3
tapered stripline
-
[2]
L4
stripline
-
[2]
(W × L) 19.812 mm × 21.438 mm
L5
stripline
-
[2]
(W × L) 0.914 mm × 42.342 mm
-
[2]
(W × L) 1.524 mm × 42.418 mm
-
[2]
(W × L) 17.221 mm × 22.479 mm
(W1 × W2 × L)
17.221 mm × 0.914 mm × 20.625 mm
L6
L7
stripline
stripline
L8
tapered stripline
-
[2]
L9
stripline
-
[2]
(W × L) 0.914 mm × 19.126 mm
[2]
(W × L) 0.914 mm × 6.858 mm
L10
stripline
-
R1
SMD resistor
5.1 Ω
[1]
American Technical Ceramics type 100B or capacitor of same quality.
[2]
The striplines are on a double copper-clad Rogers 6006 Printed-Circuit Board (PCB) with εr = 6.15 and
thickness = 0.635 mm.
BLF4G10-160_1
Product data sheet
Remarks
[1]
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 22 June 2007
8 of 14
BLF4G10-160
NXP Semiconductors
UHF power LDMOS transistor
Vbias(12 V - 28 V)
Q1
R1
R2
R3
R4
C3
C4
VDD(28 V)
R6
C6
R5
R10
R9
R7
R8
C8
L5
C9
C7
L4
L7
L3
L8
Q3
C1
L1
C11
C5
Q2
RF in
C10
L6
L2
L9
C12
L10
RF out
C2
001aag559
See Table 9 for a list of components
Fig 14. Circuit schematic for 869 MHz to 894 MHz CDMA demo test circuit
Vbias(12 V - 28 V)
Q1
C3
C4
R1
VDD(28 V)
R9
Q2
L6
C8
R10
R6
C9 C10
R5 R7
C11
C6
L5
R2
R8
R3
L1
C1
Q3
C7
R4
C5
L2
L10
L3
L4
L7
L8
L9
C12
C2
BLF4G10-160
CDMA in
BLF4G10-160
CDMA out
001aag560
The other side is unetched and serves as a ground plane.
See Table 9 for a list of components.
Fig 15. Component layout for 869 MHz to 894 MHz CDMA demo test circuit
BLF4G10-160_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 22 June 2007
9 of 14
BLF4G10-160
NXP Semiconductors
UHF power LDMOS transistor
Table 9.
List of components (see Figure 14 and Figure 15).
Component
Description
Value
C1, C6, C8
multilayer ceramic chip
capacitor
68 pF
C2, C7
multilayer ceramic chip
capacitor
1.3 pF
[1]
C3, C4
ceramic capacitor
100 nF
C5, C10
tantalum capacitor
10 µF
C9
ceramic capacitor
1 µF
C11
electrolytic capacitor
2200 µF
C12
multilayer ceramic chip
capacitor
18 pF
[1]
L1
stripline
-
[2]
(W × L) 0.914 mm × 10.160 mm
-
[2]
(W × L) 0.914 mm × 24.384 mm
(W1 × W2 × L)
0.914 mm × 19.812 mm × 11.024 mm
L2
stripline
L3
tapered stripline
-
[2]
L4
stripline
-
[2]
(W × L) 19.812 mm × 21.438 mm
-
[2]
(W × L) 0.914 mm × 42.342 mm
-
[2]
(W × L) 1.524 mm × 42.418 mm
(W × L) 17.221 mm × 22.479 mm
L5
stripline
L6
stripline
L7
stripline
-
[2]
L8
tapered stripline
-
[2]
(W1 × W2 × L)
17.221 mm × 0.914 mm × 20.625 mm
L9
stripline
-
[2]
(W × L) 0.914 mm × 19.126 mm
[2]
(W × L) 0.914 mm × 6.858 mm
L10
stripline
-
R1, R2
SMD resistor
430 Ω
R3
SMD resistor
300 Ω
R4
potentiometer
200 Ω
R5
SMD resistor
2 kΩ
R6
SMD resistor
1.1 kΩ
R7
SMD resistor
11 kΩ
R8
SMD resistor
5.1 Ω
R9
SMD resistor
5.1 kΩ
R10
SMD resistor
910 Ω
Q1
voltage regulator
-
78L08
Q2
transistor
-
2N2222
Q3
BLF4G10-160
-
[1]
American Technical Ceramics type 100B or capacitor of same quality.
[2]
The striplines are on a double copper-clad Rogers 6006 Printed-Circuit Board (PCB) with εr = 6.15 and
thickness = 0.635 mm.
BLF4G10-160_1
Product data sheet
Remarks
[1]
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 22 June 2007
10 of 14
BLF4G10-160
NXP Semiconductors
UHF power LDMOS transistor
9. Package outline
Flanged LDMOST ceramic package; 2 mounting holes; 2 leads
SOT502A
D
A
F
3
D1
U1
B
q
c
C
1
H
L
E1
p
U2
E
w1 M A M B M
A
2
w2 M C M
b
0
5
Q
10 mm
scale
DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)
UNIT
A
b
c
mm
4.72
3.43
12.83
12.57
0.15
0.08
inches
0.186
0.135
0.505 0.006
0.495 0.003
OUTLINE
VERSION
E
E1
F
H
L
p
Q
q
U1
U2
w1
w2
20.02 19.96
19.61 19.66
9.50
9.30
9.53
9.25
1.14
0.89
19.94
18.92
5.33
4.32
3.38
3.12
1.70
1.45
27.94
34.16
33.91
9.91
9.65
0.25
0.51
0.788 0.786
0.772 0.774
0.374 0.375
0.366 0.364
0.067
1.100
0.057
1.345
1.335
0.390
0.380
0.01
0.02
D
D1
0.045 0.785
0.035 0.745
0.210 0.133
0.170 0.123
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-28
03-01-10
SOT502A
Fig 16. Package outline SOT502A
BLF4G10-160_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 22 June 2007
11 of 14
BLF4G10-160
NXP Semiconductors
UHF power LDMOS transistor
10. Abbreviations
Table 10.
Abbreviations
Acronym
Description
CDMA
Code Division Multiple Access
CW
Continuous Waveform
EDGE
Enhanced Data GSM Environment
EVM
Error Vector Magnitude
GSM
Global System for Mobile communications
IS-95
CDMA Interim Standard 95
LDMOS
Laterally Diffused Metal Oxide Semiconductor
LDMOST
Laterally Diffused Metal-Oxide Semiconductor Transistor
PAR
Peak-to-Average power Ratio
RF
Radio Frequency
RMS
Root Mean Square
SMD
Surface-Mount Device
VSWR
Voltage Standing-Wave Ratio
11. Revision history
Table 11.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
BLF4G10-160_1
20070622
Product data sheet
-
-
BLF4G10-160_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 22 June 2007
12 of 14
BLF4G10-160
NXP Semiconductors
UHF power LDMOS transistor
12. Legal information
12.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
12.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
12.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of a NXP Semiconductors product can reasonably be expected to
result in personal injury, death or severe property or environmental damage.
NXP Semiconductors accepts no liability for inclusion and/or use of NXP
Semiconductors products in such equipment or applications and therefore
such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
12.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
13. Contact information
For additional information, please visit: http://www.nxp.com
For sales office addresses, send an email to: [email protected]
BLF4G10-160_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 22 June 2007
13 of 14
BLF4G10-160
NXP Semiconductors
UHF power LDMOS transistor
14. Contents
1
1.1
1.2
1.3
2
3
4
5
6
7
7.1
8
9
10
11
12
12.1
12.2
12.3
12.4
13
14
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
Thermal characteristics. . . . . . . . . . . . . . . . . . . 2
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Application information. . . . . . . . . . . . . . . . . . . 3
Ruggedness in class-AB operation. . . . . . . . . . 3
Test information . . . . . . . . . . . . . . . . . . . . . . . . . 7
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 12
Legal information. . . . . . . . . . . . . . . . . . . . . . . 13
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Contact information. . . . . . . . . . . . . . . . . . . . . 13
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2007.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 22 June 2007
Document identifier: BLF4G10-160_1